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gerrit.cesnet.cz / github / trini / u-boot / df51656986e913272546f33ce8f6f5a46b1ed2bf / . / drivers / spi / Kconfig
blob: 9469147152ac4a799ea23bfe70d4b7090d2d0e9a [file] [log] [blame]
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]1menuconfig SPI
2 bool "SPI Support"
3
4if SPI
Jagan Tekide823052015-06-27 22:35:14 +0530[diff] [blame]5
Masahiro Yamadada333ae2014-10-23 22:26:09 +0900[diff] [blame]6config DM_SPI
7 bool "Enable Driver Model for SPI drivers"
8 depends on DM
9 help
Simon Glassf94a1be2015-02-05 21:41:35 -0700[diff] [blame]10 Enable driver model for SPI. The SPI slave interface
11 (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
12 the SPI uclass. Drivers provide methods to access the SPI
13 buses that they control. The uclass interface is defined in
14 include/spi.h. The existing spi_slave structure is attached
15 as 'parent data' to every slave on each bus. Slaves
16 typically use driver-private data instead of extending the
17 spi_slave structure.
Simon Glass892cac72015-03-06 13:19:05 -0700[diff] [blame]18
Boris Brezillond13f5b22018-08-16 17:30:11 +0200[diff] [blame]19config SPI_MEM
20 bool "SPI memory extension"
21 help
22 Enable this option if you want to enable the SPI memory extension.
23 This extension is meant to simplify interaction with SPI memories
24 by providing an high-level interface to send memory-like commands.
25
Vignesh R6430eea2019-02-05 11:29:15 +0530[diff] [blame]26if DM_SPI
27
Thomas Chou15a56f92015-10-14 08:33:34 +0800[diff] [blame]28config ALTERA_SPI
29 bool "Altera SPI driver"
30 help
31 Enable the Altera SPI driver. This driver can be used to
32 access the SPI NOR flash on platforms embedding this Altera
33 IP core. Please find details on the "Embedded Peripherals IP
34 User Guide" of Altera.
35
Jagan Teki15927ae2018-03-07 10:33:33 +0530[diff] [blame]36config ATCSPI200_SPI
37 bool "Andestech ATCSPI200 SPI driver"
38 help
39 Enable the Andestech ATCSPI200 SPI driver. This driver can be
40 used to access the SPI flash on AE3XX and AE250 platforms embedding
41 this Andestech IP core.
42
Wills Wangb85dc462016-03-16 16:59:58 +0800[diff] [blame]43config ATH79_SPI
44 bool "Atheros SPI driver"
45 depends on ARCH_ATH79
46 help
47 Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
48 to access SPI NOR flash and other SPI peripherals. This driver
49 uses driver model and requires a device tree binding to operate.
50 please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
51
Wenyou Yang0eafd4b2016-10-28 14:17:49 +0800[diff] [blame]52config ATMEL_SPI
53 bool "Atmel SPI driver"
Jagan Teki89d4fc12018-03-14 18:46:44 +0530[diff] [blame]54 default y if ARCH_AT91
Wenyou Yang0eafd4b2016-10-28 14:17:49 +0800[diff] [blame]55 help
56 This enables driver for the Atmel SPI Controller, present on
Andy Shevchenkodaab59a2017-07-05 16:25:22 +0300[diff] [blame]57 many AT91 (ARM) chips. This driver can be used to access
58 the SPI Flash, such as AT25DF321.
Wenyou Yang0eafd4b2016-10-28 14:17:49 +0800[diff] [blame]59
Álvaro Fernández Rojas29cc4362018-01-20 02:13:38 +0100[diff] [blame]60config BCM63XX_HSSPI
61 bool "BCM63XX HSSPI driver"
62 depends on ARCH_BMIPS
63 help
64 Enable the BCM6328 HSSPI driver. This driver can be used to
65 access the SPI NOR flash on platforms embedding this Broadcom
66 SPI core.
67
Álvaro Fernández Rojas5ac07d22018-01-23 17:14:58 +0100[diff] [blame]68config BCM63XX_SPI
69 bool "BCM6348 SPI driver"
70 depends on ARCH_BMIPS
71 help
72 Enable the BCM6348/BCM6358 SPI driver. This driver can be used to
73 access the SPI NOR flash on platforms embedding these Broadcom
74 SPI cores.
75
Thomas Fitzsimmons894c3ad2018-06-08 17:59:45 -0400[diff] [blame]76config BCMSTB_SPI
77 bool "BCMSTB SPI driver"
78 help
79 Enable the Broadcom set-top box SPI driver. This driver can
80 be used to access the SPI flash on platforms embedding this
81 Broadcom SPI core.
82
Jagan Tekie4976af2015-06-27 22:37:00 +0530[diff] [blame]83config CADENCE_QSPI
84 bool "Cadence QSPI driver"
85 help
86 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
87 used to access the SPI NOR flash on platforms embedding this
88 Cadence IP core.
89
Angelo Dureghello610e3162019-03-13 21:46:46 +0100[diff] [blame]90config CF_SPI
91 bool "ColdFire SPI driver"
92 help
93 Enable the ColdFire SPI driver. This driver can be used on
94 some m68k SoCs.
95
Jagan Tekie4976af2015-06-27 22:37:00 +0530[diff] [blame]96config DESIGNWARE_SPI
97 bool "Designware SPI driver"
98 help
99 Enable the Designware SPI driver. This driver can be used to
100 access the SPI NOR flash on platforms embedding this Designware
101 IP core.
102
Jagan Tekic354eee2015-06-27 15:32:19 +0530[diff] [blame]103config EXYNOS_SPI
104 bool "Samsung Exynos SPI driver"
105 help
106 Enable the Samsung Exynos SPI driver. This driver can be used to
107 access the SPI NOR flash on platforms embedding this Samsung
108 Exynos IP core.
109
Jagan Teki94ea3082015-06-27 14:17:06 +0530[diff] [blame]110config FSL_DSPI
111 bool "Freescale DSPI driver"
112 help
113 Enable the Freescale DSPI driver. This driver can be used to
114 access the SPI NOR flash and SPI Data flash on platforms embedding
115 this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
116 use this driver.
117
Jagan Teki45636012015-06-27 15:43:27 +0530[diff] [blame]118config ICH_SPI
119 bool "Intel ICH SPI driver"
Vignesh R6d825172019-02-05 11:29:28 +0530[diff] [blame]120 imply SPI_FLASH_BAR
Jagan Teki45636012015-06-27 15:43:27 +0530[diff] [blame]121 help
122 Enable the Intel ICH SPI driver. This driver can be used to
123 access the SPI NOR flash on platforms embedding this Intel
124 ICH IP core.
125
Neil Armstrong9d265062018-11-22 11:01:05 +0100[diff] [blame]126config MESON_SPIFC
127 bool "Amlogic Meson SPI Flash Controller driver"
128 depends on ARCH_MESON
129 help
130 Enable the Amlogic Meson SPI Flash Controller SPIFC) driver.
131 This driver can be used to access the SPI NOR flash chips on
132 Amlogic Meson SoCs.
133
Christophe Leroyf34d0312018-11-21 08:51:57 +0000[diff] [blame]134config MPC8XX_SPI
135 bool "MPC8XX SPI Driver"
136 depends on MPC8xx
137 help
138 Enable support for SPI on MPC8XX
139
Jagan Tekic1a3f1e2019-04-29 01:58:53 +0530[diff] [blame]140config MPC8XXX_SPI
141 bool "MPC8XXX SPI Driver"
142 help
143 Enable support for SPI on the MPC8XXX PowerPC SoCs.
144
Stefan Roese5eee9de2018-08-16 10:48:48 +0200[diff] [blame]145config MT7621_SPI
146 bool "MediaTek MT7621 SPI driver"
Weijie Gao16b94902019-04-30 11:13:58 +0800[diff] [blame]147 depends on SOC_MT7628
Stefan Roese5eee9de2018-08-16 10:48:48 +0200[diff] [blame]148 help
149 Enable the MT7621 SPI driver. This driver can be used to access
150 the SPI NOR flash on platforms embedding this Ralink / MediaTek
151 SPI core, like MT7621/7628/7688.
152
Guochun Mao052cafd2018-10-12 15:01:06 +0800[diff] [blame]153config MTK_QSPI
154 bool "Mediatek QSPI driver"
Vignesh R6d825172019-02-05 11:29:28 +0530[diff] [blame]155 imply SPI_FLASH_BAR
Guochun Mao052cafd2018-10-12 15:01:06 +0800[diff] [blame]156 help
157 Enable the Mediatek QSPI driver. This driver can be
158 used to access the SPI NOR flash on platforms embedding this
159 Mediatek QSPI IP core.
160
Stefan Roese3fda4ef2016-05-19 15:56:44 +0200[diff] [blame]161config MVEBU_A3700_SPI
162 bool "Marvell Armada 3700 SPI driver"
Marek Behúndbbd5bd2018-04-24 17:21:26 +0200[diff] [blame]163 select CLK_ARMADA_3720
Stefan Roese3fda4ef2016-05-19 15:56:44 +0200[diff] [blame]164 help
165 Enable the Marvell Armada 3700 SPI driver. This driver can be
166 used to access the SPI NOR flash on platforms embedding this
167 Marvell IP core.
168
Purna Chandra Mandale19b9002016-06-02 14:26:08 +0530[diff] [blame]169config PIC32_SPI
170 bool "Microchip PIC32 SPI driver"
171 depends on MACH_PIC32
172 help
173 Enable the Microchip PIC32 SPI driver. This driver can be used
174 to access the SPI NOR flash, MMC-over-SPI on platforms based on
175 Microchip PIC32 family devices.
176
Quentin Schulz8a4791f2018-08-31 16:28:29 +0200[diff] [blame]177config PL022_SPI
178 bool "ARM AMBA PL022 SSP controller driver"
179 depends on ARM
180 help
181 This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
182 controller. If you have an embedded system with an AMBA(R)
183 bus and a PL022 controller, say Y or M here.
184
Marek Vasutfbebea22017-11-29 06:29:46 +0100[diff] [blame]185config RENESAS_RPC_SPI
186 bool "Renesas RPC SPI driver"
Marek Vasutb5b66562019-05-04 18:52:33 +0200[diff] [blame]187 depends on RCAR_GEN3 || RZA1
Vignesh R6d825172019-02-05 11:29:28 +0530[diff] [blame]188 imply SPI_FLASH_BAR
Marek Vasutfbebea22017-11-29 06:29:46 +0100[diff] [blame]189 help
190 Enable the Renesas RPC SPI driver, used to access SPI NOR flash
191 on Renesas RCar Gen3 SoCs. This uses driver model and requires a
192 device tree binding to operate.
193
Simon Glass1b2fd5b2015-09-01 19:19:37 -0600[diff] [blame]194config ROCKCHIP_SPI
195 bool "Rockchip SPI driver"
196 help
197 Enable the Rockchip SPI driver, used to access SPI NOR flash and
198 other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
199 This uses driver model and requires a device tree binding to
200 operate.
201
Simon Glass892cac72015-03-06 13:19:05 -0700[diff] [blame]202config SANDBOX_SPI
203 bool "Sandbox SPI driver"
204 depends on SANDBOX && DM
205 help
206 Enable SPI support for sandbox. This is an emulation of a real SPI
207 bus. Devices can be attached to the bus using the device tree
208 which specifies the driver to use. As an example, see this device
209 tree fragment from sandbox.dts. It shows that the SPI bus has a
210 single flash device on chip select 0 which is emulated by the driver
211 for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
212
213 spi@0 {
214 #address-cells = <1>;
215 #size-cells = <0>;
216 reg = <0>;
217 compatible = "sandbox,spi";
218 cs-gpios = <0>, <&gpio_a 0>;
219 flash@0 {
220 reg = <0>;
221 compatible = "spansion,m25p16", "sandbox,spi-flash";
222 spi-max-frequency = <40000000>;
223 sandbox,filename = "spi.bin";
224 };
Jagan Tekie4976af2015-06-27 22:37:00 +0530[diff] [blame]225 };
Jagan Tekif924a202015-06-27 04:41:11 +0530[diff] [blame]226
Jagan Tekia51cd542019-02-27 20:02:13 +0530[diff] [blame]227config SPI_SUNXI
228 bool "Allwinner SoC SPI controllers"
229 help
230 Enable the Allwinner SoC SPi controller driver.
231
232 Same controller driver can reuse in all Allwinner SoC variants.
233
Michael Kurzd4363ba2017-01-22 16:04:30 +0100[diff] [blame]234config STM32_QSPI
235 bool "STM32F7 QSPI driver"
Patrice Chotard351d2fe2019-04-30 16:09:18 +0200[diff] [blame]236 depends on STM32F4 || STM32F7 || ARCH_STM32MP
Michael Kurzd4363ba2017-01-22 16:04:30 +0100[diff] [blame]237 help
238 Enable the STM32F7 Quad-SPI (QSPI) driver. This driver can be
239 used to access the SPI NOR flash chips on platforms embedding
240 this ST IP core.
241
Patrice Chotarda2a89b22019-04-30 18:08:28 +0200[diff] [blame]242config STM32_SPI
243 bool "STM32 SPI driver"
244 depends on ARCH_STM32MP
245 help
246 Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP
247 SoCs. This uses driver model and requires a device tree binding to
248 operate.
249
Jagan Teki5bf9a2d2015-06-27 15:57:53 +0530[diff] [blame]250config TEGRA114_SPI
251 bool "nVidia Tegra114 SPI driver"
252 help
253 Enable the nVidia Tegra114 SPI driver. This driver can be used to
254 access the SPI NOR flash on platforms embedding this nVidia Tegra114
255 IP core.
256
257 This controller is different than the older SoCs SPI controller and
258 also register interface get changed with this controller.
259
Jagan Teki2f3e6f82015-06-27 16:04:05 +0530[diff] [blame]260config TEGRA20_SFLASH
261 bool "nVidia Tegra20 Serial Flash controller driver"
262 help
263 Enable the nVidia Tegra20 Serial Flash controller driver. This driver
264 can be used to access the SPI NOR flash on platforms embedding this
265 nVidia Tegra20 IP core.
266
Jagan Teki44958302015-06-27 16:07:54 +0530[diff] [blame]267config TEGRA20_SLINK
268 bool "nVidia Tegra20/Tegra30 SLINK driver"
269 help
270 Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
271 be used to access the SPI NOR flash on platforms embedding this
272 nVidia Tegra20/Tegra30 IP cores.
273
Tom Warren4e675ff2015-10-12 14:50:54 -0700[diff] [blame]274config TEGRA210_QSPI
275 bool "nVidia Tegra210 QSPI driver"
276 help
277 Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
278 be used to access SPI chips on platforms embedding this
279 NVIDIA Tegra210 IP core.
280
Vignesh Raghavendra61ae9782019-04-16 21:31:59 +0530[diff] [blame]281config TI_QSPI
282 bool "TI QSPI driver"
283 imply TI_EDMA3
284 help
285 Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
286 This driver support spi flash single, quad and memory reads.
287
Jagan Teki075143d2015-06-27 04:32:43 +0530[diff] [blame]288config XILINX_SPI
289 bool "Xilinx SPI driver"
Jagan Teki075143d2015-06-27 04:32:43 +0530[diff] [blame]290 help
291 Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
292 controller support 8 bit SPI transfers only, with or w/o FIFO.
293 For more info on Xilinx SPI Register Definitions and Overview
294 see driver file - drivers/spi/xilinx_spi.c
295
Jagan Tekidf30a422015-06-27 00:51:38 +0530[diff] [blame]296config ZYNQ_SPI
297 bool "Zynq SPI driver"
Michal Simekec48b6c2018-08-22 14:55:27 +0200[diff] [blame]298 depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
Jagan Tekidf30a422015-06-27 00:51:38 +0530[diff] [blame]299 help
300 Enable the Zynq SPI driver. This driver can be used to
301 access the SPI NOR flash on platforms embedding this Zynq
302 SPI IP core.
Jagan Tekide823052015-06-27 22:35:14 +0530[diff] [blame]303
Jagan Teki78a025a2015-08-16 00:19:38 +0530[diff] [blame]304config ZYNQ_QSPI
305 bool "Zynq QSPI driver"
306 depends on ARCH_ZYNQ
Vignesh R6d825172019-02-05 11:29:28 +0530[diff] [blame]307 imply SPI_FLASH_BAR
Jagan Teki78a025a2015-08-16 00:19:38 +0530[diff] [blame]308 help
309 Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
310 used to access the SPI NOR flash on platforms embedding this
311 Zynq QSPI IP core. This IP is used to connect the flash in
312 4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
313
Siva Durga Prasad Paladugu22cca172018-07-04 17:31:23 +0530[diff] [blame]314config ZYNQMP_GQSPI
315 bool "Configure ZynqMP Generic QSPI"
Michal Simekec48b6c2018-08-22 14:55:27 +0200[diff] [blame]316 depends on ARCH_ZYNQMP || ARCH_VERSAL
Siva Durga Prasad Paladugu22cca172018-07-04 17:31:23 +0530[diff] [blame]317 help
318 This option is used to enable ZynqMP QSPI controller driver which
319 is used to communicate with qspi flash devices.
320
Jagan Tekie4976af2015-06-27 22:37:00 +0530[diff] [blame]321endif # if DM_SPI
322
Peng Fan41eb8ff2017-04-13 14:09:55 +0800[diff] [blame]323config SOFT_SPI
324 bool "Soft SPI driver"
Jagan Teki32f70d62019-05-29 17:01:34 -0400[diff] [blame]325 depends on DM_SPI || (DEPRECATED && !DM_SPI)
Peng Fan41eb8ff2017-04-13 14:09:55 +0800[diff] [blame]326 help
327 Enable Soft SPI driver. This driver is to use GPIO simulate
328 the SPI protocol.
329
Lars Povlsenfd6e0b02019-01-08 10:38:33 +0100[diff] [blame]330config MSCC_BB_SPI
331 bool "MSCC bitbang SPI driver"
332 depends on SOC_VCOREIII
333 help
334 Enable MSCC bitbang SPI driver. This driver can be used on
335 MSCC SOCs.
336
Tuomas Tynkkynenfbca0e62018-02-07 02:42:23 +0200[diff] [blame]337config CF_SPI
338 bool "ColdFire SPI driver"
339 help
340 Enable the ColdFire SPI driver. This driver can be used on
341 some m68k SoCs.
342
Jagan Teki3debffa2015-06-27 15:21:36 +0530[diff] [blame]343config FSL_ESPI
344 bool "Freescale eSPI driver"
345 help
346 Enable the Freescale eSPI driver. This driver can be used to
347 access the SPI interface and SPI NOR flash on platforms embedding
348 this Freescale eSPI IP core.
349
Jagan Teki21b1dd12016-09-03 12:58:33 +0530[diff] [blame]350config FSL_QSPI
351 bool "Freescale QSPI driver"
Vignesh R6d825172019-02-05 11:29:28 +0530[diff] [blame]352 imply SPI_FLASH_BAR
Jagan Teki21b1dd12016-09-03 12:58:33 +0530[diff] [blame]353 help
354 Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
355 used to access the SPI NOR flash on platforms embedding this
356 Freescale IP core.
357
Adam Ford26410c12017-12-30 07:33:42 -0600[diff] [blame]358config DAVINCI_SPI
359 bool "Davinci & Keystone SPI driver"
360 depends on ARCH_DAVINCI || ARCH_KEYSTONE
361 help
362 Enable the Davinci SPI driver
363
Tuomas Tynkkynen95d38772018-02-07 02:42:16 +0200[diff] [blame]364config SH_SPI
365 bool "SuperH SPI driver"
Jagan Tekie1247592019-05-29 17:01:33 -0400[diff] [blame]366 depends on DEPRECATED
Tuomas Tynkkynen95d38772018-02-07 02:42:16 +0200[diff] [blame]367 help
368 Enable the SuperH SPI controller driver. This driver can be used
369 on various SuperH SoCs, such as SH7757.
370
Tuomas Tynkkynena5dfabe2018-02-07 02:42:17 +0200[diff] [blame]371config SH_QSPI
372 bool "Renesas Quad SPI driver"
373 help
374 Enable the Renesas Quad SPI controller driver. This driver can be
375 used on Renesas SoCs.
376
Tuomas Tynkkynen4a942f42018-02-07 02:42:22 +0200[diff] [blame]377config KIRKWOOD_SPI
378 bool "Marvell Kirkwood SPI Driver"
379 help
380 Enable support for SPI on various Marvell SoCs, such as
381 Kirkwood and Armada 375.
382
Tuomas Tynkkynen2c4b0962018-02-07 02:42:21 +0200[diff] [blame]383config LPC32XX_SSP
384 bool "LPC32XX SPI Driver"
Jagan Tekiea73ec02019-05-29 17:01:35 -0400[diff] [blame]385 depends on DEPRECATED
Tuomas Tynkkynen2c4b0962018-02-07 02:42:21 +0200[diff] [blame]386 help
387 Enable support for SPI on LPC32xx
388
Tuomas Tynkkynen60e54562018-02-07 02:42:19 +0200[diff] [blame]389config MXC_SPI
390 bool "MXC SPI Driver"
391 help
392 Enable the MXC SPI controller driver. This driver can be used
393 on various i.MX SoCs such as i.MX31/35/51/6/7.
394
Tuomas Tynkkynen7b819b52018-02-07 02:42:18 +0200[diff] [blame]395config MXS_SPI
396 bool "MXS SPI Driver"
Jagan Tekid5ded322019-05-29 17:01:32 -0400[diff] [blame]397 depends on DEPRECATED
Tuomas Tynkkynen7b819b52018-02-07 02:42:18 +0200[diff] [blame]398 help
399 Enable the MXS SPI controller driver. This driver can be used
400 on the i.MX23 and i.MX28 SoCs.
401
Adam Forda41e3e12017-07-26 22:25:29 -0500[diff] [blame]402config OMAP3_SPI
403 bool "McSPI driver for OMAP"
404 help
405 SPI master controller for OMAP24XX and later Multichannel SPI
406 (McSPI). This driver be used to access SPI chips on platforms
407 embedding this OMAP3 McSPI IP core.
408
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]409endif # menu "SPI Support"