blob: 17866a244b3a9d8dbcb38c1f703bfc626f5f2b74 [file] [log] [blame]
Andy Fleming5f184712011-04-08 02:10:27 -05001/*
2 * Generic PHY Management code
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming5f184712011-04-08 02:10:27 -05005 *
6 * Copyright 2011 Freescale Semiconductor, Inc.
7 * author Andy Fleming
8 *
9 * Based loosely off of Linux's PHY Lib
10 */
11
12#include <config.h>
13#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070014#include <console.h>
Simon Glassc74c8e62015-04-05 16:07:39 -060015#include <dm.h>
Andy Fleming5f184712011-04-08 02:10:27 -050016#include <malloc.h>
17#include <net.h>
18#include <command.h>
19#include <miiphy.h>
20#include <phy.h>
21#include <errno.h>
Troy Kisky1adb4062012-10-22 16:40:43 +000022#include <linux/err.h>
Shengzhou Liu597fe042014-04-11 16:14:17 +080023#include <linux/compiler.h>
Andy Fleming5f184712011-04-08 02:10:27 -050024
Michal Simekabbfcbe2015-05-13 13:40:40 +020025DECLARE_GLOBAL_DATA_PTR;
26
Andy Fleming5f184712011-04-08 02:10:27 -050027/* Generic PHY support and helper functions */
28
29/**
30 * genphy_config_advert - sanitize and advertise auto-negotation parameters
31 * @phydev: target phy_device struct
32 *
33 * Description: Writes MII_ADVERTISE with the appropriate values,
34 * after sanitizing the values to make sure we only advertise
35 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
36 * hasn't changed, and > 0 if it has changed.
37 */
Kim Phillips960d70c2012-10-29 13:34:34 +000038static int genphy_config_advert(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -050039{
40 u32 advertise;
Florian Fainellibbdcaff2016-01-13 16:59:31 +030041 int oldadv, adv, bmsr;
Andy Fleming5f184712011-04-08 02:10:27 -050042 int err, changed = 0;
43
Florian Fainellibbdcaff2016-01-13 16:59:31 +030044 /* Only allow advertising what this PHY supports */
Andy Fleming5f184712011-04-08 02:10:27 -050045 phydev->advertising &= phydev->supported;
46 advertise = phydev->advertising;
47
48 /* Setup standard advertisement */
Florian Fainellibbdcaff2016-01-13 16:59:31 +030049 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
50 oldadv = adv;
Andy Fleming5f184712011-04-08 02:10:27 -050051
52 if (adv < 0)
53 return adv;
54
55 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
56 ADVERTISE_PAUSE_ASYM);
57 if (advertise & ADVERTISED_10baseT_Half)
58 adv |= ADVERTISE_10HALF;
59 if (advertise & ADVERTISED_10baseT_Full)
60 adv |= ADVERTISE_10FULL;
61 if (advertise & ADVERTISED_100baseT_Half)
62 adv |= ADVERTISE_100HALF;
63 if (advertise & ADVERTISED_100baseT_Full)
64 adv |= ADVERTISE_100FULL;
65 if (advertise & ADVERTISED_Pause)
66 adv |= ADVERTISE_PAUSE_CAP;
67 if (advertise & ADVERTISED_Asym_Pause)
68 adv |= ADVERTISE_PAUSE_ASYM;
Charles Coldwellde1d7862013-02-21 08:25:52 -050069 if (advertise & ADVERTISED_1000baseX_Half)
70 adv |= ADVERTISE_1000XHALF;
71 if (advertise & ADVERTISED_1000baseX_Full)
72 adv |= ADVERTISE_1000XFULL;
Andy Fleming5f184712011-04-08 02:10:27 -050073
74 if (adv != oldadv) {
75 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
76
77 if (err < 0)
78 return err;
79 changed = 1;
80 }
81
Florian Fainellibbdcaff2016-01-13 16:59:31 +030082 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
83 if (bmsr < 0)
84 return bmsr;
85
86 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
87 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
88 * logical 1.
89 */
90 if (!(bmsr & BMSR_ESTATEN))
91 return changed;
92
Andy Fleming5f184712011-04-08 02:10:27 -050093 /* Configure gigabit if it's supported */
Florian Fainellibbdcaff2016-01-13 16:59:31 +030094 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
95 oldadv = adv;
96
97 if (adv < 0)
98 return adv;
99
100 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
101
Andy Fleming5f184712011-04-08 02:10:27 -0500102 if (phydev->supported & (SUPPORTED_1000baseT_Half |
103 SUPPORTED_1000baseT_Full)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500104 if (advertise & SUPPORTED_1000baseT_Half)
105 adv |= ADVERTISE_1000HALF;
106 if (advertise & SUPPORTED_1000baseT_Full)
107 adv |= ADVERTISE_1000FULL;
Andy Fleming5f184712011-04-08 02:10:27 -0500108 }
109
Florian Fainellibbdcaff2016-01-13 16:59:31 +0300110 if (adv != oldadv)
111 changed = 1;
112
113 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
114 if (err < 0)
115 return err;
116
Andy Fleming5f184712011-04-08 02:10:27 -0500117 return changed;
118}
119
120
121/**
122 * genphy_setup_forced - configures/forces speed/duplex from @phydev
123 * @phydev: target phy_device struct
124 *
125 * Description: Configures MII_BMCR to force speed/duplex
126 * to the values in phydev. Assumes that the values are valid.
127 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000128static int genphy_setup_forced(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500129{
130 int err;
Alexandre Messier53b0c382016-01-22 14:16:15 -0500131 int ctl = BMCR_ANRESTART;
Andy Fleming5f184712011-04-08 02:10:27 -0500132
133 phydev->pause = phydev->asym_pause = 0;
134
135 if (SPEED_1000 == phydev->speed)
136 ctl |= BMCR_SPEED1000;
137 else if (SPEED_100 == phydev->speed)
138 ctl |= BMCR_SPEED100;
139
140 if (DUPLEX_FULL == phydev->duplex)
141 ctl |= BMCR_FULLDPLX;
142
143 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
144
145 return err;
146}
147
148
149/**
150 * genphy_restart_aneg - Enable and Restart Autonegotiation
151 * @phydev: target phy_device struct
152 */
153int genphy_restart_aneg(struct phy_device *phydev)
154{
155 int ctl;
156
157 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
158
159 if (ctl < 0)
160 return ctl;
161
162 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
163
164 /* Don't isolate the PHY if we're negotiating */
165 ctl &= ~(BMCR_ISOLATE);
166
167 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
168
169 return ctl;
170}
171
172
173/**
174 * genphy_config_aneg - restart auto-negotiation or write BMCR
175 * @phydev: target phy_device struct
176 *
177 * Description: If auto-negotiation is enabled, we configure the
178 * advertising, and then restart auto-negotiation. If it is not
179 * enabled, then we write the BMCR.
180 */
181int genphy_config_aneg(struct phy_device *phydev)
182{
183 int result;
184
185 if (AUTONEG_ENABLE != phydev->autoneg)
186 return genphy_setup_forced(phydev);
187
188 result = genphy_config_advert(phydev);
189
190 if (result < 0) /* error */
191 return result;
192
193 if (result == 0) {
194 /* Advertisment hasn't changed, but maybe aneg was never on to
195 * begin with? Or maybe phy was isolated? */
196 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
197
198 if (ctl < 0)
199 return ctl;
200
201 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
202 result = 1; /* do restart aneg */
203 }
204
205 /* Only restart aneg if we are advertising something different
206 * than we were before. */
207 if (result > 0)
208 result = genphy_restart_aneg(phydev);
209
210 return result;
211}
212
213/**
214 * genphy_update_link - update link status in @phydev
215 * @phydev: target phy_device struct
216 *
217 * Description: Update the value in phydev->link to reflect the
218 * current link value. In order to do this, we need to read
219 * the status register twice, keeping the second value.
220 */
221int genphy_update_link(struct phy_device *phydev)
222{
223 unsigned int mii_reg;
224
225 /*
226 * Wait if the link is up, and autonegotiation is in progress
227 * (ie - we're capable and it's not done)
228 */
229 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
230
231 /*
232 * If we already saw the link up, and it hasn't gone down, then
233 * we don't need to wait for autoneg again
234 */
235 if (phydev->link && mii_reg & BMSR_LSTATUS)
236 return 0;
237
Alexandre Messier1f9e6722016-01-22 14:16:56 -0500238 if ((phydev->autoneg == AUTONEG_ENABLE) &&
239 !(mii_reg & BMSR_ANEGCOMPLETE)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500240 int i = 0;
241
242 printf("%s Waiting for PHY auto negotiation to complete",
243 phydev->dev->name);
244 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
245 /*
246 * Timeout reached ?
247 */
248 if (i > PHY_ANEG_TIMEOUT) {
249 printf(" TIMEOUT !\n");
250 phydev->link = 0;
251 return 0;
252 }
253
254 if (ctrlc()) {
255 puts("user interrupt!\n");
256 phydev->link = 0;
257 return -EINTR;
258 }
259
260 if ((i++ % 500) == 0)
261 printf(".");
262
263 udelay(1000); /* 1 ms */
264 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
265 }
266 printf(" done\n");
267 phydev->link = 1;
268 } else {
269 /* Read the link a second time to clear the latched state */
270 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
271
272 if (mii_reg & BMSR_LSTATUS)
273 phydev->link = 1;
274 else
275 phydev->link = 0;
276 }
277
278 return 0;
279}
280
281/*
282 * Generic function which updates the speed and duplex. If
283 * autonegotiation is enabled, it uses the AND of the link
284 * partner's advertised capabilities and our advertised
285 * capabilities. If autonegotiation is disabled, we use the
286 * appropriate bits in the control register.
287 *
288 * Stolen from Linux's mii.c and phy_device.c
289 */
Yegor Yefremove2043f52012-11-28 11:15:17 +0100290int genphy_parse_link(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500291{
292 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
293
294 /* We're using autonegotiation */
Alexandre Messier1f9e6722016-01-22 14:16:56 -0500295 if (phydev->autoneg == AUTONEG_ENABLE) {
Andy Fleming5f184712011-04-08 02:10:27 -0500296 u32 lpa = 0;
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200297 int gblpa = 0;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500298 u32 estatus = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500299
300 /* Check for gigabit capability */
David Dueck3a530d12013-11-05 17:23:02 +0100301 if (phydev->supported & (SUPPORTED_1000baseT_Full |
302 SUPPORTED_1000baseT_Half)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500303 /* We want a list of states supported by
304 * both PHYs in the link
305 */
306 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200307 if (gblpa < 0) {
308 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
309 gblpa = 0;
310 }
Andy Fleming5f184712011-04-08 02:10:27 -0500311 gblpa &= phy_read(phydev,
312 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313 }
314
315 /* Set the baseline so we only have to set them
316 * if they're different
317 */
318 phydev->speed = SPEED_10;
319 phydev->duplex = DUPLEX_HALF;
320
321 /* Check the gigabit fields */
322 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323 phydev->speed = SPEED_1000;
324
325 if (gblpa & PHY_1000BTSR_1000FD)
326 phydev->duplex = DUPLEX_FULL;
327
328 /* We're done! */
329 return 0;
330 }
331
332 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
Wolfgang Denk0dcfb0f2011-09-28 21:02:43 +0200335 if (lpa & (LPA_100FULL | LPA_100HALF)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500336 phydev->speed = SPEED_100;
337
Wolfgang Denk0dcfb0f2011-09-28 21:02:43 +0200338 if (lpa & LPA_100FULL)
339 phydev->duplex = DUPLEX_FULL;
340
341 } else if (lpa & LPA_10FULL)
Andy Fleming5f184712011-04-08 02:10:27 -0500342 phydev->duplex = DUPLEX_FULL;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500343
Sascha Silbe9ba30f62013-07-19 12:25:10 +0200344 /*
345 * Extended status may indicate that the PHY supports
346 * 1000BASE-T/X even though the 1000BASE-T registers
347 * are missing. In this case we can't tell whether the
348 * peer also supports it, so we only check extended
349 * status if the 1000BASE-T registers are actually
350 * missing.
351 */
352 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
Charles Coldwellde1d7862013-02-21 08:25:52 -0500353 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
354 MII_ESTATUS);
355
356 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
357 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
358 phydev->speed = SPEED_1000;
359 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
360 phydev->duplex = DUPLEX_FULL;
361 }
362
Andy Fleming5f184712011-04-08 02:10:27 -0500363 } else {
364 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
365
366 phydev->speed = SPEED_10;
367 phydev->duplex = DUPLEX_HALF;
368
369 if (bmcr & BMCR_FULLDPLX)
370 phydev->duplex = DUPLEX_FULL;
371
372 if (bmcr & BMCR_SPEED1000)
373 phydev->speed = SPEED_1000;
374 else if (bmcr & BMCR_SPEED100)
375 phydev->speed = SPEED_100;
376 }
377
378 return 0;
379}
380
381int genphy_config(struct phy_device *phydev)
382{
383 int val;
384 u32 features;
385
Andy Fleming5f184712011-04-08 02:10:27 -0500386 features = (SUPPORTED_TP | SUPPORTED_MII
387 | SUPPORTED_AUI | SUPPORTED_FIBRE |
388 SUPPORTED_BNC);
389
390 /* Do we support autonegotiation? */
391 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
392
393 if (val < 0)
394 return val;
395
396 if (val & BMSR_ANEGCAPABLE)
397 features |= SUPPORTED_Autoneg;
398
399 if (val & BMSR_100FULL)
400 features |= SUPPORTED_100baseT_Full;
401 if (val & BMSR_100HALF)
402 features |= SUPPORTED_100baseT_Half;
403 if (val & BMSR_10FULL)
404 features |= SUPPORTED_10baseT_Full;
405 if (val & BMSR_10HALF)
406 features |= SUPPORTED_10baseT_Half;
407
408 if (val & BMSR_ESTATEN) {
409 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
410
411 if (val < 0)
412 return val;
413
414 if (val & ESTATUS_1000_TFULL)
415 features |= SUPPORTED_1000baseT_Full;
416 if (val & ESTATUS_1000_THALF)
417 features |= SUPPORTED_1000baseT_Half;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500418 if (val & ESTATUS_1000_XFULL)
419 features |= SUPPORTED_1000baseX_Full;
420 if (val & ESTATUS_1000_XHALF)
Fabio Estevam9a5dad22013-07-19 10:01:34 -0300421 features |= SUPPORTED_1000baseX_Half;
Andy Fleming5f184712011-04-08 02:10:27 -0500422 }
423
Sascha Hauer44bc3172016-01-13 16:59:32 +0300424 phydev->supported &= features;
425 phydev->advertising &= features;
Andy Fleming5f184712011-04-08 02:10:27 -0500426
427 genphy_config_aneg(phydev);
428
429 return 0;
430}
431
432int genphy_startup(struct phy_device *phydev)
433{
434 genphy_update_link(phydev);
435 genphy_parse_link(phydev);
436
437 return 0;
438}
439
440int genphy_shutdown(struct phy_device *phydev)
441{
442 return 0;
443}
444
445static struct phy_driver genphy_driver = {
446 .uid = 0xffffffff,
447 .mask = 0xffffffff,
448 .name = "Generic PHY",
Sascha Hauer44bc3172016-01-13 16:59:32 +0300449 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
450 SUPPORTED_AUI | SUPPORTED_FIBRE |
451 SUPPORTED_BNC,
Andy Fleming5f184712011-04-08 02:10:27 -0500452 .config = genphy_config,
453 .startup = genphy_startup,
454 .shutdown = genphy_shutdown,
455};
456
457static LIST_HEAD(phy_drivers);
458
459int phy_init(void)
460{
Shaohui Xief7c38cf2014-12-30 18:32:04 +0800461#ifdef CONFIG_PHY_AQUANTIA
462 phy_aquantia_init();
463#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500464#ifdef CONFIG_PHY_ATHEROS
465 phy_atheros_init();
466#endif
467#ifdef CONFIG_PHY_BROADCOM
468 phy_broadcom_init();
469#endif
Shengzhou Liu9b18e512014-11-10 18:32:29 +0800470#ifdef CONFIG_PHY_CORTINA
471 phy_cortina_init();
472#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500473#ifdef CONFIG_PHY_DAVICOM
474 phy_davicom_init();
475#endif
Matt Porterf485c8a2013-03-20 05:38:13 +0000476#ifdef CONFIG_PHY_ET1011C
477 phy_et1011c_init();
478#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500479#ifdef CONFIG_PHY_LXT
480 phy_lxt_init();
481#endif
482#ifdef CONFIG_PHY_MARVELL
483 phy_marvell_init();
484#endif
485#ifdef CONFIG_PHY_MICREL
486 phy_micrel_init();
487#endif
488#ifdef CONFIG_PHY_NATSEMI
489 phy_natsemi_init();
490#endif
491#ifdef CONFIG_PHY_REALTEK
492 phy_realtek_init();
493#endif
Nobuhiro Iwamatsu5751aa22011-11-23 21:24:15 +0000494#ifdef CONFIG_PHY_SMSC
495 phy_smsc_init();
496#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500497#ifdef CONFIG_PHY_TERANETICS
498 phy_teranetics_init();
499#endif
Edgar E. Iglesias721aed72015-09-25 23:46:08 -0700500#ifdef CONFIG_PHY_TI
501 phy_ti_init();
502#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500503#ifdef CONFIG_PHY_VITESSE
504 phy_vitesse_init();
505#endif
506
Andy Fleming5f184712011-04-08 02:10:27 -0500507 return 0;
508}
509
510int phy_register(struct phy_driver *drv)
511{
512 INIT_LIST_HEAD(&drv->list);
513 list_add_tail(&drv->list, &phy_drivers);
514
Michal Simekabbfcbe2015-05-13 13:40:40 +0200515#ifdef CONFIG_NEEDS_MANUAL_RELOC
516 if (drv->probe)
517 drv->probe += gd->reloc_off;
518 if (drv->config)
519 drv->config += gd->reloc_off;
520 if (drv->startup)
521 drv->startup += gd->reloc_off;
522 if (drv->shutdown)
523 drv->shutdown += gd->reloc_off;
524 if (drv->readext)
525 drv->readext += gd->reloc_off;
526 if (drv->writeext)
527 drv->writeext += gd->reloc_off;
528#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500529 return 0;
530}
531
Alexey Brodkinb18acb02016-01-13 16:59:34 +0300532int phy_set_supported(struct phy_device *phydev, u32 max_speed)
533{
534 /* The default values for phydev->supported are provided by the PHY
535 * driver "features" member, we want to reset to sane defaults first
536 * before supporting higher speeds.
537 */
538 phydev->supported &= PHY_DEFAULT_FEATURES;
539
540 switch (max_speed) {
541 default:
542 return -ENOTSUPP;
543 case SPEED_1000:
544 phydev->supported |= PHY_1000BT_FEATURES;
545 /* fall through */
546 case SPEED_100:
547 phydev->supported |= PHY_100BT_FEATURES;
548 /* fall through */
549 case SPEED_10:
550 phydev->supported |= PHY_10BT_FEATURES;
551 }
552
553 return 0;
554}
555
Kim Phillips960d70c2012-10-29 13:34:34 +0000556static int phy_probe(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500557{
558 int err = 0;
559
560 phydev->advertising = phydev->supported = phydev->drv->features;
561 phydev->mmds = phydev->drv->mmds;
562
563 if (phydev->drv->probe)
564 err = phydev->drv->probe(phydev);
565
566 return err;
567}
568
569static struct phy_driver *generic_for_interface(phy_interface_t interface)
570{
571#ifdef CONFIG_PHYLIB_10G
572 if (is_10g_interface(interface))
573 return &gen10g_driver;
574#endif
575
576 return &genphy_driver;
577}
578
Kim Phillips960d70c2012-10-29 13:34:34 +0000579static struct phy_driver *get_phy_driver(struct phy_device *phydev,
Andy Fleming5f184712011-04-08 02:10:27 -0500580 phy_interface_t interface)
581{
582 struct list_head *entry;
583 int phy_id = phydev->phy_id;
584 struct phy_driver *drv = NULL;
585
586 list_for_each(entry, &phy_drivers) {
587 drv = list_entry(entry, struct phy_driver, list);
588 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
589 return drv;
590 }
591
592 /* If we made it here, there's no driver for this PHY */
593 return generic_for_interface(interface);
594}
595
Kim Phillips960d70c2012-10-29 13:34:34 +0000596static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
Jörg Krause2c171a22015-07-15 14:58:49 +0200597 u32 phy_id,
Kim Phillips960d70c2012-10-29 13:34:34 +0000598 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500599{
600 struct phy_device *dev;
601
602 /* We allocate the device, and initialize the
603 * default values */
604 dev = malloc(sizeof(*dev));
605 if (!dev) {
606 printf("Failed to allocate PHY device for %s:%d\n",
607 bus->name, addr);
608 return NULL;
609 }
610
611 memset(dev, 0, sizeof(*dev));
612
613 dev->duplex = -1;
Mugunthan V N26d3acd2015-09-03 15:50:21 +0530614 dev->link = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500615 dev->interface = interface;
616
617 dev->autoneg = AUTONEG_ENABLE;
618
619 dev->addr = addr;
620 dev->phy_id = phy_id;
621 dev->bus = bus;
622
623 dev->drv = get_phy_driver(dev, interface);
624
625 phy_probe(dev);
626
627 bus->phymap[addr] = dev;
628
629 return dev;
630}
631
632/**
633 * get_phy_id - reads the specified addr for its ID.
634 * @bus: the target MII bus
635 * @addr: PHY address on the MII bus
636 * @phy_id: where to store the ID retrieved.
637 *
638 * Description: Reads the ID registers of the PHY at @addr on the
639 * @bus, stores it in @phy_id and returns zero on success.
640 */
Shengzhou Liu5707d5f2015-04-07 18:46:32 +0800641int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
Andy Fleming5f184712011-04-08 02:10:27 -0500642{
643 int phy_reg;
644
645 /* Grab the bits from PHYIR1, and put them
646 * in the upper half */
647 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
648
649 if (phy_reg < 0)
650 return -EIO;
651
652 *phy_id = (phy_reg & 0xffff) << 16;
653
654 /* Grab the bits from PHYIR2, and put them in the lower half */
655 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
656
657 if (phy_reg < 0)
658 return -EIO;
659
660 *phy_id |= (phy_reg & 0xffff);
661
662 return 0;
663}
664
Troy Kisky1adb4062012-10-22 16:40:43 +0000665static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
666 unsigned phy_mask, int devad, phy_interface_t interface)
667{
668 u32 phy_id = 0xffffffff;
669 while (phy_mask) {
670 int addr = ffs(phy_mask) - 1;
671 int r = get_phy_id(bus, addr, devad, &phy_id);
Troy Kisky1adb4062012-10-22 16:40:43 +0000672 /* If the PHY ID is mostly f's, we didn't find anything */
Cormier, Jonathan08be2832014-05-21 13:08:52 -0400673 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
Troy Kisky1adb4062012-10-22 16:40:43 +0000674 return phy_device_create(bus, addr, phy_id, interface);
675 phy_mask &= ~(1 << addr);
676 }
677 return NULL;
678}
679
680static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
681 unsigned phy_mask, phy_interface_t interface)
682{
683 /* If we have one, return the existing device, with new interface */
684 while (phy_mask) {
685 int addr = ffs(phy_mask) - 1;
686 if (bus->phymap[addr]) {
687 bus->phymap[addr]->interface = interface;
688 return bus->phymap[addr];
689 }
690 phy_mask &= ~(1 << addr);
691 }
692 return NULL;
693}
694
695static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
696 unsigned phy_mask, phy_interface_t interface)
697{
698 int i;
699 struct phy_device *phydev;
700
701 phydev = search_for_existing_phy(bus, phy_mask, interface);
702 if (phydev)
703 return phydev;
704 /* Try Standard (ie Clause 22) access */
705 /* Otherwise we have to try Clause 45 */
706 for (i = 0; i < 5; i++) {
707 phydev = create_phy_by_mask(bus, phy_mask,
708 i ? i : MDIO_DEVAD_NONE, interface);
709 if (IS_ERR(phydev))
710 return NULL;
711 if (phydev)
712 return phydev;
713 }
Bin Meng3e1949d2015-10-07 21:19:30 -0700714
715 debug("\n%s PHY: ", bus->name);
716 while (phy_mask) {
717 int addr = ffs(phy_mask) - 1;
718 debug("%d ", addr);
719 phy_mask &= ~(1 << addr);
720 }
721 debug("not found\n");
Bin Meng0132b9a2015-10-07 21:19:29 -0700722
723 return NULL;
Troy Kisky1adb4062012-10-22 16:40:43 +0000724}
725
Andy Fleming5f184712011-04-08 02:10:27 -0500726/**
727 * get_phy_device - reads the specified PHY device and returns its @phy_device struct
728 * @bus: the target MII bus
729 * @addr: PHY address on the MII bus
730 *
731 * Description: Reads the ID registers of the PHY at @addr on the
732 * @bus, then allocates and returns the phy_device to represent it.
733 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000734static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
735 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500736{
Troy Kisky1adb4062012-10-22 16:40:43 +0000737 return get_phy_device_by_mask(bus, 1 << addr, interface);
Andy Fleming5f184712011-04-08 02:10:27 -0500738}
739
740int phy_reset(struct phy_device *phydev)
741{
742 int reg;
743 int timeout = 500;
744 int devad = MDIO_DEVAD_NONE;
745
Shaohui Xieddcd1f32016-01-28 15:55:46 +0800746 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
747 return 0;
748
Andy Fleming5f184712011-04-08 02:10:27 -0500749#ifdef CONFIG_PHYLIB_10G
750 /* If it's 10G, we need to issue reset through one of the MMDs */
751 if (is_10g_interface(phydev->interface)) {
752 if (!phydev->mmds)
753 gen10g_discover_mmds(phydev);
754
755 devad = ffs(phydev->mmds) - 1;
756 }
757#endif
758
Stefan Agnera0580522015-12-09 11:21:25 -0800759 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
Andy Fleming5f184712011-04-08 02:10:27 -0500760 debug("PHY reset failed\n");
761 return -1;
762 }
763
764#ifdef CONFIG_PHY_RESET_DELAY
765 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
766#endif
767 /*
768 * Poll the control register for the reset bit to go to 0 (it is
769 * auto-clearing). This should happen within 0.5 seconds per the
770 * IEEE spec.
771 */
Stefan Agnera0580522015-12-09 11:21:25 -0800772 reg = phy_read(phydev, devad, MII_BMCR);
Andy Fleming5f184712011-04-08 02:10:27 -0500773 while ((reg & BMCR_RESET) && timeout--) {
774 reg = phy_read(phydev, devad, MII_BMCR);
775
776 if (reg < 0) {
777 debug("PHY status read failed\n");
778 return -1;
779 }
780 udelay(1000);
781 }
782
783 if (reg & BMCR_RESET) {
784 puts("PHY reset timed out\n");
785 return -1;
786 }
787
788 return 0;
789}
790
791int miiphy_reset(const char *devname, unsigned char addr)
792{
793 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
794 struct phy_device *phydev;
795
796 /*
797 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
798 * If later code tries to connect with the right interface, this will
799 * be corrected by get_phy_device in phy_connect()
800 */
801 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
802
803 return phy_reset(phydev);
804}
805
Troy Kisky1adb4062012-10-22 16:40:43 +0000806struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
807 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500808{
Andy Fleming5f184712011-04-08 02:10:27 -0500809 /* Reset the bus */
Jörg Krause59370f32015-07-15 15:18:22 +0200810 if (bus->reset) {
Vladimir Zapolskiye3a77212011-09-05 07:24:07 +0000811 bus->reset(bus);
Andy Fleming5f184712011-04-08 02:10:27 -0500812
Jörg Krause59370f32015-07-15 15:18:22 +0200813 /* Wait 15ms to make sure the PHY has come out of hard reset */
814 udelay(15000);
815 }
816
Troy Kisky1adb4062012-10-22 16:40:43 +0000817 return get_phy_device_by_mask(bus, phy_mask, interface);
818}
Andy Fleming5f184712011-04-08 02:10:27 -0500819
Simon Glassc74c8e62015-04-05 16:07:39 -0600820#ifdef CONFIG_DM_ETH
821void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
822#else
Troy Kisky1adb4062012-10-22 16:40:43 +0000823void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
Simon Glassc74c8e62015-04-05 16:07:39 -0600824#endif
Troy Kisky1adb4062012-10-22 16:40:43 +0000825{
Andy Fleming5f184712011-04-08 02:10:27 -0500826 /* Soft Reset the PHY */
827 phy_reset(phydev);
Bin Meng17ecfa92015-10-07 21:19:31 -0700828 if (phydev->dev && phydev->dev != dev) {
Andy Fleming5f184712011-04-08 02:10:27 -0500829 printf("%s:%d is connected to %s. Reconnecting to %s\n",
Troy Kisky1adb4062012-10-22 16:40:43 +0000830 phydev->bus->name, phydev->addr,
831 phydev->dev->name, dev->name);
832 }
Andy Fleming5f184712011-04-08 02:10:27 -0500833 phydev->dev = dev;
Wolfgang Denkb91a9d92011-07-24 21:39:10 +0000834 debug("%s connected to %s\n", dev->name, phydev->drv->name);
Troy Kisky1adb4062012-10-22 16:40:43 +0000835}
Andy Fleming5f184712011-04-08 02:10:27 -0500836
Simon Glassc74c8e62015-04-05 16:07:39 -0600837#ifdef CONFIG_DM_ETH
838struct phy_device *phy_connect(struct mii_dev *bus, int addr,
839 struct udevice *dev, phy_interface_t interface)
840#else
Troy Kisky1adb4062012-10-22 16:40:43 +0000841struct phy_device *phy_connect(struct mii_dev *bus, int addr,
842 struct eth_device *dev, phy_interface_t interface)
Simon Glassc74c8e62015-04-05 16:07:39 -0600843#endif
Troy Kisky1adb4062012-10-22 16:40:43 +0000844{
845 struct phy_device *phydev;
846
847 phydev = phy_find_by_mask(bus, 1 << addr, interface);
848 if (phydev)
849 phy_connect_dev(phydev, dev);
850 else
851 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
Andy Fleming5f184712011-04-08 02:10:27 -0500852 return phydev;
853}
854
Timur Tabi6e5b9ac2012-07-05 10:33:18 +0000855/*
856 * Start the PHY. Returns 0 on success, or a negative error code.
857 */
Andy Fleming5f184712011-04-08 02:10:27 -0500858int phy_startup(struct phy_device *phydev)
859{
860 if (phydev->drv->startup)
Timur Tabi6e5b9ac2012-07-05 10:33:18 +0000861 return phydev->drv->startup(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500862
863 return 0;
864}
865
Jeroen Hofstee3c6928f2014-10-08 22:57:26 +0200866__weak int board_phy_config(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500867{
Troy Kisky9fafe7d2012-02-07 14:08:49 +0000868 if (phydev->drv->config)
869 return phydev->drv->config(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500870 return 0;
871}
872
Andy Fleming5f184712011-04-08 02:10:27 -0500873int phy_config(struct phy_device *phydev)
874{
Andy Fleming5f184712011-04-08 02:10:27 -0500875 /* Invoke an optional board-specific helper */
876 board_phy_config(phydev);
877
878 return 0;
879}
880
881int phy_shutdown(struct phy_device *phydev)
882{
883 if (phydev->drv->shutdown)
884 phydev->drv->shutdown(phydev);
885
886 return 0;
887}
Simon Glassc74c8e62015-04-05 16:07:39 -0600888
889int phy_get_interface_by_name(const char *str)
890{
891 int i;
892
893 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
894 if (!strcmp(str, phy_interface_strings[i]))
895 return i;
896 }
897
898 return -1;
899}