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Daniel Gorsulowski44d80252010-01-25 10:50:41 +01001/*
Daniel Gorsulowskia950c812011-04-18 04:15:02 +00002 * (C) Copyright 2010-2011
Daniel Gorsulowski44d80252010-01-25 10:50:41 +01003 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
4 * esd electronic system design gmbh <www.esd.eu>
5 *
6 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01007 * Stelian Pop <stelian@popies.net>
Daniel Gorsulowski44d80252010-01-25 10:50:41 +01008 * Lead Tech Design <www.leadtechdesign.com>
9 *
10 * Configuation settings for the esd OTC570 board.
11 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000018/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
23
24/*
25 * Warning: changing CONFIG_SYS_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
30#define CONFIG_SYS_TEXT_BASE 0x20002000
31
Daniel Gorsulowskib2f26482011-10-30 22:52:29 +000032/*
33 * since a number of boards are not being listed in linux
34 * arch/arm/tools/mach-types any more, the mach-types have to be
35 * defined here
36 */
37#define MACH_TYPE_OTC570 2166
38
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000039/* ARM asynchronous clock */
40#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
Daniel Gorsulowski9f07ded2010-08-09 11:17:13 +020041#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010042#define CONFIG_SYS_HZ 1000 /* decrementer freq */
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010043
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000044/* Misc CPU related */
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010045#define CONFIG_SKIP_LOWLEVEL_INIT
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010046#define CONFIG_ARCH_CPU_INIT
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000047#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
48#define CONFIG_SETUP_MEMORY_TAGS
49#define CONFIG_INITRD_TAG
50#define CONFIG_SERIAL_TAG
51#define CONFIG_REVISION_TAG
52#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
53#define CONFIG_MISC_INIT_R /* Call misc_init_r */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000054
55#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
56#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
57#define CONFIG_PREBOOT /* enable preboot variable */
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010058
59/*
60 * Hardware drivers
61 */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000062
63/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
64#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
65
66/* general purpose I/O */
67#define CONFIG_AT91_GPIO
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010068
69/* Console output */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000070#define CONFIG_ATMEL_USART
71#define CONFIG_USART_BASE ATMEL_BASE_DBGU
72#define CONFIG_USART_ID ATMEL_ID_SYS
73#define CONFIG_BAUDRATE 115200
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010074
75#define CONFIG_BOOTDELAY 3
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000076#define CONFIG_ZERO_BOOTDELAY_CHECK
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010077
78/* LCD */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000079#define CONFIG_LCD
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010080#undef CONFIG_SPLASH_SCREEN
81
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000082#ifdef CONFIG_LCD
83# define LCD_BPP LCD_COLOR8
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010084
Daniel Gorsulowskia950c812011-04-18 04:15:02 +000085# ifndef CONFIG_SPLASH_SCREEN
86# define CONFIG_LCD_LOGO
87# define CONFIG_LCD_INFO
88# undef CONFIG_LCD_INFO_BELOW_LOGO
89# endif /* CONFIG_SPLASH_SCREEN */
90
91# undef LCD_TEST_PATTERN
92# define CONFIG_SYS_WHITE_ON_BLACK
93# define CONFIG_ATMEL_LCD
94# define CONFIG_SYS_CONSOLE_IS_IN_ENV
95# define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
96# define CONFIG_CMD_BMP
97#endif /* CONFIG_LCD */
Daniel Gorsulowski44d80252010-01-25 10:50:41 +010098
99/* RTC and I2C stuff */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000100#define CONFIG_RTC_DS1338
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100101#define CONFIG_SYS_I2C_RTC_ADDR 0x68
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100102
Heiko Schocherea818db2013-01-29 08:53:15 +0100103#define CONFIG_SYS_I2C
104#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
105#ifdef CONFIG_SYS_I2C_SOFT
106#define CONFIG_SYS_I2C_SOFT_SPEED 100000
107#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
108
Daniel Gorsulowski6258b042010-02-11 14:57:04 +0100109/* Configure data and clock pins for pio */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000110# define I2C_INIT { \
Daniel Gorsulowski6258b042010-02-11 14:57:04 +0100111 at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
112 at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100113}
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000114# define I2C_SOFT_DECLARATIONS
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100115/* Configure data pin as output */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000116# define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100117/* Configure data pin as input */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000118# define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100119/* Read data pin */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000120# define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100121/* Set data pin */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000122# define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100123/* Set clock pin */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000124# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
125# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
Heiko Schocherea818db2013-01-29 08:53:15 +0100126#endif /* CONFIG_SYS_I2C_SOFT */
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100127
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100128/*
129 * BOOTP options
130 */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000131#define CONFIG_BOOTP_BOOTFILESIZE
132#define CONFIG_BOOTP_BOOTPATH
133#define CONFIG_BOOTP_GATEWAY
134#define CONFIG_BOOTP_HOSTNAME
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100135
136/*
137 * Command line configuration.
138 */
139#include <config_cmd_default.h>
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100140#undef CONFIG_CMD_FPGA
141#undef CONFIG_CMD_LOADS
142#undef CONFIG_CMD_IMLS
143
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000144#define CONFIG_CMD_PING
145#define CONFIG_CMD_DHCP
146#define CONFIG_CMD_NAND
147#define CONFIG_CMD_USB
148#define CONFIG_CMD_I2C
149#define CONFIG_CMD_DATE
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100150
151/* LED */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000152#define CONFIG_AT91_LED
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100153
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000154/*
155 * SDRAM: 1 bank, min 32, max 128 MB
156 * Initialized before u-boot gets started.
157 */
158#define CONFIG_NR_DRAM_BANKS 1
159#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
160#define CONFIG_SYS_SDRAM_SIZE 0x04000000
161
162#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
163#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
164#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
165
166/*
167 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
168 * leaving the correct space for initial global data structure above
169 * that address while providing maximum stack area below.
170 */
171#define CONFIG_SYS_INIT_SP_ADDR \
172 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100173
174/* DataFlash */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000175#ifdef CONFIG_SYS_USE_DATAFLASH
176# define CONFIG_ATMEL_DATAFLASH_SPI
177# define CONFIG_HAS_DATAFLASH
178# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
179# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
180# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
181# define AT91_SPI_CLK 15000000
182# define DATAFLASH_TCSS (0x1a << 16)
183# define DATAFLASH_TCHS (0x1 << 24)
184#endif
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100185
186/* NOR flash is not populated, disable it */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000187#define CONFIG_SYS_NO_FLASH
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100188
189/* NAND flash */
190#ifdef CONFIG_CMD_NAND
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000191# define CONFIG_NAND_ATMEL
192# define CONFIG_SYS_MAX_NAND_DEVICE 1
193# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
194# define CONFIG_SYS_NAND_DBW_8
195# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
196# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
197# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
198# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100199#endif
200
201/* Ethernet */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000202#define CONFIG_MACB
203#define CONFIG_RMII
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000204#define CONFIG_FIT
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100205#define CONFIG_NET_RETRY_COUNT 20
206#undef CONFIG_RESET_PHY_R
207
208/* USB */
209#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +0800210#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000211#define CONFIG_USB_OHCI_NEW
212#define CONFIG_DOS_PARTITION
213#define CONFIG_SYS_USB_OHCI_CPU_INIT
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100214#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
215#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
216#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000217#define CONFIG_USB_STORAGE
218#define CONFIG_CMD_FAT
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100219
220/* CAN */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000221#define CONFIG_AT91_CAN
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100222
223/* hw-controller addresses */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000224#define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
225
226#ifdef CONFIG_SYS_USE_DATAFLASH
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100227
228/* bootstrap + u-boot + env in dataflash on CS0 */
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000229# define CONFIG_ENV_IS_IN_DATAFLASH
230# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100231 0x8400)
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000232# define CONFIG_ENV_OFFSET 0x4200
233# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100234 CONFIG_ENV_OFFSET)
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000235# define CONFIG_ENV_SIZE 0x4200
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100236
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000237#elif CONFIG_SYS_USE_NANDFLASH
238
239/* bootstrap + u-boot + env + linux in nandflash */
240# define CONFIG_ENV_IS_IN_NAND 1
241# define CONFIG_ENV_OFFSET 0xC0000
242# define CONFIG_ENV_SIZE 0x20000
243
244#endif
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100245
246#define CONFIG_SYS_PROMPT "=> "
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000247#define CONFIG_SYS_CBSIZE 512
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100248#define CONFIG_SYS_MAXARGS 16
249#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
250 sizeof(CONFIG_SYS_PROMPT) + 16)
Daniel Gorsulowskia950c812011-04-18 04:15:02 +0000251#define CONFIG_SYS_LONGHELP
252#define CONFIG_CMDLINE_EDITING
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100253
254/*
255 * Size of malloc() pool
256 */
257#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
258 128*1024, 0x1000)
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100259
Daniel Gorsulowski44d80252010-01-25 10:50:41 +0100260#endif