Joel Stanley | 3167b4d | 2022-09-26 15:35:58 +0930 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Common LiteX header providing |
| 4 | * helper functions for accessing CSRs. |
| 5 | * |
| 6 | * Copyright (C) 2019-2020 Antmicro <www.antmicro.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef _LINUX_LITEX_H |
| 10 | #define _LINUX_LITEX_H |
| 11 | |
| 12 | #include <linux/io.h> |
| 13 | #include <asm/byteorder.h> |
| 14 | |
| 15 | static inline void _write_litex_subregister(u32 val, void __iomem *addr) |
| 16 | { |
| 17 | writel((u32 __force)cpu_to_le32(val), addr); |
| 18 | } |
| 19 | |
| 20 | static inline u32 _read_litex_subregister(void __iomem *addr) |
| 21 | { |
| 22 | return le32_to_cpu((__le32 __force)readl(addr)); |
| 23 | } |
| 24 | |
| 25 | /* |
| 26 | * LiteX SoC Generator, depending on the configuration, can split a single |
| 27 | * logical CSR (Control&Status Register) into a series of consecutive physical |
| 28 | * registers. |
| 29 | * |
| 30 | * For example, in the configuration with 8-bit CSR Bus, a 32-bit aligned, |
| 31 | * 32-bit wide logical CSR will be laid out as four 32-bit physical |
| 32 | * subregisters, each one containing one byte of meaningful data. |
| 33 | * |
| 34 | * For Linux support, upstream LiteX enforces a 32-bit wide CSR bus, which |
| 35 | * means that only larger-than-32-bit CSRs will be split across multiple |
| 36 | * subregisters (e.g., a 64-bit CSR will be spread across two consecutive |
| 37 | * 32-bit subregisters). |
| 38 | * |
| 39 | * For details see: https://github.com/enjoy-digital/litex/wiki/CSR-Bus |
| 40 | */ |
| 41 | |
| 42 | static inline void litex_write8(void __iomem *reg, u8 val) |
| 43 | { |
| 44 | _write_litex_subregister(val, reg); |
| 45 | } |
| 46 | |
| 47 | static inline void litex_write16(void __iomem *reg, u16 val) |
| 48 | { |
| 49 | _write_litex_subregister(val, reg); |
| 50 | } |
| 51 | |
| 52 | static inline void litex_write32(void __iomem *reg, u32 val) |
| 53 | { |
| 54 | _write_litex_subregister(val, reg); |
| 55 | } |
| 56 | |
| 57 | static inline void litex_write64(void __iomem *reg, u64 val) |
| 58 | { |
| 59 | _write_litex_subregister(val >> 32, reg); |
| 60 | _write_litex_subregister(val, reg + 4); |
| 61 | } |
| 62 | |
| 63 | static inline u8 litex_read8(void __iomem *reg) |
| 64 | { |
| 65 | return _read_litex_subregister(reg); |
| 66 | } |
| 67 | |
| 68 | static inline u16 litex_read16(void __iomem *reg) |
| 69 | { |
| 70 | return _read_litex_subregister(reg); |
| 71 | } |
| 72 | |
| 73 | static inline u32 litex_read32(void __iomem *reg) |
| 74 | { |
| 75 | return _read_litex_subregister(reg); |
| 76 | } |
| 77 | |
| 78 | static inline u64 litex_read64(void __iomem *reg) |
| 79 | { |
| 80 | return ((u64)_read_litex_subregister(reg) << 32) | |
| 81 | _read_litex_subregister(reg + 4); |
| 82 | } |
| 83 | |
| 84 | #endif /* _LINUX_LITEX_H */ |