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Michael Schwingenbc243452008-01-16 19:51:55 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * Configuration settings for the AcTux-3 board.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Michael Schwingenbc243452008-01-16 19:51:55 +01008 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13#define CONFIG_IXP425 1
14#define CONFIG_ACTUX3 1
15
Marek Vasut8e807ec2012-03-06 00:45:35 +010016#define CONFIG_MACH_TYPE 1481
17
Michael Schwingenbc243452008-01-16 19:51:55 +010018#define CONFIG_DISPLAY_CPUINFO 1
19#define CONFIG_DISPLAY_BOARDINFO 1
20
Jean-Christophe PLAGNIOL-VILLARD930590f2009-01-31 09:10:48 +010021#define CONFIG_IXP_SERIAL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020022#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
Michael Schwingenbc243452008-01-16 19:51:55 +010023#define CONFIG_BAUDRATE 115200
24#define CONFIG_BOOTDELAY 3
25#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +020026#define CONFIG_BOARD_EARLY_INIT_F 1
27#define CONFIG_SYS_LDSCRIPT "board/actux3/u-boot.lds"
Michael Schwingenbc243452008-01-16 19:51:55 +010028
29/***************************************************************
30 * U-boot generic defines start here.
31 ***************************************************************/
Michael Schwingenbc243452008-01-16 19:51:55 +010032/* Size of malloc() pool */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020033#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
Michael Schwingenbc243452008-01-16 19:51:55 +010034
35/* allow to overwrite serial and ethaddr */
36#define CONFIG_ENV_OVERWRITE
37
38/* Command line configuration. */
39#include <config_cmd_default.h>
40
41#define CONFIG_CMD_ELF
42
43#define CONFIG_BOOTCOMMAND "run boot_flash"
44/* enable passing of ATAGs */
45#define CONFIG_CMDLINE_TAG 1
46#define CONFIG_SETUP_MEMORY_TAGS 1
47#define CONFIG_INITRD_TAG 1
48#define CONFIG_REVISION_TAG 1
49
50#if defined(CONFIG_CMD_KGDB)
51# define CONFIG_KGDB_BAUDRATE 230400
52/* which serial port to use */
53# define CONFIG_KGDB_SER_INDEX 1
54#endif
55
56/* Miscellaneous configurable options */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define CONFIG_SYS_LONGHELP
Michael Schwingenbc243452008-01-16 19:51:55 +010058/* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020059#define CONFIG_SYS_CBSIZE 256
Michael Schwingenbc243452008-01-16 19:51:55 +010060/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
Michael Schwingenbc243452008-01-16 19:51:55 +010062/* max number of command args */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020063#define CONFIG_SYS_MAXARGS 16
Michael Schwingenbc243452008-01-16 19:51:55 +010064/* Boot Argument Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Michael Schwingenbc243452008-01-16 19:51:55 +010066
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020067#define CONFIG_SYS_MEMTEST_START 0x00400000
68#define CONFIG_SYS_MEMTEST_END 0x00800000
Michael Schwingenbc243452008-01-16 19:51:55 +010069
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +020070/* timer clock - 2* OSC_IN system clock */
71#define CONFIG_IXP425_TIMER_CLK 66666666
Michael Schwingenbc243452008-01-16 19:51:55 +010072
73/* default load address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_SYS_LOAD_ADDR 0x00010000
Michael Schwingenbc243452008-01-16 19:51:55 +010075
76/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
Michael Schwingenbc243452008-01-16 19:51:55 +010078 115200, 230400 }
79#define CONFIG_SERIAL_RTS_ACTIVE 1
80
Michael Schwingenbc243452008-01-16 19:51:55 +010081/* Expansion bus settings */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#define CONFIG_SYS_EXP_CS0 0xbd113442
Michael Schwingenbc243452008-01-16 19:51:55 +010083
84/* SDRAM settings */
85#define CONFIG_NR_DRAM_BANKS 1
86#define PHYS_SDRAM_1 0x00000000
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +020087#define CONFIG_SYS_SDRAM_BASE 0x00000000
Michael Schwingenbc243452008-01-16 19:51:55 +010088
89/* 16MB SDRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020090#define CONFIG_SYS_SDR_CONFIG 0x3A
Michael Schwingenbc243452008-01-16 19:51:55 +010091#define PHYS_SDRAM_1_SIZE 0x01000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
93#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
94#define CONFIG_SYS_DRAM_SIZE 0x01000000
Michael Schwingenbc243452008-01-16 19:51:55 +010095
96/* FLASH organization */
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +020097#define CONFIG_SYS_TEXT_BASE 0x50000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020098#define CONFIG_SYS_MAX_FLASH_BANKS 1
Michael Schwingenbc243452008-01-16 19:51:55 +010099/* max number of sectors on one chip */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100#define CONFIG_SYS_MAX_FLASH_SECT 140
Michael Schwingenbc243452008-01-16 19:51:55 +0100101#define PHYS_FLASH_1 0x50000000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200102#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
Michael Schwingenbc243452008-01-16 19:51:55 +0100103
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200104#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
105#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
106#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200107#define CONFIG_BOARD_SIZE_LIMIT 262144
Michael Schwingenbc243452008-01-16 19:51:55 +0100108
109/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200110#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200111#define CONFIG_FLASH_CFI_DRIVER
Michael Schwingenbc243452008-01-16 19:51:55 +0100112/* no byte writes on IXP4xx */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200113#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
Michael Schwingenbc243452008-01-16 19:51:55 +0100114
115/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200116#define CONFIG_SYS_FLASH_EMPTY_INFO
Michael Schwingenbc243452008-01-16 19:51:55 +0100117
118/* Ethernet */
119
120/* include IXP4xx NPE support */
121#define CONFIG_IXP4XX_NPE 1
Michael Schwingenbc243452008-01-16 19:51:55 +0100122
Michael Schwingenbc243452008-01-16 19:51:55 +0100123/* NPE0 PHY address */
124#define CONFIG_PHY_ADDR 0x10
125/* MII PHY management */
126#define CONFIG_MII 1
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200127/* fixed-speed switch without standard PHY registers on MII */
128#define CONFIG_MII_NPE0_FIXEDLINK 1
129#define CONFIG_MII_NPE0_SPEED 100
130#define CONFIG_MII_NPE0_FULLDUPLEX 1
131
Michael Schwingenbc243452008-01-16 19:51:55 +0100132/* Number of ethernet rx buffers & descriptors */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200133#define CONFIG_SYS_RX_ETH_BUFFER 16
Michael Schwingenbc243452008-01-16 19:51:55 +0100134#define CONFIG_RESET_PHY_R 1
135/* ethernet switch connected to MII port */
136#define CONFIG_MII_ETHSWITCH 1
137
138#define CONFIG_CMD_DHCP
139#define CONFIG_CMD_NET
140#define CONFIG_CMD_MII
141#define CONFIG_CMD_PING
142#undef CONFIG_CMD_NFS
143
144/* BOOTP options */
145#define CONFIG_BOOTP_BOOTFILESIZE
146#define CONFIG_BOOTP_BOOTPATH
147#define CONFIG_BOOTP_GATEWAY
148#define CONFIG_BOOTP_HOSTNAME
149
150/* Cache Configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151#define CONFIG_SYS_CACHELINE_SIZE 32
Michael Schwingenbc243452008-01-16 19:51:55 +0100152
153/*
154 * environment organization:
155 * one flash sector, embedded in uboot area (bottom bootblock flash)
156 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200157#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200158#define CONFIG_ENV_SIZE 0x2000
159#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_USE_PPCENV 1
Michael Schwingenbc243452008-01-16 19:51:55 +0100161
162#define CONFIG_EXTRA_ENV_SETTINGS \
Jean-Christophe PLAGNIOL-VILLARDb4e2f892009-01-31 09:53:39 +0100163 "npe_ucode=50040000\0" \
Michael Schwingenbc243452008-01-16 19:51:55 +0100164 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
165 "kerneladdr=50050000\0" \
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200166 "kernelfile=actux3/uImage\0" \
167 "rootfile=actux3/rootfs\0" \
Michael Schwingenbc243452008-01-16 19:51:55 +0100168 "rootaddr=50170000\0" \
169 "loadaddr=10000\0" \
170 "updateboot_ser=mw.b 10000 ff 40000;" \
171 " loady ${loadaddr};" \
172 " run eraseboot writeboot\0" \
173 "updateboot_net=mw.b 10000 ff 40000;" \
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200174 " tftp ${loadaddr} actux3/u-boot.bin;" \
Michael Schwingenbc243452008-01-16 19:51:55 +0100175 " run eraseboot writeboot\0" \
176 "eraseboot=protect off 50000000 50003fff;" \
177 " protect off 50006000 5003ffff;" \
178 " erase 50000000 50003fff;" \
179 " erase 50006000 5003ffff\0" \
180 "writeboot=cp.b 10000 50000000 4000;" \
181 " cp.b 16000 50006000 3a000\0" \
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200182 "updateucode=loady;" \
183 " era ${npe_ucode} +${filesize};" \
184 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
Michael Schwingenbc243452008-01-16 19:51:55 +0100185 "updateroot=tftp ${loadaddr} ${rootfile};" \
186 " era ${rootaddr} +${filesize};" \
187 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
188 "updatekern=tftp ${loadaddr} ${kernelfile};" \
189 " era ${kerneladdr} +${filesize};" \
190 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
191 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
192 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
193 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
194 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200195 "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
Michael Schwingenbc243452008-01-16 19:51:55 +0100196 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
197 "boot_flash=run flashargs addtty addeth;" \
198 " bootm ${kerneladdr}\0" \
199 "boot_net=run netargs addtty addeth;" \
200 " tftpboot ${loadaddr} ${kernelfile};" \
201 " bootm\0"
202
Michael Schwingen8b5ab4c2011-05-23 00:00:06 +0200203/* additions for new relocation code, must be added to all boards */
204#define CONFIG_SYS_INIT_SP_ADDR \
205 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
206
Michael Schwingenbc243452008-01-16 19:51:55 +0100207#endif /* __CONFIG_H */