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Peter Barada86887f82011-12-19 19:54:51 +00001/*
2 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
3 * Peter Barada <peter.barada@logicpd.com>
4 *
5 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
6 * reference boards.
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Peter Barada86887f82011-12-19 19:54:51 +00009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/*
15 * High Level Configuration Options
16 */
17#define CONFIG_OMAP /* in a TI OMAP core */
Peter Barada86887f82011-12-19 19:54:51 +000018#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
Marek Vasut308252a2012-07-21 05:02:23 +000019#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053020#define CONFIG_OMAP_COMMON
Nishanth Menonc6f90e12015-03-09 17:12:08 -050021/* Common ARM Erratas */
22#define CONFIG_ARM_ERRATA_454179
23#define CONFIG_ARM_ERRATA_430973
24#define CONFIG_ARM_ERRATA_621766
Peter Barada86887f82011-12-19 19:54:51 +000025
Peter Barada86887f82011-12-19 19:54:51 +000026#define CONFIG_SYS_TEXT_BASE 0x80400000
27
28#define CONFIG_SDRC /* The chip has SDRC controller */
29
30#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050031#include <asm/arch/omap.h>
Peter Barada86887f82011-12-19 19:54:51 +000032
33/*
34 * Display CPU and Board information
35 */
36#define CONFIG_DISPLAY_CPUINFO
37#define CONFIG_DISPLAY_BOARDINFO
38
39/* Clock Defines */
40#define V_OSCK 26000000 /* Clock output from T2 */
41#define V_SCLK (V_OSCK >> 1)
42
43#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
44
45#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS
47#define CONFIG_INITRD_TAG
48#define CONFIG_REVISION_TAG
49
50#define CONFIG_CMDLINE_EDITING /* cmd line edit/history */
51#define CONFIG_ZERO_BOOTDELAY_CHECK /* check keypress w/no delay */
52
53/*
54 * Size of malloc() pool
55 */
56#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
57 /* Sector */
58#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
59
60/*
61 * Hardware drivers
62 */
63
64/*
65 * NS16550 Configuration
66 */
67#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
68
69#define CONFIG_SYS_NS16550
70#define CONFIG_SYS_NS16550_SERIAL
71#define CONFIG_SYS_NS16550_REG_SIZE (-4)
72#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
73
74/*
75 * select serial console configuration
76 */
77#define CONFIG_CONS_INDEX 1
78#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
79#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
80
81/* allow to overwrite serial and ethaddr */
82#define CONFIG_ENV_OVERWRITE
83#define CONFIG_BAUDRATE 115200
84#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
85 115200}
86#define CONFIG_GENERIC_MMC
87#define CONFIG_MMC
88#define CONFIG_OMAP_HSMMC
89#define CONFIG_DOS_PARTITION
90
91/* commands to include */
Peter Barada86887f82011-12-19 19:54:51 +000092#define CONFIG_CMD_CACHE
93#define CONFIG_CMD_EXT2 /* EXT2 Support */
94#define CONFIG_CMD_FAT /* FAT support */
95#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
96#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
97#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
98#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
99#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(x-loader),"\
100 "1920k(u-boot),128k(u-boot-env),"\
101 "4m(kernel),-(fs)"
102
103#define CONFIG_CMD_I2C /* I2C serial bus support */
104#define CONFIG_CMD_MMC /* MMC support */
105#define CONFIG_CMD_NAND /* NAND support */
106#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
Peter Barada86887f82011-12-19 19:54:51 +0000107#define CONFIG_CMD_PING
108#define CONFIG_CMD_DHCP
Peter Barada86887f82011-12-19 19:54:51 +0000109
Peter Barada86887f82011-12-19 19:54:51 +0000110#define CONFIG_SYS_NO_FLASH
111
112/*
113 * I2C
114 */
Heiko Schocher6789e842013-10-22 11:03:18 +0200115#define CONFIG_SYS_I2C
116#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
117#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
118#define CONFIG_SYS_I2C_OMAP34XX
Peter Barada86887f82011-12-19 19:54:51 +0000119
120/*
121 * TWL4030
122 */
123#define CONFIG_TWL4030_POWER
124
125/*
126 * Board NAND Info.
127 */
128#define CONFIG_SYS_NAND_QUIET_TEST
129#define CONFIG_NAND_OMAP_GPMC
130#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
131 /* to access nand */
132#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
133 /* to access nand at */
134 /* CS0 */
135
136#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
137 /* NAND devices */
pekon guptab80a6602014-05-06 00:46:19 +0530138#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
Peter Barada86887f82011-12-19 19:54:51 +0000139#define CONFIG_JFFS2_NAND
140/* nand device jffs2 lives on */
141#define CONFIG_JFFS2_DEV "nand0"
142/* start of jffs2 partition */
143#define CONFIG_JFFS2_PART_OFFSET 0x680000
144#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
145 /* partition */
146
147/* Environment information */
148#define CONFIG_BOOTDELAY 2
149
150/*
151 * PREBOOT assumes the 4.3" display is attached. User can interrupt
152 * and modify display variable to suit their needs.
153 */
154#define CONFIG_PREBOOT \
155 "echo ======================NOTICE============================;"\
156 "echo \"The u-boot environment is not set.\";" \
157 "echo \"If using a display a valid display varible for your panel\";" \
158 "echo \"needs to be set.\";" \
159 "echo \"Valid display options are:\";" \
160 "echo \" 2 == LQ121S1DG31 TFT SVGA (12.1) Sharp\";" \
161 "echo \" 3 == LQ036Q1DA01 TFT QVGA (3.6) Sharp w/ASIC\";" \
162 "echo \" 5 == LQ064D343 TFT VGA (6.4) Sharp\";" \
163 "echo \" 7 == LQ10D368 TFT VGA (10.4) Sharp\";" \
164 "echo \" 15 == LQ043T1DG01 TFT WQVGA (4.3) Sharp (DEFAULT)\";" \
165 "echo \" vga[-dvi or -hdmi] LCD VGA 640x480\";" \
166 "echo \" svga[-dvi or -hdmi] LCD SVGA 800x600\";" \
167 "echo \" xga[-dvi or -hdmi] LCD XGA 1024x768\";" \
168 "echo \" 720p[-dvi or -hdmi] LCD 720P 1280x720\";" \
169 "echo \"Defaulting to 4.3 LCD panel (display=15).\";" \
170 "setenv display 15;" \
171 "setenv preboot;" \
172 "saveenv;"
173
174
175#define CONFIG_EXTRA_ENV_SETTINGS \
176 "loadaddr=0x81000000\0" \
177 "bootfile=uImage\0" \
178 "mtdids=" MTDIDS_DEFAULT "\0" \
179 "mtdparts=" MTDPARTS_DEFAULT "\0" \
180 "mmcdev=0\0" \
Andrew Bradford66968112012-10-01 05:06:52 +0000181 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
Peter Barada86887f82011-12-19 19:54:51 +0000182 "if run loadbootscript; then " \
183 "run bootscript; " \
184 "else " \
185 "run defaultboot;" \
186 "fi; " \
187 "else run defaultboot; fi\0" \
188 "defaultboot=run mmcramboot\0" \
189 "consoledevice=ttyO0\0" \
190 "display=15\0" \
191 "setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
192 "dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
193 "rotation=0\0" \
194 "vrfb_arg=if itest ${rotation} -ne 0; then " \
195 "setenv bootargs ${bootargs} omapfb.vrfb=y " \
196 "omapfb.rotate=${rotation}; " \
197 "fi\0" \
198 "otherbootargs=ignore_loglevel early_printk no_console_suspend\0" \
199 "addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
200 "common_bootargs=setenv bootargs ${bootargs} display=${display} " \
201 "${otherbootargs};" \
202 "run addmtdparts; " \
203 "run vrfb_arg\0" \
204 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
205 "bootscript=echo 'Running bootscript from mmc ...'; " \
206 "source ${loadaddr}\0" \
207 "loaduimage=mmc rescan ${mmcdev}; " \
208 "fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
209 "ramdisksize=64000\0" \
210 "ramdiskaddr=0x82000000\0" \
211 "ramdiskimage=rootfs.ext2.gz.uboot\0" \
212 "ramargs=run setconsole; setenv bootargs console=${console} " \
213 "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
214 "mmcramboot=echo 'Booting kernel from mmc w/ramdisk...'; " \
215 "run ramargs; " \
216 "run common_bootargs; " \
217 "run dump_bootargs; " \
218 "run loaduimage; " \
219 "fatload mmc ${mmcdev} ${ramdiskaddr} ${ramdiskimage}; "\
220 "bootm ${loadaddr} ${ramdiskaddr}\0" \
221 "ramboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
222 "run ramargs; " \
223 "run common_bootargs; " \
224 "run dump_bootargs; " \
225 "tftpboot ${loadaddr} ${bootfile}; "\
226 "tftpboot ${ramdiskaddr} ${ramdiskimage}; "\
227 "bootm ${loadaddr} ${ramdiskaddr}\0"
228
229#define CONFIG_BOOTCOMMAND \
230 "run autoboot"
231
232#define CONFIG_AUTO_COMPLETE
233/*
234 * Miscellaneous configurable options
235 */
236#define CONFIG_SYS_LONGHELP /* undef to save memory */
237#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Peter Barada86887f82011-12-19 19:54:51 +0000238#define CONFIG_SYS_PROMPT "OMAP Logic # "
239#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
240/* Print Buffer Size */
241#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
242 sizeof(CONFIG_SYS_PROMPT) + 16)
243#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
244/* Boot Argument Buffer Size */
245#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
246/* memtest works on */
247#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
248#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
249 0x01F00000) /* 31MB */
250
251#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
252 /* address */
253
254/*
255 * OMAP3 has 12 GP timers, they can be driven by the system clock
256 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
257 * This rate is divided by a local divisor.
258 */
259#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
260#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Peter Barada86887f82011-12-19 19:54:51 +0000261
262/*
Peter Barada86887f82011-12-19 19:54:51 +0000263 * Physical Memory Map
264 */
265#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
266#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
267#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
268
269/*
270 * FLASH and environment organization
271 */
272
273/* **** PISMO SUPPORT *** */
Peter Barada86887f82011-12-19 19:54:51 +0000274#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
275
276#if defined(CONFIG_CMD_NAND)
pekon gupta222a3112014-07-18 17:59:41 +0530277#define CONFIG_SYS_FLASH_BASE NAND_BASE
Peter Barada86887f82011-12-19 19:54:51 +0000278#elif defined(CONFIG_CMD_ONENAND)
pekon gupta222a3112014-07-18 17:59:41 +0530279#define CONFIG_SYS_FLASH_BASE ONENAND_MAP
Peter Barada86887f82011-12-19 19:54:51 +0000280#endif
281
282/* Monitor at start of flash */
283#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
284
285#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
286
287#if defined(CONFIG_CMD_NAND)
288#define CONFIG_NAND_OMAP_GPMC
Peter Barada86887f82011-12-19 19:54:51 +0000289#define CONFIG_ENV_IS_IN_NAND
290#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
291#endif
292
293#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
294#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
295
296#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
297#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
298#define CONFIG_SYS_INIT_RAM_SIZE 0x800
299#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
300 CONFIG_SYS_INIT_RAM_SIZE - \
301 GENERATED_GBL_DATA_SIZE)
302
303/*
304 * SMSC922x Ethernet
305 */
306#if defined(CONFIG_CMD_NET)
307
308#define CONFIG_SMC911X
309#define CONFIG_SMC911X_16_BIT
310#define CONFIG_SMC911X_BASE 0x08000000
311
312#endif /* (CONFIG_CMD_NET) */
313
314/*
315 * BOOTP fields
316 */
317
318#define CONFIG_BOOTP_SUBNETMASK 0x00000001
319#define CONFIG_BOOTP_GATEWAY 0x00000002
320#define CONFIG_BOOTP_HOSTNAME 0x00000004
321#define CONFIG_BOOTP_BOOTPATH 0x00000010
322
323#endif /* __CONFIG_H */