wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * Keith Outwater, keith_outwater@mvis.com |
| 5 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef _VIRTEX2_H_ |
| 10 | #define _VIRTEX2_H_ |
| 11 | |
| 12 | #include <xilinx.h> |
| 13 | |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 14 | int virtex2_load(Xilinx_desc *desc, const void *image, size_t size); |
| 15 | int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize); |
| 16 | int virtex2_info(Xilinx_desc *desc); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 17 | |
| 18 | /* |
| 19 | * Slave SelectMap Implementation function table. |
| 20 | */ |
| 21 | typedef struct { |
| 22 | Xilinx_pre_fn pre; |
| 23 | Xilinx_pgm_fn pgm; |
| 24 | Xilinx_init_fn init; |
| 25 | Xilinx_err_fn err; |
| 26 | Xilinx_done_fn done; |
| 27 | Xilinx_clk_fn clk; |
| 28 | Xilinx_cs_fn cs; |
| 29 | Xilinx_wr_fn wr; |
| 30 | Xilinx_rdata_fn rdata; |
| 31 | Xilinx_wdata_fn wdata; |
| 32 | Xilinx_busy_fn busy; |
| 33 | Xilinx_abort_fn abort; |
| 34 | Xilinx_post_fn post; |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 35 | } xilinx_virtex2_slave_selectmap_fns; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 36 | |
| 37 | /* Slave Serial Implementation function table */ |
| 38 | typedef struct { |
| 39 | Xilinx_pgm_fn pgm; |
| 40 | Xilinx_clk_fn clk; |
| 41 | Xilinx_rdata_fn rdata; |
| 42 | Xilinx_wdata_fn wdata; |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 43 | } xilinx_virtex2_slave_serial_fns; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 44 | |
| 45 | /* Device Image Sizes (in bytes) |
| 46 | *********************************************************************/ |
| 47 | #define XILINX_XC2V40_SIZE (338208 / 8) |
| 48 | #define XILINX_XC2V80_SIZE (597408 / 8) |
| 49 | #define XILINX_XC2V250_SIZE (1591584 / 8) |
| 50 | #define XILINX_XC2V500_SIZE (2557857 / 8) |
| 51 | #define XILINX_XC2V1000_SIZE (3749408 / 8) |
| 52 | #define XILINX_XC2V1500_SIZE (5166240 / 8) |
| 53 | #define XILINX_XC2V2000_SIZE (6808352 / 8) |
| 54 | #define XILINX_XC2V3000_SIZE (9589408 / 8) |
| 55 | #define XILINX_XC2V4000_SIZE (14220192 / 8) |
| 56 | #define XILINX_XC2V6000_SIZE (19752096 / 8) |
| 57 | #define XILINX_XC2V8000_SIZE (26185120 / 8) |
| 58 | #define XILINX_XC2V10000_SIZE (33519264 / 8) |
| 59 | |
| 60 | /* Descriptor Macros |
| 61 | *********************************************************************/ |
| 62 | #define XILINX_XC2V40_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 63 | { xilinx_virtex2, iface, XILINX_XC2V40_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 64 | |
| 65 | #define XILINX_XC2V80_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 66 | { xilinx_virtex2, iface, XILINX_XC2V80_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 67 | |
| 68 | #define XILINX_XC2V250_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 69 | { xilinx_virtex2, iface, XILINX_XC2V250_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 70 | |
| 71 | #define XILINX_XC2V500_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 72 | { xilinx_virtex2, iface, XILINX_XC2V500_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 73 | |
| 74 | #define XILINX_XC2V1000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 75 | { xilinx_virtex2, iface, XILINX_XC2V1000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 76 | |
| 77 | #define XILINX_XC2V1500_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 78 | { xilinx_virtex2, iface, XILINX_XC2V1500_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 79 | |
| 80 | #define XILINX_XC2V2000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 81 | { xilinx_virtex2, iface, XILINX_XC2V2000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 82 | |
| 83 | #define XILINX_XC2V3000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 84 | { xilinx_virtex2, iface, XILINX_XC2V3000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 85 | |
| 86 | #define XILINX_XC2V4000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 87 | { xilinx_virtex2, iface, XILINX_XC2V4000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 88 | |
| 89 | #define XILINX_XC2V6000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 90 | { xilinx_virtex2, iface, XILINX_XC2V6000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 91 | |
| 92 | #define XILINX_XC2V8000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 93 | { xilinx_virtex2, iface, XILINX_XC2V8000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 94 | |
| 95 | #define XILINX_XC2V10000_DESC(iface, fn_table, cookie) \ |
Michal Simek | d9071ce | 2014-03-13 11:33:36 +0100 | [diff] [blame^] | 96 | { xilinx_virtex2, iface, XILINX_XC2V10000_SIZE, fn_table, cookie } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 97 | |
| 98 | #endif /* _VIRTEX2_H_ */ |