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Chander Kashyape21185b2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyape21185b2011-05-24 20:02:56 +00005 */
6
7#include <common.h>
8#include <asm/io.h>
9#include <netdev.h>
10#include <asm/arch/cpu.h>
11#include <asm/arch/gpio.h>
12#include <asm/arch/mmc.h>
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +053013#include <asm/arch/periph.h>
14#include <asm/arch/pinmux.h>
Chander Kashyape21185b2011-05-24 20:02:56 +000015#include <asm/arch/sromc.h>
16
17DECLARE_GLOBAL_DATA_PTR;
Chander Kashyap393cb362011-12-06 23:34:12 +000018struct exynos4_gpio_part1 *gpio1;
19struct exynos4_gpio_part2 *gpio2;
Chander Kashyape21185b2011-05-24 20:02:56 +000020
21static void smc9115_pre_init(void)
22{
23 u32 smc_bw_conf, smc_bc_conf;
24
25 /* gpio configuration GPK0CON */
Łukasz Majewskief5d9eb2011-07-15 00:16:22 +000026 s5p_gpio_cfg_pin(&gpio2->y0, CONFIG_ENV_SROM_BANK, GPIO_FUNC(2));
Chander Kashyape21185b2011-05-24 20:02:56 +000027
28 /* Ethernet needs bus width of 16 bits */
29 smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
30 smc_bc_conf = SROMC_BC_TACS(0x0F) | SROMC_BC_TCOS(0x0F)
31 | SROMC_BC_TACC(0x0F) | SROMC_BC_TCOH(0x0F)
32 | SROMC_BC_TAH(0x0F) | SROMC_BC_TACP(0x0F)
33 | SROMC_BC_PMC(0x0F);
34
35 /* Select and configure the SROMC bank */
36 s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
37}
38
39int board_init(void)
40{
Chander Kashyap393cb362011-12-06 23:34:12 +000041 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
42 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
Chander Kashyape21185b2011-05-24 20:02:56 +000043
44 smc9115_pre_init();
45
Chander Kashyape21185b2011-05-24 20:02:56 +000046 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
47 return 0;
48}
49
50int dram_init(void)
51{
52 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
53 + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
54 + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
55 + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE);
56
57 return 0;
58}
59
60void dram_init_banksize(void)
61{
62 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
Chander Kashyap9436a0c2011-09-20 21:25:02 +000063 gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \
64 PHYS_SDRAM_1_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000065 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
Chander Kashyap9436a0c2011-09-20 21:25:02 +000066 gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \
67 PHYS_SDRAM_2_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000068 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
Chander Kashyap9436a0c2011-09-20 21:25:02 +000069 gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \
70 PHYS_SDRAM_3_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000071 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
Chander Kashyap9436a0c2011-09-20 21:25:02 +000072 gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \
73 PHYS_SDRAM_4_SIZE);
Chander Kashyape21185b2011-05-24 20:02:56 +000074}
75
76int board_eth_init(bd_t *bis)
77{
78 int rc = 0;
79#ifdef CONFIG_SMC911X
80 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
81#endif
82 return rc;
83}
84
85#ifdef CONFIG_DISPLAY_BOARDINFO
86int checkboard(void)
87{
88 printf("\nBoard: SMDKV310\n");
89 return 0;
90}
91#endif
92
93#ifdef CONFIG_GENERIC_MMC
94int board_mmc_init(bd_t *bis)
95{
96 int i, err;
97
98 /*
99 * MMC2 SD card GPIO:
100 *
101 * GPK2[0] SD_2_CLK(2)
102 * GPK2[1] SD_2_CMD(2)
103 * GPK2[2] SD_2_CDn
104 * GPK2[3:6] SD_2_DATA[0:3](2)
105 */
106 for (i = 0; i < 7; i++) {
107 /* GPK2[0:6] special function 2 */
Łukasz Majewskief5d9eb2011-07-15 00:16:22 +0000108 s5p_gpio_cfg_pin(&gpio2->k2, i, GPIO_FUNC(0x2));
Chander Kashyape21185b2011-05-24 20:02:56 +0000109
110 /* GPK2[0:6] drv 4x */
Łukasz Majewskief5d9eb2011-07-15 00:16:22 +0000111 s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
Chander Kashyape21185b2011-05-24 20:02:56 +0000112
113 /* GPK2[0:1] pull disable */
114 if (i == 0 || i == 1) {
Chander Kashyap0e74b562011-07-25 23:04:07 +0000115 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
Chander Kashyape21185b2011-05-24 20:02:56 +0000116 continue;
117 }
118
119 /* GPK2[2:6] pull up */
Łukasz Majewskief5d9eb2011-07-15 00:16:22 +0000120 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_UP);
Chander Kashyape21185b2011-05-24 20:02:56 +0000121 }
122 err = s5p_mmc_init(2, 4);
123 return err;
124}
125#endif
Rajeshwari Shinde198a40b2013-07-04 12:29:16 +0530126
127static int board_uart_init(void)
128{
129 int err;
130
131 err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
132 if (err) {
133 debug("UART0 not configured\n");
134 return err;
135 }
136
137 err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
138 if (err) {
139 debug("UART1 not configured\n");
140 return err;
141 }
142
143 err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
144 if (err) {
145 debug("UART2 not configured\n");
146 return err;
147 }
148
149 err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
150 if (err) {
151 debug("UART3 not configured\n");
152 return err;
153 }
154
155 return 0;
156}
157
158#ifdef CONFIG_BOARD_EARLY_INIT_F
159int board_early_init_f(void)
160{
161 int err;
162 err = board_uart_init();
163 if (err) {
164 debug("UART init failed\n");
165 return err;
166 }
167 return err;
168}
169#endif