Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Grazvydas Ignotas <notasas@gmail.com> |
| 4 | * |
| 5 | * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by |
| 6 | * Richard Woodruff <r-woodruff2@ti.com> |
| 7 | * Syed Mohammed Khasim <khasim@ti.com> |
| 8 | * Sunil Kumar <sunilsaini05@gmail.com> |
| 9 | * Shashi Ranjan <shashiranjanmca05@gmail.com> |
| 10 | * |
| 11 | * (C) Copyright 2004-2008 |
| 12 | * Texas Instruments, <www.ti.com> |
| 13 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 14 | * SPDX-License-Identifier: GPL-2.0+ |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 15 | */ |
| 16 | #include <common.h> |
Tom Rix | 2c15513 | 2009-06-28 12:52:30 -0500 | [diff] [blame] | 17 | #include <twl4030.h> |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 18 | #include <asm/io.h> |
Grazvydas Ignotas | 7cad446 | 2012-03-22 13:49:22 +0000 | [diff] [blame] | 19 | #include <asm/gpio.h> |
Tom Rini | 86c5c54 | 2011-09-03 21:51:25 -0400 | [diff] [blame] | 20 | #include <asm/arch/mmc_host_def.h> |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 21 | #include <asm/arch/mux.h> |
Aneesh V | 080a46e | 2011-07-31 20:30:53 +0000 | [diff] [blame] | 22 | #include <asm/arch/gpio.h> |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 23 | #include <asm/arch/sys_proto.h> |
| 24 | #include <asm/mach-types.h> |
| 25 | #include "pandora.h" |
| 26 | |
John Rigby | 2956532 | 2010-12-20 18:27:51 -0700 | [diff] [blame] | 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
Grazvydas Ignotas | 5246d01 | 2010-06-08 17:19:22 -0400 | [diff] [blame] | 29 | #define TWL4030_BB_CFG_BBCHEN (1 << 4) |
| 30 | #define TWL4030_BB_CFG_BBSEL_3200MV (3 << 2) |
| 31 | #define TWL4030_BB_CFG_BBISEL_500UA 2 |
| 32 | |
Grazvydas Ignotas | 7cad446 | 2012-03-22 13:49:22 +0000 | [diff] [blame] | 33 | #define CONTROL_WKUP_CTRL 0x48002a5c |
| 34 | #define GPIO_IO_PWRDNZ (1 << 6) |
| 35 | #define PBIASLITEVMODE1 (1 << 8) |
| 36 | |
Tom Rix | 5891151 | 2009-04-01 22:02:20 -0500 | [diff] [blame] | 37 | /* |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 38 | * Routine: board_init |
| 39 | * Description: Early hardware init. |
Tom Rix | 5891151 | 2009-04-01 22:02:20 -0500 | [diff] [blame] | 40 | */ |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 41 | int board_init(void) |
| 42 | { |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 43 | gpmc_init(); /* in SRAM or SDRAM, finish GPMC */ |
| 44 | /* board id for Linux */ |
| 45 | gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA; |
| 46 | /* boot param addr */ |
| 47 | gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); |
| 48 | |
| 49 | return 0; |
| 50 | } |
| 51 | |
Grazvydas Ignotas | 7cad446 | 2012-03-22 13:49:22 +0000 | [diff] [blame] | 52 | static void set_output_gpio(unsigned int gpio, int value) |
| 53 | { |
| 54 | int ret; |
| 55 | |
| 56 | ret = gpio_request(gpio, ""); |
| 57 | if (ret != 0) { |
| 58 | printf("could not request GPIO %u\n", gpio); |
| 59 | return; |
| 60 | } |
| 61 | ret = gpio_direction_output(gpio, value); |
| 62 | if (ret != 0) |
| 63 | printf("could not set GPIO %u to %d\n", gpio, value); |
| 64 | } |
| 65 | |
Tom Rix | 5891151 | 2009-04-01 22:02:20 -0500 | [diff] [blame] | 66 | /* |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 67 | * Routine: misc_init_r |
| 68 | * Description: Configure board specific parts |
Tom Rix | 5891151 | 2009-04-01 22:02:20 -0500 | [diff] [blame] | 69 | */ |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 70 | int misc_init_r(void) |
| 71 | { |
Grazvydas Ignotas | 7cad446 | 2012-03-22 13:49:22 +0000 | [diff] [blame] | 72 | t2_t *t2_base = (t2_t *)T2_BASE; |
| 73 | u32 pbias_lite; |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 74 | |
Grazvydas Ignotas | ead39d7 | 2009-12-10 17:10:21 +0200 | [diff] [blame] | 75 | twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 76 | |
Grazvydas Ignotas | 7cad446 | 2012-03-22 13:49:22 +0000 | [diff] [blame] | 77 | /* set up dual-voltage GPIOs to 1.8V */ |
| 78 | pbias_lite = readl(&t2_base->pbias_lite); |
| 79 | pbias_lite &= ~PBIASLITEVMODE1; |
| 80 | pbias_lite |= PBIASLITEPWRDNZ1; |
| 81 | writel(pbias_lite, &t2_base->pbias_lite); |
| 82 | if (get_cpu_family() == CPU_OMAP36XX) |
| 83 | writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ, |
| 84 | CONTROL_WKUP_CTRL); |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 85 | |
Grazvydas Ignotas | 7cad446 | 2012-03-22 13:49:22 +0000 | [diff] [blame] | 86 | /* make sure audio and BT chips are in powerdown state */ |
| 87 | set_output_gpio(14, 0); |
| 88 | set_output_gpio(15, 0); |
| 89 | set_output_gpio(118, 0); |
| 90 | |
| 91 | /* enable USB supply */ |
| 92 | set_output_gpio(164, 1); |
| 93 | |
| 94 | /* wifi needs a short pulse to enter powersave state */ |
| 95 | set_output_gpio(23, 1); |
| 96 | udelay(5000); |
| 97 | gpio_direction_output(23, 0); |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 98 | |
Grazvydas Ignotas | 5246d01 | 2010-06-08 17:19:22 -0400 | [diff] [blame] | 99 | /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */ |
| 100 | twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, |
Nishanth Menon | 0208aaf | 2013-03-26 05:20:49 +0000 | [diff] [blame] | 101 | TWL4030_PM_RECEIVER_BB_CFG, |
Grazvydas Ignotas | 5246d01 | 2010-06-08 17:19:22 -0400 | [diff] [blame] | 102 | TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV | |
Nishanth Menon | 0208aaf | 2013-03-26 05:20:49 +0000 | [diff] [blame] | 103 | TWL4030_BB_CFG_BBISEL_500UA); |
Grazvydas Ignotas | 5246d01 | 2010-06-08 17:19:22 -0400 | [diff] [blame] | 104 | |
Dirk Behme | e6a6a70 | 2009-03-12 19:30:50 +0100 | [diff] [blame] | 105 | dieid_num_r(); |
| 106 | |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 107 | return 0; |
| 108 | } |
| 109 | |
Tom Rix | 5891151 | 2009-04-01 22:02:20 -0500 | [diff] [blame] | 110 | /* |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 111 | * Routine: set_muxconf_regs |
| 112 | * Description: Setting up the configuration Mux registers specific to the |
| 113 | * hardware. Many pins need to be moved from protect to primary |
| 114 | * mode. |
Tom Rix | 5891151 | 2009-04-01 22:02:20 -0500 | [diff] [blame] | 115 | */ |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 116 | void set_muxconf_regs(void) |
| 117 | { |
| 118 | MUX_PANDORA(); |
Grazvydas Ignotas | 10cd73b | 2012-03-22 13:49:21 +0000 | [diff] [blame] | 119 | if (get_cpu_family() == CPU_OMAP36XX) { |
| 120 | MUX_PANDORA_3730(); |
| 121 | } |
Dirk Behme | 2be2c6c | 2009-01-28 21:39:58 +0100 | [diff] [blame] | 122 | } |
Tom Rini | 86c5c54 | 2011-09-03 21:51:25 -0400 | [diff] [blame] | 123 | |
| 124 | #ifdef CONFIG_GENERIC_MMC |
| 125 | int board_mmc_init(bd_t *bis) |
| 126 | { |
Nikita Kiryanov | e3913f5 | 2012-12-03 02:19:47 +0000 | [diff] [blame] | 127 | return omap_mmc_init(0, 0, 0, -1, -1); |
Tom Rini | 86c5c54 | 2011-09-03 21:51:25 -0400 | [diff] [blame] | 128 | } |
| 129 | #endif |