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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28#include <common.h>
29#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30#include <ioports.h>
Heiko Schochera21ca952008-10-17 13:52:51 +020031#include <asm/io.h>
wdenkc6097192002-11-03 00:24:07 +000032#endif
Peter Pearsed4fc6012007-08-14 10:10:52 +010033#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
wdenk9d5028c2004-11-21 00:06:33 +000034#include <asm/io.h>
35#include <asm/arch/hardware.h>
36#endif
Wolfgang Denkba94a1b2006-05-30 15:56:48 +020037#ifdef CONFIG_IXP425 /* only valid for IXP425 */
38#include <asm/arch/ixp425.h>
39#endif
Peter Pearseb0d8f5b2007-05-09 11:37:56 +010040#ifdef CONFIG_LPC2292
41#include <asm/arch/hardware.h>
42#endif
Heiko Schocher1b6275d2009-03-12 07:37:34 +010043#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
Heiko Schochera21ca952008-10-17 13:52:51 +020044#include <asm/io.h>
45#endif
wdenkc6097192002-11-03 00:24:07 +000046#include <i2c.h>
47
wdenkc6097192002-11-03 00:24:07 +000048/* #define DEBUG_I2C */
49
Wolfgang Denkd87080b2006-03-31 18:32:53 +020050#ifdef DEBUG_I2C
51DECLARE_GLOBAL_DATA_PTR;
52#endif
53
wdenkc6097192002-11-03 00:24:07 +000054
55/*-----------------------------------------------------------------------
56 * Definitions
57 */
58
59#define RETRIES 0
60
61
62#define I2C_ACK 0 /* PD_SDA level to ack a byte */
63#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
64
65
66#ifdef DEBUG_I2C
67#define PRINTD(fmt,args...) do { \
wdenkc6097192002-11-03 00:24:07 +000068 if (gd->have_console) \
69 printf (fmt ,##args); \
70 } while (0)
71#else
72#define PRINTD(fmt,args...)
73#endif
74
Heiko Schocher799b7842008-10-15 09:34:45 +020075#if defined(CONFIG_I2C_MULTI_BUS)
Trent Piepho5e3ab682008-11-12 17:29:48 -080076static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
Heiko Schocher799b7842008-10-15 09:34:45 +020077#endif /* CONFIG_I2C_MULTI_BUS */
78
wdenkc6097192002-11-03 00:24:07 +000079/*-----------------------------------------------------------------------
80 * Local functions
81 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020082#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +000083static void send_reset (void);
Heiko Schocher4ca107e2008-10-15 09:38:38 +020084#endif
wdenkc6097192002-11-03 00:24:07 +000085static void send_start (void);
86static void send_stop (void);
87static void send_ack (int);
88static int write_byte (uchar byte);
89static uchar read_byte (int);
90
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
wdenkc6097192002-11-03 00:24:07 +000092/*-----------------------------------------------------------------------
93 * Send a reset sequence consisting of 9 clocks with the data signal high
94 * to clock any confused device back into an idle state. Also send a
95 * <stop> at the end of the sequence for belts & suspenders.
96 */
97static void send_reset(void)
98{
Heiko Schocher98aed372008-10-15 09:35:26 +020099 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000100 int j;
101
wdenk60fbe252003-04-08 23:25:21 +0000102 I2C_SCL(1);
wdenkc6097192002-11-03 00:24:07 +0000103 I2C_SDA(1);
wdenk60fbe252003-04-08 23:25:21 +0000104#ifdef I2C_INIT
105 I2C_INIT;
106#endif
107 I2C_TRISTATE;
wdenkc6097192002-11-03 00:24:07 +0000108 for(j = 0; j < 9; j++) {
109 I2C_SCL(0);
110 I2C_DELAY;
111 I2C_DELAY;
112 I2C_SCL(1);
113 I2C_DELAY;
114 I2C_DELAY;
115 }
116 send_stop();
117 I2C_TRISTATE;
118}
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200119#endif
wdenkc6097192002-11-03 00:24:07 +0000120
121/*-----------------------------------------------------------------------
122 * START: High -> Low on SDA while SCL is High
123 */
124static void send_start(void)
125{
Heiko Schocher98aed372008-10-15 09:35:26 +0200126 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000127
128 I2C_DELAY;
129 I2C_SDA(1);
130 I2C_ACTIVE;
131 I2C_DELAY;
132 I2C_SCL(1);
133 I2C_DELAY;
134 I2C_SDA(0);
135 I2C_DELAY;
136}
137
138/*-----------------------------------------------------------------------
139 * STOP: Low -> High on SDA while SCL is High
140 */
141static void send_stop(void)
142{
Heiko Schocher98aed372008-10-15 09:35:26 +0200143 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000144
145 I2C_SCL(0);
146 I2C_DELAY;
147 I2C_SDA(0);
148 I2C_ACTIVE;
149 I2C_DELAY;
150 I2C_SCL(1);
151 I2C_DELAY;
152 I2C_SDA(1);
153 I2C_DELAY;
154 I2C_TRISTATE;
155}
156
157
158/*-----------------------------------------------------------------------
159 * ack should be I2C_ACK or I2C_NOACK
160 */
161static void send_ack(int ack)
162{
Heiko Schocher98aed372008-10-15 09:35:26 +0200163 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000164
wdenkc6097192002-11-03 00:24:07 +0000165 I2C_SCL(0);
166 I2C_DELAY;
wdenkc6097192002-11-03 00:24:07 +0000167 I2C_ACTIVE;
Wolfgang Denkc15f80e2006-03-13 00:50:48 +0100168 I2C_SDA(ack);
wdenkc6097192002-11-03 00:24:07 +0000169 I2C_DELAY;
170 I2C_SCL(1);
171 I2C_DELAY;
172 I2C_DELAY;
173 I2C_SCL(0);
174 I2C_DELAY;
175}
176
177
178/*-----------------------------------------------------------------------
179 * Send 8 bits and look for an acknowledgement.
180 */
181static int write_byte(uchar data)
182{
Heiko Schocher98aed372008-10-15 09:35:26 +0200183 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000184 int j;
185 int nack;
186
187 I2C_ACTIVE;
188 for(j = 0; j < 8; j++) {
189 I2C_SCL(0);
190 I2C_DELAY;
191 I2C_SDA(data & 0x80);
192 I2C_DELAY;
193 I2C_SCL(1);
194 I2C_DELAY;
195 I2C_DELAY;
196
197 data <<= 1;
198 }
199
200 /*
201 * Look for an <ACK>(negative logic) and return it.
202 */
203 I2C_SCL(0);
204 I2C_DELAY;
205 I2C_SDA(1);
206 I2C_TRISTATE;
207 I2C_DELAY;
208 I2C_SCL(1);
209 I2C_DELAY;
210 I2C_DELAY;
211 nack = I2C_READ;
212 I2C_SCL(0);
213 I2C_DELAY;
214 I2C_ACTIVE;
215
216 return(nack); /* not a nack is an ack */
217}
218
Heiko Schocher799b7842008-10-15 09:34:45 +0200219#if defined(CONFIG_I2C_MULTI_BUS)
220/*
221 * Functions for multiple I2C bus handling
222 */
223unsigned int i2c_get_bus_num(void)
224{
225 return i2c_bus_num;
226}
227
228int i2c_set_bus_num(unsigned int bus)
229{
Heiko Schocher67b23a32008-10-15 09:39:47 +0200230#if defined(CONFIG_I2C_MUX)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200231 if (bus < CONFIG_SYS_MAX_I2C_BUS) {
Heiko Schocher67b23a32008-10-15 09:39:47 +0200232 i2c_bus_num = bus;
233 } else {
234 int ret;
235
236 ret = i2x_mux_select_mux(bus);
237 if (ret == 0)
238 i2c_bus_num = bus;
239 else
240 return ret;
241 }
242#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200243 if (bus >= CONFIG_SYS_MAX_I2C_BUS)
Heiko Schocher799b7842008-10-15 09:34:45 +0200244 return -1;
245 i2c_bus_num = bus;
Heiko Schocher67b23a32008-10-15 09:39:47 +0200246#endif
Heiko Schocher799b7842008-10-15 09:34:45 +0200247 return 0;
248}
249
250/* TODO: add 100/400k switching */
251unsigned int i2c_get_bus_speed(void)
252{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200253 return CONFIG_SYS_I2C_SPEED;
Heiko Schocher799b7842008-10-15 09:34:45 +0200254}
255
256int i2c_set_bus_speed(unsigned int speed)
257{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258 if (speed != CONFIG_SYS_I2C_SPEED)
Heiko Schocher799b7842008-10-15 09:34:45 +0200259 return -1;
260
261 return 0;
262}
263#endif
wdenkc6097192002-11-03 00:24:07 +0000264
265/*-----------------------------------------------------------------------
266 * if ack == I2C_ACK, ACK the byte so can continue reading, else
267 * send I2C_NOACK to end the read.
268 */
269static uchar read_byte(int ack)
270{
Heiko Schocher98aed372008-10-15 09:35:26 +0200271 I2C_SOFT_DECLARATIONS /* intentional without ';' */
wdenkc6097192002-11-03 00:24:07 +0000272 int data;
273 int j;
274
275 /*
276 * Read 8 bits, MSB first.
277 */
278 I2C_TRISTATE;
Haavard Skinnemoen110e0062008-05-16 11:08:11 +0200279 I2C_SDA(1);
wdenkc6097192002-11-03 00:24:07 +0000280 data = 0;
281 for(j = 0; j < 8; j++) {
282 I2C_SCL(0);
283 I2C_DELAY;
284 I2C_SCL(1);
285 I2C_DELAY;
286 data <<= 1;
287 data |= I2C_READ;
288 I2C_DELAY;
289 }
290 send_ack(ack);
291
292 return(data);
293}
294
295/*=====================================================================*/
296/* Public Functions */
297/*=====================================================================*/
298
299/*-----------------------------------------------------------------------
300 * Initialization
301 */
302void i2c_init (int speed, int slaveaddr)
303{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200304#if defined(CONFIG_SYS_I2C_INIT_BOARD)
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200305 /* call board specific i2c bus reset routine before accessing the */
306 /* environment, which might be in a chip on that bus. For details */
307 /* about this problem see doc/I2C_Edge_Conditions. */
308 i2c_init_board();
309#else
wdenkc6097192002-11-03 00:24:07 +0000310 /*
wdenk8bde7f72003-06-27 21:31:46 +0000311 * WARNING: Do NOT save speed in a static variable: if the
312 * I2C routines are called before RAM is initialized (to read
313 * the DIMM SPD, for instance), RAM won't be usable and your
314 * system will crash.
wdenkc6097192002-11-03 00:24:07 +0000315 */
316 send_reset ();
Heiko Schocher4ca107e2008-10-15 09:38:38 +0200317#endif
wdenkc6097192002-11-03 00:24:07 +0000318}
319
320/*-----------------------------------------------------------------------
321 * Probe to see if a chip is present. Also good for checking for the
322 * completion of EEPROM writes since the chip stops responding until
323 * the write completes (typically 10mSec).
324 */
325int i2c_probe(uchar addr)
326{
327 int rc;
328
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100329 /*
Wolfgang Denk8e7b7032006-03-12 02:55:22 +0100330 * perform 1 byte write transaction with just address byte
Wolfgang Denk82d716f2006-03-12 01:30:45 +0100331 * (fake write)
332 */
wdenkc6097192002-11-03 00:24:07 +0000333 send_start();
wdenk6aff3112002-12-17 01:51:00 +0000334 rc = write_byte ((addr << 1) | 0);
wdenkc6097192002-11-03 00:24:07 +0000335 send_stop();
336
337 return (rc ? 1 : 0);
338}
339
340/*-----------------------------------------------------------------------
341 * Read bytes
342 */
343int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
344{
345 int shift;
346 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
347 chip, addr, alen, buffer, len);
348
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200349#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
wdenkc6097192002-11-03 00:24:07 +0000350 /*
351 * EEPROM chips that implement "address overflow" are ones
352 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
353 * address and the extra bits end up in the "chip address"
354 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
355 * four 256 byte chips.
356 *
357 * Note that we consider the length of the address field to
358 * still be one byte because the extra address bits are
359 * hidden in the chip address.
360 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200361 chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
wdenkc6097192002-11-03 00:24:07 +0000362
363 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
364 chip, addr);
365#endif
366
367 /*
368 * Do the addressing portion of a write cycle to set the
369 * chip's address pointer. If the address length is zero,
370 * don't do the normal write cycle to set the address pointer,
371 * there is no address pointer in this chip.
372 */
373 send_start();
374 if(alen > 0) {
375 if(write_byte(chip << 1)) { /* write cycle */
376 send_stop();
377 PRINTD("i2c_read, no chip responded %02X\n", chip);
378 return(1);
379 }
380 shift = (alen-1) * 8;
381 while(alen-- > 0) {
382 if(write_byte(addr >> shift)) {
383 PRINTD("i2c_read, address not <ACK>ed\n");
384 return(1);
385 }
386 shift -= 8;
387 }
Andrew Dyer2ac69852008-12-29 17:36:01 -0600388
389 /* Some I2C chips need a stop/start sequence here,
390 * other chips don't work with a full stop and need
391 * only a start. Default behaviour is to send the
392 * stop/start sequence.
393 */
394#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
wdenkc6097192002-11-03 00:24:07 +0000395 send_start();
Andrew Dyer2ac69852008-12-29 17:36:01 -0600396#else
397 send_stop();
398 send_start();
399#endif
wdenkc6097192002-11-03 00:24:07 +0000400 }
401 /*
402 * Send the chip address again, this time for a read cycle.
403 * Then read the data. On the last byte, we do a NACK instead
404 * of an ACK(len == 0) to terminate the read.
405 */
406 write_byte((chip << 1) | 1); /* read cycle */
407 while(len-- > 0) {
408 *buffer++ = read_byte(len == 0);
409 }
410 send_stop();
411 return(0);
412}
413
414/*-----------------------------------------------------------------------
415 * Write bytes
416 */
417int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
418{
419 int shift, failures = 0;
420
421 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
422 chip, addr, alen, buffer, len);
423
424 send_start();
425 if(write_byte(chip << 1)) { /* write cycle */
426 send_stop();
427 PRINTD("i2c_write, no chip responded %02X\n", chip);
428 return(1);
429 }
430 shift = (alen-1) * 8;
431 while(alen-- > 0) {
432 if(write_byte(addr >> shift)) {
433 PRINTD("i2c_write, address not <ACK>ed\n");
434 return(1);
435 }
436 shift -= 8;
437 }
438
439 while(len-- > 0) {
440 if(write_byte(*buffer++)) {
441 failures++;
442 }
443 }
444 send_stop();
445 return(failures);
446}