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Dirk Behme9d0fc812009-01-28 21:39:57 +01001/*
2 * Maintainer : Steve Sakoman <steve@sakoman.com>
3 *
4 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
5 * Richard Woodruff <r-woodruff2@ti.com>
6 * Syed Mohammed Khasim <khasim@ti.com>
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
9 *
10 * (C) Copyright 2004-2008
11 * Texas Instruments, <www.ti.com>
12 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020013 * SPDX-License-Identifier: GPL-2.0+
Dirk Behme9d0fc812009-01-28 21:39:57 +010014 */
15#include <common.h>
Olof Johanssondf382622009-09-29 10:22:45 -040016#include <netdev.h>
Tom Rix2c155132009-06-28 12:52:30 -050017#include <twl4030.h>
Andreas Müller137703b2012-01-04 15:26:25 +000018#include <linux/mtd/nand.h>
Dirk Behme9d0fc812009-01-28 21:39:57 +010019#include <asm/io.h>
Steve Sakomancd7c5722010-09-19 21:21:07 -070020#include <asm/arch/mmc_host_def.h>
Dirk Behme9d0fc812009-01-28 21:39:57 +010021#include <asm/arch/mux.h>
Olof Johanssondf382622009-09-29 10:22:45 -040022#include <asm/arch/mem.h>
Dirk Behme9d0fc812009-01-28 21:39:57 +010023#include <asm/arch/sys_proto.h>
Andreas Bießmann5bf299b2013-04-02 06:05:54 +000024#include <asm/omap_gpmc.h>
Sanjeev Premi84c3b632011-09-08 10:51:01 -040025#include <asm/gpio.h>
Dirk Behme9d0fc812009-01-28 21:39:57 +010026#include <asm/mach-types.h>
27#include "overo.h"
28
John Rigby29565322010-12-20 18:27:51 -070029DECLARE_GLOBAL_DATA_PTR;
30
Steve Sakomand64b5b82010-09-20 08:05:14 -070031#define TWL4030_I2C_BUS 0
32#define EXPANSION_EEPROM_I2C_BUS 2
33#define EXPANSION_EEPROM_I2C_ADDRESS 0x51
34
35#define GUMSTIX_SUMMIT 0x01000200
36#define GUMSTIX_TOBI 0x02000200
37#define GUMSTIX_TOBI_DUO 0x03000200
38#define GUMSTIX_PALO35 0x04000200
39#define GUMSTIX_PALO43 0x05000200
40#define GUMSTIX_CHESTNUT43 0x06000200
41#define GUMSTIX_PINTO 0x07000200
42#define GUMSTIX_GALLOP43 0x08000200
43
44#define ETTUS_USRP_E 0x01000300
45
46#define GUMSTIX_NO_EEPROM 0xffffffff
47
48static struct {
49 unsigned int device_vendor;
50 unsigned char revision;
51 unsigned char content;
52 char fab_revision[8];
53 char env_var[16];
54 char env_setting[64];
55} expansion_config;
56
Olof Johanssondf382622009-09-29 10:22:45 -040057#if defined(CONFIG_CMD_NET)
58static void setup_net_chip(void);
59#endif
60
Steve Sakomanba9a11e2010-08-12 21:07:02 -070061/* GPMC definitions for LAN9221 chips on Tobi expansion boards */
62static const u32 gpmc_lan_config[] = {
63 NET_LAN9221_GPMC_CONFIG1,
64 NET_LAN9221_GPMC_CONFIG2,
65 NET_LAN9221_GPMC_CONFIG3,
66 NET_LAN9221_GPMC_CONFIG4,
67 NET_LAN9221_GPMC_CONFIG5,
68 NET_LAN9221_GPMC_CONFIG6,
69 /*CONFIG7- computed as params */
70};
71
Tom Rix58911512009-04-01 22:02:20 -050072/*
Dirk Behme9d0fc812009-01-28 21:39:57 +010073 * Routine: board_init
74 * Description: Early hardware init.
Tom Rix58911512009-04-01 22:02:20 -050075 */
Dirk Behme9d0fc812009-01-28 21:39:57 +010076int board_init(void)
77{
Dirk Behme9d0fc812009-01-28 21:39:57 +010078 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
79 /* board id for Linux */
80 gd->bd->bi_arch_number = MACH_TYPE_OVERO;
81 /* boot param addr */
82 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
83
84 return 0;
85}
86
Tom Rix58911512009-04-01 22:02:20 -050087/*
Steve Sakomanc2d5b342010-08-12 15:13:02 -070088 * Routine: get_board_revision
89 * Description: Returns the board revision
90 */
91int get_board_revision(void)
92{
93 int revision;
94
Andreas Müller137703b2012-01-04 15:26:25 +000095#ifdef CONFIG_DRIVER_OMAP34XX_I2C
96 unsigned char data;
97
98 /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
99 /* these boards should return a revision number of 0 */
100 /* the code below forces a 4030 RTC irq to ensure that gpio112 is low */
101 i2c_set_bus_num(TWL4030_I2C_BUS);
102 data = 0x01;
103 i2c_write(0x4B, 0x29, 1, &data, 1);
104 data = 0x0c;
105 i2c_write(0x4B, 0x2b, 1, &data, 1);
106 i2c_read(0x4B, 0x2a, 1, &data, 1);
107#endif
108
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400109 if (!gpio_request(112, "") &&
110 !gpio_request(113, "") &&
111 !gpio_request(115, "")) {
Steve Sakomanc2d5b342010-08-12 15:13:02 -0700112
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400113 gpio_direction_input(112);
114 gpio_direction_input(113);
115 gpio_direction_input(115);
Steve Sakomanc2d5b342010-08-12 15:13:02 -0700116
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400117 revision = gpio_get_value(115) << 2 |
118 gpio_get_value(113) << 1 |
119 gpio_get_value(112);
Steve Sakomanc2d5b342010-08-12 15:13:02 -0700120 } else {
Andreas Müllerbae485d2012-01-04 15:26:20 +0000121 puts("Error: unable to acquire board revision GPIOs\n");
Steve Sakomanc2d5b342010-08-12 15:13:02 -0700122 revision = -1;
123 }
124
125 return revision;
126}
127
Andreas Müller137703b2012-01-04 15:26:25 +0000128#ifdef CONFIG_SPL_BUILD
129/*
130 * Routine: get_board_mem_timings
131 * Description: If we use SPL then there is no x-loader nor config header
132 * so we have to setup the DDR timings ourself on both banks.
133 */
Peter Barada8c4445d2012-11-13 07:40:28 +0000134void get_board_mem_timings(struct board_sdrc_timings *timings)
Andreas Müller137703b2012-01-04 15:26:25 +0000135{
Peter Barada8c4445d2012-11-13 07:40:28 +0000136 timings->mr = MICRON_V_MR_165;
Andreas Müller137703b2012-01-04 15:26:25 +0000137 switch (get_board_revision()) {
138 case REVISION_0: /* Micron 1286MB/256MB, 1/2 banks of 128MB */
Peter Barada8c4445d2012-11-13 07:40:28 +0000139 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
140 timings->ctrla = MICRON_V_ACTIMA_165;
141 timings->ctrlb = MICRON_V_ACTIMB_165;
142 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
Andreas Müller137703b2012-01-04 15:26:25 +0000143 break;
144 case REVISION_1: /* Micron 256MB/512MB, 1/2 banks of 256MB */
Ash Charles802b3c72013-07-24 12:22:35 -0700145 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
146 timings->ctrla = MICRON_V_ACTIMA_200;
147 timings->ctrlb = MICRON_V_ACTIMB_200;
148 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
Andreas Müller137703b2012-01-04 15:26:25 +0000149 break;
150 case REVISION_2: /* Hynix 256MB/512MB, 1/2 banks of 256MB */
Ash Charles802b3c72013-07-24 12:22:35 -0700151 timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
152 timings->ctrla = HYNIX_V_ACTIMA_200;
153 timings->ctrlb = HYNIX_V_ACTIMB_200;
154 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
Andreas Müller137703b2012-01-04 15:26:25 +0000155 break;
Steve Sakoman49720a42013-07-24 12:22:34 -0700156 case REVISION_3: /* Micron 512MB/1024MB, 1/2 banks of 512MB */
157 timings->mcfg = MCFG(512 << 20, 15);
158 timings->ctrla = MICRON_V_ACTIMA_200;
159 timings->ctrlb = MICRON_V_ACTIMB_200;
160 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
161 break;
Andreas Müller137703b2012-01-04 15:26:25 +0000162 default:
Peter Barada8c4445d2012-11-13 07:40:28 +0000163 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
164 timings->ctrla = MICRON_V_ACTIMA_165;
165 timings->ctrlb = MICRON_V_ACTIMB_165;
166 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
Andreas Müller137703b2012-01-04 15:26:25 +0000167 }
168}
169#endif
170
Steve Sakomanc2d5b342010-08-12 15:13:02 -0700171/*
Steve Sakomana06e1622010-08-24 10:37:29 -0700172 * Routine: get_sdio2_config
173 * Description: Return information about the wifi module connection
174 * Returns 0 if the module connects though a level translator
175 * Returns 1 if the module connects directly
176 */
177int get_sdio2_config(void)
178{
179 int sdio_direct;
180
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400181 if (!gpio_request(130, "") && !gpio_request(139, "")) {
Steve Sakomana06e1622010-08-24 10:37:29 -0700182
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400183 gpio_direction_output(130, 0);
184 gpio_direction_input(139);
Steve Sakomana06e1622010-08-24 10:37:29 -0700185
186 sdio_direct = 1;
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400187 gpio_set_value(130, 0);
188 if (gpio_get_value(139) == 0) {
189 gpio_set_value(130, 1);
190 if (gpio_get_value(139) == 1)
Steve Sakomana06e1622010-08-24 10:37:29 -0700191 sdio_direct = 0;
192 }
193
Joe Hershbergerb5db0a02011-10-12 10:31:44 +0000194 gpio_direction_input(130);
Steve Sakomana06e1622010-08-24 10:37:29 -0700195 } else {
Andreas Müllerbae485d2012-01-04 15:26:20 +0000196 puts("Error: unable to acquire sdio2 clk GPIOs\n");
Steve Sakomana06e1622010-08-24 10:37:29 -0700197 sdio_direct = -1;
198 }
199
200 return sdio_direct;
201}
202
203/*
Steve Sakomand64b5b82010-09-20 08:05:14 -0700204 * Routine: get_expansion_id
205 * Description: This function checks for expansion board by checking I2C
206 * bus 2 for the availability of an AT24C01B serial EEPROM.
207 * returns the device_vendor field from the EEPROM
208 */
209unsigned int get_expansion_id(void)
210{
211 i2c_set_bus_num(EXPANSION_EEPROM_I2C_BUS);
212
213 /* return GUMSTIX_NO_EEPROM if eeprom doesn't respond */
214 if (i2c_probe(EXPANSION_EEPROM_I2C_ADDRESS) == 1) {
215 i2c_set_bus_num(TWL4030_I2C_BUS);
216 return GUMSTIX_NO_EEPROM;
217 }
218
219 /* read configuration data */
220 i2c_read(EXPANSION_EEPROM_I2C_ADDRESS, 0, 1, (u8 *)&expansion_config,
221 sizeof(expansion_config));
222
223 i2c_set_bus_num(TWL4030_I2C_BUS);
224
225 return expansion_config.device_vendor;
226}
227
228/*
Dirk Behme9d0fc812009-01-28 21:39:57 +0100229 * Routine: misc_init_r
230 * Description: Configure board specific parts
Tom Rix58911512009-04-01 22:02:20 -0500231 */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100232int misc_init_r(void)
233{
Tom Rix2c155132009-06-28 12:52:30 -0500234 twl4030_power_init();
Grazvydas Ignotasead39d72009-12-10 17:10:21 +0200235 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
Dirk Behme9d0fc812009-01-28 21:39:57 +0100236
Olof Johanssondf382622009-09-29 10:22:45 -0400237#if defined(CONFIG_CMD_NET)
238 setup_net_chip();
239#endif
240
Steve Sakomanc2d5b342010-08-12 15:13:02 -0700241 printf("Board revision: %d\n", get_board_revision());
Steve Sakomana06e1622010-08-24 10:37:29 -0700242
243 switch (get_sdio2_config()) {
244 case 0:
Andreas Müllerbae485d2012-01-04 15:26:20 +0000245 puts("Tranceiver detected on mmc2\n");
Steve Sakomana06e1622010-08-24 10:37:29 -0700246 MUX_OVERO_SDIO2_TRANSCEIVER();
247 break;
248 case 1:
Andreas Müllerbae485d2012-01-04 15:26:20 +0000249 puts("Direct connection on mmc2\n");
Steve Sakomana06e1622010-08-24 10:37:29 -0700250 MUX_OVERO_SDIO2_DIRECT();
251 break;
252 default:
Andreas Müllerbae485d2012-01-04 15:26:20 +0000253 puts("Unable to detect mmc2 connection type\n");
Steve Sakomana06e1622010-08-24 10:37:29 -0700254 }
255
Steve Sakomand64b5b82010-09-20 08:05:14 -0700256 switch (get_expansion_id()) {
257 case GUMSTIX_SUMMIT:
258 printf("Recognized Summit expansion board (rev %d %s)\n",
259 expansion_config.revision,
260 expansion_config.fab_revision);
261 setenv("defaultdisplay", "dvi");
262 break;
263 case GUMSTIX_TOBI:
264 printf("Recognized Tobi expansion board (rev %d %s)\n",
265 expansion_config.revision,
266 expansion_config.fab_revision);
267 setenv("defaultdisplay", "dvi");
268 break;
269 case GUMSTIX_TOBI_DUO:
270 printf("Recognized Tobi Duo expansion board (rev %d %s)\n",
271 expansion_config.revision,
272 expansion_config.fab_revision);
Philip Balister8f7109b2011-10-11 11:23:22 +0000273 /* second lan chip */
274 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[4],
275 0x2B000000, GPMC_SIZE_16M);
Steve Sakomand64b5b82010-09-20 08:05:14 -0700276 break;
277 case GUMSTIX_PALO35:
278 printf("Recognized Palo35 expansion board (rev %d %s)\n",
279 expansion_config.revision,
280 expansion_config.fab_revision);
281 setenv("defaultdisplay", "lcd35");
282 break;
283 case GUMSTIX_PALO43:
284 printf("Recognized Palo43 expansion board (rev %d %s)\n",
285 expansion_config.revision,
286 expansion_config.fab_revision);
287 setenv("defaultdisplay", "lcd43");
288 break;
289 case GUMSTIX_CHESTNUT43:
290 printf("Recognized Chestnut43 expansion board (rev %d %s)\n",
291 expansion_config.revision,
292 expansion_config.fab_revision);
293 setenv("defaultdisplay", "lcd43");
294 break;
295 case GUMSTIX_PINTO:
296 printf("Recognized Pinto expansion board (rev %d %s)\n",
297 expansion_config.revision,
298 expansion_config.fab_revision);
299 break;
300 case GUMSTIX_GALLOP43:
301 printf("Recognized Gallop43 expansion board (rev %d %s)\n",
302 expansion_config.revision,
303 expansion_config.fab_revision);
304 setenv("defaultdisplay", "lcd43");
305 break;
306 case ETTUS_USRP_E:
307 printf("Recognized Ettus Research USRP-E (rev %d %s)\n",
308 expansion_config.revision,
309 expansion_config.fab_revision);
310 MUX_USRP_E();
311 setenv("defaultdisplay", "dvi");
312 break;
313 case GUMSTIX_NO_EEPROM:
Andreas Müllerbae485d2012-01-04 15:26:20 +0000314 puts("No EEPROM on expansion board\n");
Steve Sakomand64b5b82010-09-20 08:05:14 -0700315 break;
316 default:
Andreas Müllerbae485d2012-01-04 15:26:20 +0000317 puts("Unrecognized expansion board\n");
Steve Sakomand64b5b82010-09-20 08:05:14 -0700318 }
319
320 if (expansion_config.content == 1)
321 setenv(expansion_config.env_var, expansion_config.env_setting);
322
Dirk Behmee6a6a702009-03-12 19:30:50 +0100323 dieid_num_r();
324
Dirk Behme9d0fc812009-01-28 21:39:57 +0100325 return 0;
326}
327
Tom Rix58911512009-04-01 22:02:20 -0500328/*
Dirk Behme9d0fc812009-01-28 21:39:57 +0100329 * Routine: set_muxconf_regs
330 * Description: Setting up the configuration Mux registers specific to the
331 * hardware. Many pins need to be moved from protect to primary
332 * mode.
Tom Rix58911512009-04-01 22:02:20 -0500333 */
Dirk Behme9d0fc812009-01-28 21:39:57 +0100334void set_muxconf_regs(void)
335{
336 MUX_OVERO();
337}
Olof Johanssondf382622009-09-29 10:22:45 -0400338
339#if defined(CONFIG_CMD_NET)
340/*
341 * Routine: setup_net_chip
342 * Description: Setting up the configuration GPMC registers specific to the
343 * Ethernet hardware.
344 */
345static void setup_net_chip(void)
346{
347 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
348
Steve Sakomanba9a11e2010-08-12 21:07:02 -0700349 /* first lan chip */
350 enable_gpmc_cs_config(gpmc_lan_config, &gpmc_cfg->cs[5], 0x2C000000,
351 GPMC_SIZE_16M);
352
Olof Johanssondf382622009-09-29 10:22:45 -0400353 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
354 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
355 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
356 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
357 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
358 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
359 &ctrl_base->gpmc_nadv_ale);
360
361 /* Make GPIO 64 as output pin and send a magic pulse through it */
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400362 if (!gpio_request(64, "")) {
363 gpio_direction_output(64, 0);
364 gpio_set_value(64, 1);
Olof Johanssondf382622009-09-29 10:22:45 -0400365 udelay(1);
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400366 gpio_set_value(64, 0);
Olof Johanssondf382622009-09-29 10:22:45 -0400367 udelay(1);
Sanjeev Premi84c3b632011-09-08 10:51:01 -0400368 gpio_set_value(64, 1);
Olof Johanssondf382622009-09-29 10:22:45 -0400369 }
370}
371#endif
372
373int board_eth_init(bd_t *bis)
374{
375 int rc = 0;
376#ifdef CONFIG_SMC911X
377 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
378#endif
379 return rc;
380}
Steve Sakomancd7c5722010-09-19 21:21:07 -0700381
Andreas Müller137703b2012-01-04 15:26:25 +0000382#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
Steve Sakomancd7c5722010-09-19 21:21:07 -0700383int board_mmc_init(bd_t *bis)
384{
Nikita Kiryanove3913f52012-12-03 02:19:47 +0000385 return omap_mmc_init(0, 0, 0, -1, -1);
Steve Sakomancd7c5722010-09-19 21:21:07 -0700386}
387#endif