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Marek Vasutd5914012011-01-19 04:40:37 +00001/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27#include <config_cmd_default.h>
28
29/*
30 * High Level Board Configuration Options
31 */
32/* An i.MX51 CPU */
33#define CONFIG_MX51
Marek Vasutaf708cb2011-09-25 09:55:43 +000034
35#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
36#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
37
Marek Vasutd5914012011-01-19 04:40:37 +000038#include <asm/arch/imx-regs.h>
39
40#define CONFIG_SYS_MX5_HCLK 24000000
41#define CONFIG_SYS_MX5_CLK32 32768
42#define CONFIG_DISPLAY_CPUINFO
43#define CONFIG_DISPLAY_BOARDINFO
44
Jana Rapava745525f2011-07-11 14:16:44 +000045#define CONFIG_SYS_TEXT_BASE 0x97800000
46
Marek Vasutd5914012011-01-19 04:40:37 +000047/*
48 * Bootloader Components Configuration
49 */
50#define CONFIG_CMD_SPI
51#define CONFIG_CMD_SF
52#define CONFIG_CMD_MMC
53#define CONFIG_CMD_FAT
Marek Vasut4e0499e2011-07-11 14:16:45 +000054#define CONFIG_CMD_EXT2
Marek Vasutd5914012011-01-19 04:40:37 +000055#define CONFIG_CMD_IDE
56#undef CONFIG_CMD_IMLS
57
58/*
59 * Environmental settings
60 */
61
62#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
63#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
64#define CONFIG_ENV_SIZE (4 * 1024)
65
66/*
67 * ATAG setup
68 */
69#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
70#define CONFIG_REVISION_TAG
71#define CONFIG_SETUP_MEMORY_TAGS
72#define CONFIG_INITRD_TAG
73
Grant Likely2fa8ca92011-03-28 09:59:07 +000074#define CONFIG_OF_LIBFDT 1
75
Marek Vasutd5914012011-01-19 04:40:37 +000076/*
77 * Size of malloc() pool
78 */
79#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
80
81#define CONFIG_BOARD_EARLY_INIT_F
Helmut Raiger9660e442011-10-20 04:19:47 +000082#define CONFIG_BOARD_LATE_INIT
Marek Vasutd5914012011-01-19 04:40:37 +000083
84/*
85 * Hardware drivers
86 */
87#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010088#define CONFIG_MXC_UART_BASE UART1_BASE
Marek Vasutd5914012011-01-19 04:40:37 +000089#define CONFIG_CONS_INDEX 1
90#define CONFIG_BAUDRATE 115200
91#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
92
93#define CONFIG_MXC_GPIO
94
95/*
96 * SPI Interface
97 */
98#ifdef CONFIG_CMD_SPI
99
100#define CONFIG_HARD_SPI
101#define CONFIG_MXC_SPI
102#define CONFIG_DEFAULT_SPI_BUS 1
103#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
104
105/* SPI FLASH */
106#ifdef CONFIG_CMD_SF
107
108#define CONFIG_SPI_FLASH
109#define CONFIG_SPI_FLASH_SST
110#define CONFIG_SPI_FLASH_CS (1 | 121 << 8)
111#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
112#define CONFIG_SF_DEFAULT_SPEED 25000000
113
114#define CONFIG_ENV_SPI_CS (1 | 121 << 8)
115#define CONFIG_ENV_SPI_BUS 0
116#define CONFIG_ENV_SPI_MAX_HZ 25000000
117#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
118#define CONFIG_FSL_ENV_IN_SF
119#define CONFIG_ENV_IS_IN_SPI_FLASH
120#define CONFIG_SYS_NO_FLASH
121
122#else
123#define CONFIG_ENV_IS_NOWHERE
124#endif
125
126/* SPI PMIC */
Stefano Babic9c38f7d2011-10-06 11:44:26 +0200127#define CONFIG_PMIC
128#define CONFIG_PMIC_SPI
129#define CONFIG_PMIC_FSL
Marek Vasutd5914012011-01-19 04:40:37 +0000130#define CONFIG_FSL_PMIC_BUS 0
131#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
132#define CONFIG_FSL_PMIC_CLK 25000000
133#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Stefano Babic9c38f7d2011-10-06 11:44:26 +0200134#define CONFIG_FSL_PMIC_BITLEN 32
Fabio Estevam4e8b7542011-10-24 06:44:15 +0000135#define CONFIG_RTC_MC13XXX
Marek Vasutd5914012011-01-19 04:40:37 +0000136#endif
137
138/*
139 * MMC Configs
140 */
141#ifdef CONFIG_CMD_MMC
142#define CONFIG_MMC
143#define CONFIG_GENERIC_MMC
144#define CONFIG_FSL_ESDHC
145#define CONFIG_SYS_FSL_ESDHC_ADDR 0
146#define CONFIG_SYS_FSL_ESDHC_NUM 2
147#endif
148
149/*
150 * ATA/IDE
151 */
152#ifdef CONFIG_CMD_IDE
153#define CONFIG_LBA48
154#undef CONFIG_IDE_LED
155#undef CONFIG_IDE_RESET
156
157#define CONFIG_MX51_PATA
158
159#define __io
160
161#define CONFIG_SYS_IDE_MAXBUS 1
162#define CONFIG_SYS_IDE_MAXDEVICE 1
163
164#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
165#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
166
167#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
168#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
169#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
170
171#define CONFIG_SYS_ATA_STRIDE 4
172
173#define CONFIG_IDE_PREINIT
174#define CONFIG_MXC_ATA_PIO_MODE 4
175#endif
176
177/*
178 * Filesystems
179 */
180#ifdef CONFIG_CMD_FAT
181#define CONFIG_DOS_PARTITION
182#endif
183
184#undef CONFIG_CMD_PING
185#undef CONFIG_CMD_DHCP
186#undef CONFIG_CMD_NET
187#undef CONFIG_CMD_NFS
188#define CONFIG_CMD_DATE
189
190/*
191 * Miscellaneous configurable options
192 */
193#define CONFIG_ENV_OVERWRITE
194#define CONFIG_BOOTDELAY 3
195#define CONFIG_LOADADDR 0x90800000
196
197#define CONFIG_SYS_LONGHELP /* undef to save memory */
198#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
199#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
200#define CONFIG_SYS_PROMPT "Efika> "
201#define CONFIG_AUTO_COMPLETE
202#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
203/* Print Buffer Size */
204#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
205#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
206#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
207
208#define CONFIG_SYS_MEMTEST_START 0x90000000
209#define CONFIG_SYS_MEMTEST_END 0x10000
210
211#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
212
213#define CONFIG_SYS_HZ 1000
214#define CONFIG_CMDLINE_EDITING
215
216/*-----------------------------------------------------------------------
217 * Stack sizes
218 *
219 * The stack sizes are set up in start.S using the settings below
220 */
221#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
222
223/*-----------------------------------------------------------------------
224 * Physical Memory Map
225 */
226#define CONFIG_NR_DRAM_BANKS 1
227#define PHYS_SDRAM_1 CSD0_BASE_ADDR
228#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
229
230#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
231#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
232#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
233
234#define CONFIG_SYS_INIT_SP_OFFSET \
235 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
236#define CONFIG_SYS_INIT_SP_ADDR \
237 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
238
239#define CONFIG_SYS_DDR_CLKSEL 0
Marek Vasutb7171d92011-09-14 18:16:57 +0000240#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
Marek Vasutd5914012011-01-19 04:40:37 +0000241
242#endif