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wdenk5e5f9ed2005-04-13 23:15:10 +00001/*
2 * (C) Copyright 2005
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 * (easy to change)
30 */
31
32#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
33#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
Wolfgang Denk53677ef2008-05-20 16:00:29 +020034#define CONFIG_CANMB 1 /* ... on canmb board - we need this for FEC.C */
wdenk5e5f9ed2005-04-13 23:15:10 +000035
Wolfgang Denk2ae18242010-10-06 09:05:45 +020036/*
37 * allowed and functional CONFIG_SYS_TEXT_BASE values:
38 * 0xfe000000 low boot at 0x00000100 (default board setting)
39 * 0x00100000 RAM load and test
40 */
41#define CONFIG_SYS_TEXT_BASE 0xFE000000
42
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk5e5f9ed2005-04-13 23:15:10 +000044
wdenk5e5f9ed2005-04-13 23:15:10 +000045#define CONFIG_BOARD_EARLY_INIT_R
46
Becky Bruce31d82672008-05-08 19:02:12 -050047#define CONFIG_HIGH_BATS 1 /* High BATs supported */
48
wdenk5e5f9ed2005-04-13 23:15:10 +000049/*
50 * Serial console configuration
51 */
52#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
53#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
wdenk5e5f9ed2005-04-13 23:15:10 +000055
wdenk5e5f9ed2005-04-13 23:15:10 +000056
Jon Loeliger37e4f242007-07-04 22:31:56 -050057/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -050058 * BOOTP options
59 */
60#define CONFIG_BOOTP_BOOTFILESIZE
61#define CONFIG_BOOTP_BOOTPATH
62#define CONFIG_BOOTP_GATEWAY
63#define CONFIG_BOOTP_HOSTNAME
64
65
66/*
Jon Loeliger37e4f242007-07-04 22:31:56 -050067 * Command line configuration.
68 */
69#include <config_cmd_default.h>
70
71#define CONFIG_CMD_ASKENV
72#define CONFIG_CMD_DATE
73#define CONFIG_CMD_DHCP
74#define CONFIG_CMD_IMMAP
75#define CONFIG_CMD_MII
76#define CONFIG_CMD_NFS
77#define CONFIG_CMD_REGINFO
78#define CONFIG_CMD_SNTP
79
wdenk5e5f9ed2005-04-13 23:15:10 +000080
81/*
82 * MUST be low boot - HIGHBOOT is not supported anymore
83 */
Wolfgang Denk14d0a022010-10-07 21:51:12 +020084#if (CONFIG_SYS_TEXT_BASE == 0xFE000000) /* Boot low with 32 MB Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020085# define CONFIG_SYS_LOWBOOT 1
86# define CONFIG_SYS_LOWBOOT16 1
wdenk5e5f9ed2005-04-13 23:15:10 +000087#else
Wolfgang Denk14d0a022010-10-07 21:51:12 +020088# error "CONFIG_SYS_TEXT_BASE must be 0xFE000000"
wdenk5e5f9ed2005-04-13 23:15:10 +000089#endif
90
91/*
92 * Autobooting
93 */
94#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
95
96#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +010097 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk5e5f9ed2005-04-13 23:15:10 +000098 "echo"
99
100#undef CONFIG_BOOTARGS
101
102#define CONFIG_EXTRA_ENV_SETTINGS \
103 "netdev=eth0\0" \
104 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100105 "nfsroot=${serverip}:${rootpath}\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +0000106 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100107 "addip=setenv bootargs ${bootargs} " \
108 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
109 ":${hostname}:${netdev}:off panic=1\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +0000110 "flash_nfs=run nfsargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100111 "bootm ${kernel_addr}\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +0000112 "flash_self=run ramargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100113 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
114 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
wdenk5e5f9ed2005-04-13 23:15:10 +0000115 "rootpath=/opt/eldk/ppc_6xx\0" \
116 "bootfile=/tftpboot/canmb/uImage\0" \
117 ""
118
119#define CONFIG_BOOTCOMMAND "run flash_self"
120
121/*
122 * IPB Bus clocking configuration.
123 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenk5e5f9ed2005-04-13 23:15:10 +0000125
126/*
127 * Flash configuration, expect one 16 Megabyte Bank at most
128 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129#define CONFIG_SYS_FLASH_BASE 0xFE000000
130#define CONFIG_SYS_FLASH_SIZE 0x02000000
131#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
132#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
wdenk5e5f9ed2005-04-13 23:15:10 +0000133
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200134#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
135#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
wdenk5e5f9ed2005-04-13 23:15:10 +0000136
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200137#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200138#define CONFIG_SYS_FLASH_CFI
139#define CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5e5f9ed2005-04-13 23:15:10 +0000140
141/*
wdenk5e5f9ed2005-04-13 23:15:10 +0000142 * Environment settings
143 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200144#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200145#define CONFIG_ENV_OFFSET (2*128*1024)
146#define CONFIG_ENV_SIZE 0x2000
147#define CONFIG_ENV_SECT_SIZE (128*1024)
wdenk5e5f9ed2005-04-13 23:15:10 +0000148
149/*
150 * Memory map
151 *
152 * Warning!!! with the current BestComm Task, MBAR MUST BE set to 0xf0000000
153 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154#define CONFIG_SYS_MBAR 0xf0000000 /* DO NOT CHANGE this */
155#define CONFIG_SYS_SDRAM_BASE 0x00000000
156#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
wdenk5e5f9ed2005-04-13 23:15:10 +0000157
158/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200160#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
wdenk5e5f9ed2005-04-13 23:15:10 +0000161
162
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200163#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk5e5f9ed2005-04-13 23:15:10 +0000165
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200166#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
168# define CONFIG_SYS_RAMBOOT 1
wdenk5e5f9ed2005-04-13 23:15:10 +0000169#endif
170
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
172#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
173#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenk5e5f9ed2005-04-13 23:15:10 +0000174
175/*
176 * Ethernet configuration
177 */
178#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800179#define CONFIG_MPC5xxx_FEC_MII100
wdenka6310922005-04-21 21:10:22 +0000180#define CONFIG_PHY_ADDR 0x0
wdenk5e5f9ed2005-04-13 23:15:10 +0000181/*
182 * GPIO configuration:
183 * PSC1,2,3 predefined as UART
184 * PCI disabled
185 * Ethernet 100 with MD
186 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_GPS_PORT_CONFIG 0x00058444
wdenk5e5f9ed2005-04-13 23:15:10 +0000188
189/*
190 * Miscellaneous configurable options
191 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200192#define CONFIG_SYS_LONGHELP /* undef to save memory */
193#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500194#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000196#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200197# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000198#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200199#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
200#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
201#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk5e5f9ed2005-04-13 23:15:10 +0000202
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
204#define CONFIG_SYS_MEMTEST_END 0x01f00000 /* 1 ... 31 MB in DRAM */
wdenk5e5f9ed2005-04-13 23:15:10 +0000205
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
wdenk5e5f9ed2005-04-13 23:15:10 +0000207
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
wdenk5e5f9ed2005-04-13 23:15:10 +0000209
210#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
211
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500213#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500215#endif
216
wdenk5e5f9ed2005-04-13 23:15:10 +0000217/*
218 * Various low-level settings
219 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
221#define CONFIG_SYS_HID0_FINAL HID0_ICE
wdenk5e5f9ed2005-04-13 23:15:10 +0000222
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200223#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
224#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
225#define CONFIG_SYS_BOOTCS_CFG 0x00047D01
226#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
227#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
wdenk5e5f9ed2005-04-13 23:15:10 +0000228
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200229#define CONFIG_SYS_CS_BURST 0x00000000
230#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
wdenk5e5f9ed2005-04-13 23:15:10 +0000231
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_RESET_ADDRESS 0x7f000000
wdenk5e5f9ed2005-04-13 23:15:10 +0000233
234#endif /* __CONFIG_H */