wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
| 4 | * |
| 5 | * (C) Copyright 2002 |
| 6 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 7 | * Marius Groeger <mgroeger@sysgo.de> |
| 8 | * |
| 9 | * (C) Copyright 2002 |
| 10 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 11 | * Alex Zuepke <azu@sysgo.de> |
| 12 | * |
| 13 | * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, write to the Free Software |
| 27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 28 | * |
| 29 | */ |
| 30 | |
| 31 | #include <common.h> |
| 32 | #include <asm/arch/ixp425.h> |
Michael Schwingen | 009e464 | 2011-05-22 23:59:59 +0200 | [diff] [blame] | 33 | #include <watchdog.h> |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 34 | |
Jean-Christophe PLAGNIOL-VILLARD | 7b74ebe | 2007-12-08 16:34:08 +0100 | [diff] [blame] | 35 | /* |
| 36 | * 14.7456 MHz |
| 37 | * Baud Rate = -------------- |
| 38 | * 16 x Divisor |
| 39 | */ |
Wolfgang Denk | 07eb026 | 2008-01-09 13:43:38 +0100 | [diff] [blame] | 40 | #define SERIAL_CLOCK 921600 |
Jean-Christophe PLAGNIOL-VILLARD | 7b74ebe | 2007-12-08 16:34:08 +0100 | [diff] [blame] | 41 | |
Wolfgang Denk | d87080b | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 42 | DECLARE_GLOBAL_DATA_PTR; |
| 43 | |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 44 | void serial_setbrg (void) |
| 45 | { |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 46 | unsigned int quot = 0; |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 47 | int uart = CONFIG_SYS_IXP425_CONSOLE; |
Wolfgang Denk | 07eb026 | 2008-01-09 13:43:38 +0100 | [diff] [blame] | 48 | |
Jean-Christophe PLAGNIOL-VILLARD | 7b74ebe | 2007-12-08 16:34:08 +0100 | [diff] [blame] | 49 | if ((gd->baudrate <= SERIAL_CLOCK) && (SERIAL_CLOCK % gd->baudrate == 0)) |
| 50 | quot = SERIAL_CLOCK / gd->baudrate; |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 51 | else |
| 52 | hang (); |
| 53 | |
| 54 | IER(uart) = 0; /* Disable for now */ |
| 55 | FCR(uart) = 0; /* No fifos enabled */ |
| 56 | |
| 57 | /* set baud rate */ |
| 58 | LCR(uart) = LCR_WLS0 | LCR_WLS1 | LCR_DLAB; |
| 59 | DLL(uart) = quot & 0xff; |
| 60 | DLH(uart) = quot >> 8; |
| 61 | LCR(uart) = LCR_WLS0 | LCR_WLS1; |
Michael Schwingen | 96bd462 | 2008-01-10 14:59:46 +0100 | [diff] [blame] | 62 | #ifdef CONFIG_SERIAL_RTS_ACTIVE |
| 63 | MCR(uart) = MCR_RTS; /* set RTS active */ |
| 64 | #else |
| 65 | MCR(uart) = 0; /* set RTS inactive */ |
| 66 | #endif |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 67 | IER(uart) = IER_UUE; |
| 68 | } |
| 69 | |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 70 | /* |
| 71 | * Initialise the serial port with the given baudrate. The settings |
| 72 | * are always 8 data bits, no parity, 1 stop bit, no start bits. |
| 73 | * |
| 74 | */ |
| 75 | int serial_init (void) |
| 76 | { |
| 77 | serial_setbrg (); |
| 78 | |
| 79 | return (0); |
| 80 | } |
| 81 | |
| 82 | |
| 83 | /* |
| 84 | * Output a single byte to the serial port. |
| 85 | */ |
| 86 | void serial_putc (const char c) |
| 87 | { |
| 88 | /* wait for room in the tx FIFO on UART */ |
Michael Schwingen | 009e464 | 2011-05-22 23:59:59 +0200 | [diff] [blame] | 89 | while ((LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_TEMT) == 0) |
| 90 | WATCHDOG_RESET(); /* Reset HW Watchdog, if needed */ |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 91 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 92 | THR(CONFIG_SYS_IXP425_CONSOLE) = c; |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 93 | |
| 94 | /* If \n, also do \r */ |
| 95 | if (c == '\n') |
| 96 | serial_putc ('\r'); |
| 97 | } |
| 98 | |
| 99 | /* |
| 100 | * Read a single byte from the serial port. Returns 1 on success, 0 |
| 101 | * otherwise. When the function is succesfull, the character read is |
| 102 | * written into its argument c. |
| 103 | */ |
| 104 | int serial_tstc (void) |
| 105 | { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 106 | return LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_DR; |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | /* |
| 110 | * Read a single byte from the serial port. Returns 1 on success, 0 |
| 111 | * otherwise. When the function is succesfull, the character read is |
| 112 | * written into its argument c. |
| 113 | */ |
| 114 | int serial_getc (void) |
| 115 | { |
Michael Schwingen | 009e464 | 2011-05-22 23:59:59 +0200 | [diff] [blame] | 116 | while (!(LSR(CONFIG_SYS_IXP425_CONSOLE) & LSR_DR)) |
| 117 | WATCHDOG_RESET(); /* Reset HW Watchdog, if needed */ |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 118 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | return (char) RBR(CONFIG_SYS_IXP425_CONSOLE) & 0xff; |
wdenk | 2d5b561 | 2003-10-14 19:43:55 +0000 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | void |
| 123 | serial_puts (const char *s) |
| 124 | { |
| 125 | while (*s) { |
| 126 | serial_putc (*s++); |
| 127 | } |
| 128 | } |