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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Nikita Kiryanov8883dda2015-07-30 23:56:23 +03002/*
3 * cm_t43.h
4 *
5 * Copyright (C) 2015 Compulab, Ltd.
Nikita Kiryanov8883dda2015-07-30 23:56:23 +03006 */
7
8#ifndef __CONFIG_CM_T43_H
9#define __CONFIG_CM_T43_H
10
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030011#define CONFIG_CM_T43
12#define CONFIG_ARCH_CPU_INIT
13#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2GB */
14#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
15
16#include <asm/arch/omap.h>
17
18/* Serial support */
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030019#define CONFIG_SYS_NS16550_SERIAL
20#define CONFIG_SYS_NS16550_CLK 48000000
21#define CONFIG_SYS_NS16550_COM1 0x44e09000
Tom Rinif2d78c12017-06-09 16:59:17 -040022#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
Nikita Kiryanov7ef77c02016-02-19 19:19:42 +020023#define CONFIG_SYS_NS16550_REG_SIZE (-4)
24#endif
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030025
26/* NAND support */
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030027#define CONFIG_SYS_NAND_ONFI_DETECTION
28#define CONFIG_SYS_NAND_5_ADDR_CYCLE
29#define CONFIG_SYS_NAND_PAGE_SIZE 2048
30#define CONFIG_SYS_NAND_OOBSIZE 64
31#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
32#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
33#define CONFIG_SYS_NAND_ECCSIZE 512
34#define CONFIG_SYS_NAND_ECCBYTES 14
35#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
36#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
37 CONFIG_SYS_NAND_PAGE_SIZE)
38#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
39 10, 11, 12, 13, 14, 15, 16, 17, \
40 18, 19, 20, 21, 22, 23, 24, 25, \
41 26, 27, 28, 29, 30, 31, 32, 33, \
42 34, 35, 36, 37, 38, 39, 40, 41, \
43 42, 43, 44, 45, 46, 47, 48, 49, \
44 50, 51, 52, 53, 54, 55, 56, 57, }
45
46/* CPSW Ethernet support */
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030047#define CONFIG_BOOTP_DEFAULT
48#define CONFIG_BOOTP_SEND_HOSTNAME
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030049#define CONFIG_PHY_ATHEROS
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030050#define CONFIG_SYS_RX_ETH_BUFFER 64
51
52/* USB support */
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030053#define CONFIG_USB_XHCI_OMAP
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030054#define CONFIG_AM437X_USB2PHY2_HOST
55
56/* SPI Flash support */
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030057#define CONFIG_TI_SPI_MMAP
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030058
59/* Power */
60#define CONFIG_POWER
61#define CONFIG_POWER_I2C
62#define CONFIG_POWER_TPS65218
63
64/* Enabling L2 Cache */
65#define CONFIG_SYS_L2_PL310
66#define CONFIG_SYS_PL310_BASE 0x48242000
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030067
68/*
69 * Since SPL did pll and ddr initialization for us,
70 * we don't need to do it twice.
71 */
72#if !defined(CONFIG_SPL_BUILD)
73#define CONFIG_SKIP_LOWLEVEL_INIT
74#endif
75
76#define CONFIG_HSMMC2_8BIT
77
78#include <configs/ti_armv7_omap.h>
Nikita Kiryanov7d751d62016-02-19 19:19:50 +020079#undef CONFIG_SYS_MONITOR_LEN
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030080
81#define CONFIG_ENV_SIZE (16 * 1024)
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030082
83#define V_OSCK 24000000 /* Clock output from T2 */
84#define V_SCLK (V_OSCK)
85
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030086#define CONFIG_ENV_SECT_SIZE (64 * 1024)
87#define CONFIG_ENV_OFFSET (768 * 1024)
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030088
Nikita Kiryanov8883dda2015-07-30 23:56:23 +030089#define CONFIG_EXTRA_ENV_SETTINGS \
90 "loadaddr=0x80200000\0" \
91 "fdtaddr=0x81200000\0" \
92 "bootm_size=0x8000000\0" \
93 "autoload=no\0" \
94 "console=ttyO0,115200n8\0" \
95 "fdtfile=am437x-sb-som-t43.dtb\0" \
96 "kernel=zImage-cm-t43\0" \
97 "bootscr=bootscr.img\0" \
98 "emmcroot=/dev/mmcblk0p2 rw\0" \
99 "emmcrootfstype=ext4 rootwait\0" \
100 "emmcargs=setenv bootargs console=${console} " \
101 "root=${emmcroot} " \
102 "rootfstype=${emmcrootfstype}\0" \
103 "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
104 "bootscript=echo Running bootscript from mmc ...; " \
105 "source ${loadaddr}\0" \
106 "emmcboot=echo Booting from emmc ... && " \
107 "run emmcargs && " \
108 "load mmc 1 ${loadaddr} ${kernel} && " \
109 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
110 "bootz ${loadaddr} - ${fdtaddr}\0"
111
112#define CONFIG_BOOTCOMMAND \
113 "mmc dev 0; " \
114 "if mmc rescan; then " \
115 "if run loadbootscript; then " \
116 "run bootscript; " \
117 "fi; " \
118 "fi; " \
119 "mmc dev 1; " \
120 "if mmc rescan; then " \
121 "run emmcboot; " \
122 "fi;"
123
Nikita Kiryanov8883dda2015-07-30 23:56:23 +0300124/* SPL defines. */
125#define CONFIG_SPL_TEXT_BASE 0x40300350
Nikita Kiryanov8883dda2015-07-30 23:56:23 +0300126#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20))
Nikita Kiryanov8883dda2015-07-30 23:56:23 +0300127#define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024)
Nikita Kiryanov7d751d62016-02-19 19:19:50 +0200128#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Nikita Kiryanov8883dda2015-07-30 23:56:23 +0300129
Nikita Kiryanov2d9a76b2016-04-16 17:55:10 +0300130/* EEPROM */
Nikita Kiryanov2d9a76b2016-04-16 17:55:10 +0300131#define CONFIG_ENV_EEPROM_IS_ON_I2C
132#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
133#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
134#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
135#define CONFIG_SYS_EEPROM_SIZE 256
136
Nikita Kiryanov8883dda2015-07-30 23:56:23 +0300137#endif /* __CONFIG_CM_T43_H */