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Hans de Goede28a15ef2015-01-11 20:34:48 +01001/*
2 * Allwinner SUNXI "glue layer"
3 *
4 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
6 *
7 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
8 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
9 * javen <javen@allwinnertech.com>
10 *
11 * Based on the DA8xx "glue layer" code.
12 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
13 * Copyright (C) 2005-2006 by Texas Instruments
14 *
15 * This file is part of the Inventra Controller Driver for Linux.
16 *
17 * The Inventra Controller Driver for Linux is free software; you
18 * can redistribute it and/or modify it under the terms of the GNU
19 * General Public License version 2 as published by the Free Software
20 * Foundation.
21 *
22 */
23#include <common.h>
24#include <asm/arch/cpu.h>
Hans de Goede375de012015-04-27 11:44:22 +020025#include <asm/arch/clock.h>
Hans de Goede52defe82015-02-16 22:13:43 +010026#include <asm/arch/gpio.h>
Hans de Goede2aacc422015-04-27 15:05:10 +020027#include <asm/arch/usb_phy.h>
Hans de Goede52defe82015-02-16 22:13:43 +010028#include <asm-generic/gpio.h>
Hans de Goeded42faf32015-06-17 15:49:26 +020029#include <linux/usb/musb.h>
Hans de Goede28a15ef2015-01-11 20:34:48 +010030#include "linux-compat.h"
31#include "musb_core.h"
32
33/******************************************************************************
34 ******************************************************************************
35 * From the Allwinner driver
36 ******************************************************************************
37 ******************************************************************************/
38
39/******************************************************************************
40 * From include/sunxi_usb_bsp.h
41 ******************************************************************************/
42
43/* reg offsets */
44#define USBC_REG_o_ISCR 0x0400
45#define USBC_REG_o_PHYCTL 0x0404
46#define USBC_REG_o_PHYBIST 0x0408
47#define USBC_REG_o_PHYTUNE 0x040c
48
49#define USBC_REG_o_VEND0 0x0043
50
51/* Interface Status and Control */
52#define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
53#define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
54#define USBC_BP_ISCR_EXT_ID_STATUS 28
55#define USBC_BP_ISCR_EXT_DM_STATUS 27
56#define USBC_BP_ISCR_EXT_DP_STATUS 26
57#define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
58#define USBC_BP_ISCR_MERGED_ID_STATUS 24
59
60#define USBC_BP_ISCR_ID_PULLUP_EN 17
61#define USBC_BP_ISCR_DPDM_PULLUP_EN 16
62#define USBC_BP_ISCR_FORCE_ID 14
63#define USBC_BP_ISCR_FORCE_VBUS_VALID 12
64#define USBC_BP_ISCR_VBUS_VALID_SRC 10
65
66#define USBC_BP_ISCR_HOSC_EN 7
67#define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
68#define USBC_BP_ISCR_ID_CHANGE_DETECT 5
69#define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
70#define USBC_BP_ISCR_IRQ_ENABLE 3
71#define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
72#define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
73#define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
74
75/******************************************************************************
76 * From usbc/usbc.c
77 ******************************************************************************/
78
79static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
80{
81 u32 temp = reg_val;
82
83 temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
84 temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
85 temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
86
87 return temp;
88}
89
90static void USBC_EnableIdPullUp(__iomem void *base)
91{
92 u32 reg_val;
93
94 reg_val = musb_readl(base, USBC_REG_o_ISCR);
95 reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
96 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
97 musb_writel(base, USBC_REG_o_ISCR, reg_val);
98}
99
Hans de Goede28a15ef2015-01-11 20:34:48 +0100100static void USBC_EnableDpDmPullUp(__iomem void *base)
101{
102 u32 reg_val;
103
104 reg_val = musb_readl(base, USBC_REG_o_ISCR);
105 reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
106 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
107 musb_writel(base, USBC_REG_o_ISCR, reg_val);
108}
109
Hans de Goede28a15ef2015-01-11 20:34:48 +0100110static void USBC_ForceIdToLow(__iomem void *base)
111{
112 u32 reg_val;
113
114 reg_val = musb_readl(base, USBC_REG_o_ISCR);
115 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
116 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
117 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
118 musb_writel(base, USBC_REG_o_ISCR, reg_val);
119}
120
121static void USBC_ForceIdToHigh(__iomem void *base)
122{
123 u32 reg_val;
124
125 reg_val = musb_readl(base, USBC_REG_o_ISCR);
126 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
127 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
128 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
129 musb_writel(base, USBC_REG_o_ISCR, reg_val);
130}
131
Hans de Goedee1abfa42015-06-14 11:55:28 +0200132static void USBC_ForceVbusValidToLow(__iomem void *base)
133{
134 u32 reg_val;
135
136 reg_val = musb_readl(base, USBC_REG_o_ISCR);
137 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
138 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
139 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
140 musb_writel(base, USBC_REG_o_ISCR, reg_val);
141}
142
Hans de Goede28a15ef2015-01-11 20:34:48 +0100143static void USBC_ForceVbusValidToHigh(__iomem void *base)
144{
145 u32 reg_val;
146
147 reg_val = musb_readl(base, USBC_REG_o_ISCR);
148 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
149 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
150 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
151 musb_writel(base, USBC_REG_o_ISCR, reg_val);
152}
153
154static void USBC_ConfigFIFO_Base(void)
155{
156 u32 reg_value;
157
158 /* config usb fifo, 8kb mode */
159 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
160 reg_value &= ~(0x03 << 0);
161 reg_value |= (1 << 0);
162 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
163}
164
165/******************************************************************************
166 * MUSB Glue code
167 ******************************************************************************/
168
169static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
170{
171 struct musb *musb = __hci;
172 irqreturn_t retval = IRQ_NONE;
173
174 /* read and flush interrupts */
175 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
176 if (musb->int_usb)
177 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
178 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
179 if (musb->int_tx)
180 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
181 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
182 if (musb->int_rx)
183 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
184
185 if (musb->int_usb || musb->int_tx || musb->int_rx)
186 retval |= musb_interrupt(musb);
187
188 return retval;
189}
190
Hans de Goedee1abfa42015-06-14 11:55:28 +0200191/* musb_core does not call enable / disable in a balanced manner <sigh> */
192static bool enabled = false;
193
Hans de Goede15837232015-06-17 21:33:54 +0200194static int sunxi_musb_enable(struct musb *musb)
Hans de Goede28a15ef2015-01-11 20:34:48 +0100195{
Hans de Goedeb41972e2015-06-14 16:48:56 +0200196 int ret;
197
Hans de Goede28a15ef2015-01-11 20:34:48 +0100198 pr_debug("%s():\n", __func__);
199
Hans de Goedee1abfa42015-06-14 11:55:28 +0200200 if (enabled)
Hans de Goede15837232015-06-17 21:33:54 +0200201 return 0;
Hans de Goedee1abfa42015-06-14 11:55:28 +0200202
Hans de Goede28a15ef2015-01-11 20:34:48 +0100203 /* select PIO mode */
204 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
205
Hans de Goedeb41972e2015-06-14 16:48:56 +0200206 if (is_host_enabled(musb)) {
207 ret = sunxi_usb_phy_vbus_detect(0);
208 if (ret) {
209 printf("A charger is plugged into the OTG: ");
210 return -ENODEV;
211 }
Hans de Goede71cbe0d2015-06-14 17:40:37 +0200212 ret = sunxi_usb_phy_id_detect(0);
213 if (ret == 1) {
214 printf("No host cable detected: ");
215 return -ENODEV;
216 }
Hans de Goedee1abfa42015-06-14 11:55:28 +0200217 sunxi_usb_phy_power_on(0); /* port power on */
Hans de Goedeb41972e2015-06-14 16:48:56 +0200218 }
Hans de Goedee1abfa42015-06-14 11:55:28 +0200219
220 USBC_ForceVbusValidToHigh(musb->mregs);
221
222 enabled = true;
Hans de Goede15837232015-06-17 21:33:54 +0200223 return 0;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100224}
225
226static void sunxi_musb_disable(struct musb *musb)
227{
228 pr_debug("%s():\n", __func__);
229
Hans de Goedee1abfa42015-06-14 11:55:28 +0200230 if (!enabled)
231 return;
Hans de Goede375de012015-04-27 11:44:22 +0200232
Hans de Goedee1abfa42015-06-14 11:55:28 +0200233 if (is_host_enabled(musb))
234 sunxi_usb_phy_power_off(0); /* port power off */
Hans de Goede375de012015-04-27 11:44:22 +0200235
Hans de Goedee1abfa42015-06-14 11:55:28 +0200236 USBC_ForceVbusValidToLow(musb->mregs);
237 mdelay(200); /* Wait for the current session to timeout */
238
239 enabled = false;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100240}
241
242static int sunxi_musb_init(struct musb *musb)
243{
Hans de Goede375de012015-04-27 11:44:22 +0200244 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
Hans de Goede28a15ef2015-01-11 20:34:48 +0100245
246 pr_debug("%s():\n", __func__);
247
Hans de Goede28a15ef2015-01-11 20:34:48 +0100248 musb->isr = sunxi_musb_interrupt;
Hans de Goede375de012015-04-27 11:44:22 +0200249
250 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
251#ifdef CONFIG_SUNXI_GEN_SUN6I
252 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
253#endif
Hans de Goede7b798652015-04-27 14:54:47 +0200254 sunxi_usb_phy_init(0);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100255
256 USBC_ConfigFIFO_Base();
257 USBC_EnableDpDmPullUp(musb->mregs);
258 USBC_EnableIdPullUp(musb->mregs);
259
260 if (is_host_enabled(musb)) {
261 /* Host mode */
262 USBC_ForceIdToLow(musb->mregs);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100263 } else {
264 /* Peripheral mode */
265 USBC_ForceIdToHigh(musb->mregs);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100266 }
Hans de Goedeb1b912d2015-02-11 09:05:18 +0100267 USBC_ForceVbusValidToHigh(musb->mregs);
Hans de Goede28a15ef2015-01-11 20:34:48 +0100268
269 return 0;
270}
271
Hans de Goeded42faf32015-06-17 15:49:26 +0200272static const struct musb_platform_ops sunxi_musb_ops = {
Hans de Goede28a15ef2015-01-11 20:34:48 +0100273 .init = sunxi_musb_init,
Hans de Goede28a15ef2015-01-11 20:34:48 +0100274 .enable = sunxi_musb_enable,
275 .disable = sunxi_musb_disable,
276};
Hans de Goeded42faf32015-06-17 15:49:26 +0200277
278static struct musb_hdrc_config musb_config = {
279 .multipoint = 1,
280 .dyn_fifo = 1,
281 .num_eps = 6,
282 .ram_bits = 11,
283};
284
285static struct musb_hdrc_platform_data musb_plat = {
286#if defined(CONFIG_MUSB_HOST)
287 .mode = MUSB_HOST,
288#else
289 .mode = MUSB_PERIPHERAL,
290#endif
291 .config = &musb_config,
292 .power = 250,
293 .platform_ops = &sunxi_musb_ops,
294};
295
296void sunxi_musb_board_init(void)
297{
298 musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
299}