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Heiko Schocher3b5df502015-06-29 09:10:48 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * (C) Copyright 2010
7 * Achim Ehrlich <aehrlich@taskit.de>
8 * taskit GmbH <www.taskit.de>
9 *
10 * (C) Copyright 2012
11 * Markus Hubig <mhubig@imko.de>
12 * IMKO GmbH <www.imko.de>
13 *
14 * (C) Copyright 2014
15 * Heiko Schocher <hs@denx.de>
16 * DENX Software Engineering GmbH
17 *
18 * Configuation settings for the smartweb.
19 *
20 * SPDX-License-Identifier: GPL-2.0+
21 */
22
23#ifndef __CONFIG_H
24#define __CONFIG_H
25
26/*
27 * SoC must be defined first, before hardware.h is included.
28 * In this case SoC is defined in boards.cfg.
29 */
30#include <asm/hardware.h>
Heiko Schochere8b81ee2015-09-08 11:52:52 +020031#include <linux/sizes.h>
Heiko Schocher3b5df502015-06-29 09:10:48 +020032
33/*
34 * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
35 * program. Since the linker has to swallow that define, we must use a pure
36 * hex number here!
37 */
38#define CONFIG_SYS_TEXT_BASE 0x23000000
39
40/* ARM asynchronous clock */
41#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
42#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
43
44/* misc settings */
45#define CONFIG_CMDLINE_TAG /* pass commandline to Kernel */
46#define CONFIG_SETUP_MEMORY_TAGS /* pass memory defs to kernel */
47#define CONFIG_INITRD_TAG /* pass initrd param to kernel */
48#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
49#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
50#define CONFIG_DISPLAY_CPUINFO /* display CPU Info at startup */
51
Matthias Michelb96fd822016-01-27 15:56:07 +010052/* We set the max number of command args high to avoid HUSH bugs. */
53#define CONFIG_SYS_MAXARGS 32
54
Heiko Schocher3b5df502015-06-29 09:10:48 +020055/* setting board specific options */
Matthias Michelb96fd822016-01-27 15:56:07 +010056#define CONFIG_MACH_TYPE MACH_TYPE_SMARTWEB
Heiko Schocher3b5df502015-06-29 09:10:48 +020057#define CONFIG_AUTO_COMPLETE
Matthias Michelb96fd822016-01-27 15:56:07 +010058#define CONFIG_ENV_OVERWRITE 1 /* Overwrite ethaddr / serial# */
59#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
60#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
61#define CONFIG_AUTO_COMPLETE
62#define CONFIG_SYS_AUTOLOAD "yes"
63#define CONFIG_RESET_TO_RETRY
Heiko Schocher3b5df502015-06-29 09:10:48 +020064
65/* The LED PINs */
66#define CONFIG_RED_LED AT91_PIN_PA9
67#define CONFIG_GREEN_LED AT91_PIN_PA6
68
69/*
70 * SDRAM: 1 bank, 64 MB, base address 0x20000000
71 * Already initialized before u-boot gets started.
72 */
73#define CONFIG_NR_DRAM_BANKS 1
74#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schochere8b81ee2015-09-08 11:52:52 +020075#define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M)
Heiko Schocher3b5df502015-06-29 09:10:48 +020076
77/*
78 * Perform a SDRAM Memtest from the start of SDRAM
79 * till the beginning of the U-Boot position in RAM.
80 */
81#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
82#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
83
84/* Size of malloc() pool */
85#define CONFIG_SYS_MALLOC_LEN \
Heiko Schochere8b81ee2015-09-08 11:52:52 +020086 ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
Heiko Schocher3b5df502015-06-29 09:10:48 +020087
88/* NAND flash settings */
89#define CONFIG_NAND_ATMEL
90#define CONFIG_SYS_NO_FLASH
91#define CONFIG_SYS_MAX_NAND_DEVICE 1
92#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
93#define CONFIG_SYS_NAND_DBW_8
94#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
95#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
96#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
97#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
98
99#define CONFIG_CMD_MTDPARTS
100#define CONFIG_MTD_DEVICE
101#define MTDIDS_NAME_STR "atmel_nand"
102#define MTDIDS_DEFAULT "nand0=" MTDIDS_NAME_STR
103#define MTDPARTS_DEFAULT "mtdparts=" MTDIDS_NAME_STR ":" \
104 "128k(Bootstrap)," \
105 "896k(U-Boot)," \
106 "512k(ENV0)," \
107 "512k(ENV1)," \
108 "4M(Linux)," \
109 "-(Root-FS)"
110
111/* general purpose I/O */
112#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
113#define CONFIG_AT91_GPIO /* enable the GPIO features */
114#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
115
116/* serial console */
117#define CONFIG_ATMEL_USART
118#define CONFIG_USART_BASE ATMEL_BASE_DBGU
119#define CONFIG_USART_ID ATMEL_ID_SYS
120#define CONFIG_BAUDRATE 115200
121
122/*
123 * Ethernet configuration
124 *
125 */
126#define CONFIG_MACB
Heiko Schocheraca5d082015-09-28 11:36:05 +0200127#define CONFIG_USB_HOST_ETHER
128#define CONFIG_USB_ETHER_ASIX
129#define CONFIG_USB_ETHER_MCS7830
Heiko Schocher3b5df502015-06-29 09:10:48 +0200130#define CONFIG_RMII /* use reduced MII inteface */
131#define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
132#define CONFIG_AT91_WANTS_COMMON_PHY
133
134/* BOOTP and DHCP options */
135#define CONFIG_BOOTP_BOOTFILESIZE
136#define CONFIG_BOOTP_BOOTPATH
137#define CONFIG_BOOTP_GATEWAY
138#define CONFIG_BOOTP_HOSTNAME
139#define CONFIG_NFSBOOTCOMMAND \
140 "setenv autoload yes; setenv autoboot yes; " \
141 "setenv bootargs ${basicargs} ${mtdparts} " \
142 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
143 "dhcp"
144
145/* Enable the watchdog */
146#define CONFIG_AT91SAM9_WATCHDOG
147#if !defined(CONFIG_SPL_BUILD)
148#define CONFIG_HW_WATCHDOG
149#endif
150#define CONFIG_AT91_HW_WDT_TIMEOUT 15
151
152#if !defined(CONFIG_SPL_BUILD)
153/* USB configuration */
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200154#define CONFIG_CMD_USB
Heiko Schocher3b5df502015-06-29 09:10:48 +0200155#define CONFIG_USB_ATMEL
156#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
157#define CONFIG_USB_OHCI_NEW
Heiko Schocher3b5df502015-06-29 09:10:48 +0200158#define CONFIG_SYS_USB_OHCI_CPU_INIT
159#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
160#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
161#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200162
163#define CONFIG_USB_HOST_ETHER
164#define CONFIG_USB_ETHER_ASIX
165#define CONFIG_USB_ETHER_MCS7830
166
167/* USB DFU support */
168#define CONFIG_CMD_MTDPARTS
169#define CONFIG_MTD_DEVICE
170#define CONFIG_MTD_PARTITIONS
171
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200172#define CONFIG_USB_GADGET_AT91
173
174/* DFU class support */
175#define CONFIG_CMD_DFU
176#define CONFIG_USB_FUNCTION_DFU
177#define CONFIG_DFU_NAND
178#define CONFIG_USB_GADGET_DOWNLOAD
179#define CONFIG_USB_GADGET_VBUS_DRAW 2
180#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_1M
181#define DFU_MANIFEST_POLL_TIMEOUT 25000
182
183/* USB DFU IDs */
184#define CONFIG_G_DNL_VENDOR_NUM 0x0908
185#define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
186#define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
187
188#define CONFIG_SYS_CACHELINE_SIZE 0x2000
Heiko Schocher3b5df502015-06-29 09:10:48 +0200189#endif
190
191/* General Boot Parameter */
192#define CONFIG_BOOTDELAY 3
193#define CONFIG_BOOTCOMMAND "run flashboot"
Heiko Schocher3b5df502015-06-29 09:10:48 +0200194#define CONFIG_SYS_CBSIZE 512
Heiko Schocher3b5df502015-06-29 09:10:48 +0200195#define CONFIG_SYS_PBSIZE \
196 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
197#define CONFIG_SYS_LONGHELP
198#define CONFIG_CMDLINE_EDITING
199
200/*
201 * RAM Memory address where to put the
202 * Linux Kernel befor starting.
203 */
204#define CONFIG_SYS_LOAD_ADDR 0x22000000
205
206/*
207 * The NAND Flash partitions:
208 */
209#define CONFIG_ENV_IS_IN_NAND
210#define CONFIG_ENV_OFFSET (0x100000)
211#define CONFIG_ENV_OFFSET_REDUND (0x180000)
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200212#define CONFIG_ENV_RANGE (SZ_512K)
213#define CONFIG_ENV_SIZE (SZ_128K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200214
215/*
216 * Predefined environment variables.
217 * Usefull to define some easy to use boot commands.
218 */
219#define CONFIG_EXTRA_ENV_SETTINGS \
220 \
221 "basicargs=console=ttyS0,115200\0" \
222 \
223 "mtdparts="MTDPARTS_DEFAULT"\0"
224
225/* Command line & features configuration */
226#undef CONFIG_CMD_FPGA
227#undef CONFIG_CMD_IMI
228#undef CONFIG_CMD_IMLS
229#undef CONFIG_CMD_LOADS
230
231#define CONFIG_CMD_NAND
Heiko Schocher3b5df502015-06-29 09:10:48 +0200232#define CONFIG_CMD_FAT
233
234#ifdef CONFIG_MACB
235# define CONFIG_CMD_PING
236# define CONFIG_CMD_DHCP
237#else
238# undef CONFIG_CMD_BOOTD
239# undef CONFIG_CMD_NET
240# undef CONFIG_CMD_NFS
241#endif /* CONFIG_MACB */
242
Heiko Schocher3b5df502015-06-29 09:10:48 +0200243#define CONFIG_CMD_FDT
Heiko Schocher3b5df502015-06-29 09:10:48 +0200244
245#ifdef CONFIG_SPL_BUILD
246#define CONFIG_SYS_INIT_SP_ADDR 0x301000
247#define CONFIG_SPL_STACK_R
248#define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
249#else
250/*
251 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
252 * leaving the correct space for initial global data structure above that
253 * address while providing maximum stack area below.
254 */
255#define CONFIG_SYS_INIT_SP_ADDR \
256 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
257#endif
258
259
260/* Defines for SPL */
261#define CONFIG_SPL_FRAMEWORK
262#define CONFIG_SPL_TEXT_BASE 0x0
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200263#define CONFIG_SPL_MAX_SIZE (SZ_4K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200264
265#define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200266#define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200267#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
268 CONFIG_SPL_BSS_MAX_SIZE)
269#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
270#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
271
272#define CONFIG_SPL_LIBCOMMON_SUPPORT
273#define CONFIG_SPL_LIBGENERIC_SUPPORT
274
275#define CONFIG_SPL_BOARD_INIT
276#define CONFIG_SPL_GPIO_SUPPORT
277#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
278#define CONFIG_SPL_NAND_SUPPORT
279#define CONFIG_SYS_USE_NANDFLASH 1
280#define CONFIG_SPL_NAND_DRIVERS
281#define CONFIG_SPL_NAND_BASE
282#define CONFIG_SPL_NAND_ECC
283#define CONFIG_SPL_NAND_RAW_ONLY
284#define CONFIG_SPL_NAND_SOFTECC
285#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200286#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Heiko Schocher3b5df502015-06-29 09:10:48 +0200287#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
288#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
289#define CONFIG_SYS_NAND_5_ADDR_CYCLE
290
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200291#define CONFIG_SYS_NAND_SIZE (SZ_256M)
292#define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
293#define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
Heiko Schocher3b5df502015-06-29 09:10:48 +0200294#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
295 CONFIG_SYS_NAND_PAGE_SIZE)
296#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
297#define CONFIG_SYS_NAND_ECCSIZE 256
298#define CONFIG_SYS_NAND_ECCBYTES 3
299#define CONFIG_SYS_NAND_OOBSIZE 64
300#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
301 48, 49, 50, 51, 52, 53, 54, 55, \
302 56, 57, 58, 59, 60, 61, 62, 63, }
303
304#define CONFIG_SPL_ATMEL_SIZE
305#define CONFIG_SYS_MASTER_CLOCK (198656000/2)
306#define AT91_PLL_LOCK_TIMEOUT 1000000
307#define CONFIG_SYS_AT91_PLLA 0x2060bf09
308#define CONFIG_SYS_MCKR 0x100
309#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
310#define CONFIG_SYS_AT91_PLLB 0x10483f0e
311
312#if defined(CONFIG_SPL_BUILD)
313#define CONFIG_SYS_THUMB_BUILD
314#define CONFIG_SYS_ICACHE_OFF
315#define CONFIG_SYS_DCACHE_OFF
316#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
317#endif
318#endif /* __CONFIG_H */