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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2001-2004
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2003
9 * Texas Instruments, <www.ti.com>
10 * Kshitij Gupta <Kshitij@ti.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32#include <linux/byteorder/swab.h>
33
34#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
35flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
36
37/* Board support for 1 or 2 flash devices */
wdenkd407bf52004-10-11 22:51:13 +000038#define FLASH_PORT_WIDTH32
39#undef FLASH_PORT_WIDTH16
wdenk3d3befa2004-03-14 15:06:13 +000040
41#ifdef FLASH_PORT_WIDTH16
42#define FLASH_PORT_WIDTH ushort
43#define FLASH_PORT_WIDTHV vu_short
44#define SWAP(x) __swab16(x)
45#else
46#define FLASH_PORT_WIDTH ulong
47#define FLASH_PORT_WIDTHV vu_long
48#define SWAP(x) __swab32(x)
49#endif
50
51#define FPW FLASH_PORT_WIDTH
52#define FPWV FLASH_PORT_WIDTHV
53
54#define mb() __asm__ __volatile__ ("" : : : "memory")
55
56
57/* Flash Organization Structure */
58typedef struct OrgDef {
59 unsigned int sector_number;
60 unsigned int sector_size;
61} OrgDef;
62
63
64/* Flash Organizations */
wdenkd407bf52004-10-11 22:51:13 +000065OrgDef OrgIntel_28F256K3[] = {
66 {256, 128 * 1024}, /* 256 * 128kBytes sectors */
wdenk3d3befa2004-03-14 15:06:13 +000067};
68
69
70/*-----------------------------------------------------------------------
71 * Functions
72 */
73unsigned long flash_init (void);
74static ulong flash_get_size (FPW * addr, flash_info_t * info);
75static int write_data (flash_info_t * info, ulong dest, FPW data);
76static void flash_get_offsets (ulong base, flash_info_t * info);
77void inline spin_wheel (void);
78void flash_print_info (flash_info_t * info);
79void flash_unprotect_sectors (FPWV * addr);
80int flash_erase (flash_info_t * info, int s_first, int s_last);
81int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
82
83/*-----------------------------------------------------------------------
84 */
85
wdenkd407bf52004-10-11 22:51:13 +000086static void flash_vpp(int on)
87{
88 unsigned int tmp;
89
90 tmp = *(unsigned int *)(VERSATILE_FLASHCTRL);
91
92 if (on)
93 tmp |= VERSATILE_FLASHPROG_FLVPPEN;
94 else
95 tmp &= ~VERSATILE_FLASHPROG_FLVPPEN;
96
97 *(unsigned int *)(VERSATILE_FLASHCTRL) = tmp;
98}
99
wdenk3d3befa2004-03-14 15:06:13 +0000100unsigned long flash_init (void)
101{
102 int i;
103 ulong size = 0;
104 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
105 switch (i) {
106 case 0:
wdenkd407bf52004-10-11 22:51:13 +0000107 flash_vpp(1);
wdenk3d3befa2004-03-14 15:06:13 +0000108 flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
109 flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
wdenkd407bf52004-10-11 22:51:13 +0000110 flash_vpp(0);
wdenk3d3befa2004-03-14 15:06:13 +0000111 break;
112 default:
113 panic ("configured too many flash banks!\n");
114 break;
115 }
116 size += flash_info[i].size;
117 }
118
119 /* Protect monitor and environment sectors
120 */
121 flash_protect (FLAG_PROTECT_SET,
122 CFG_FLASH_BASE,
123 CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
124
125 return size;
126}
127
128/*-----------------------------------------------------------------------
129 */
130static void flash_get_offsets (ulong base, flash_info_t * info)
131{
132 int i;
133 OrgDef *pOrgDef;
134
wdenkd407bf52004-10-11 22:51:13 +0000135 pOrgDef = OrgIntel_28F256K3;
wdenk3d3befa2004-03-14 15:06:13 +0000136 if (info->flash_id == FLASH_UNKNOWN) {
137 return;
138 }
139
140 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
141 for (i = 0; i < info->sector_count; i++) {
142 if (i > 255) {
143 info->start[i] = base + (i * 0x8000);
144 info->protect[i] = 0;
145 } else {
146 info->start[i] = base +
147 (i * PHYS_FLASH_SECT_SIZE);
148 info->protect[i] = 0;
149 }
150 }
151 }
152}
153
154/*-----------------------------------------------------------------------
155 */
156void flash_print_info (flash_info_t * info)
157{
158 int i;
159
160 if (info->flash_id == FLASH_UNKNOWN) {
161 printf ("missing or unknown FLASH type\n");
162 return;
163 }
164
165 switch (info->flash_id & FLASH_VENDMASK) {
166 case FLASH_MAN_INTEL:
167 printf ("INTEL ");
168 break;
169 default:
170 printf ("Unknown Vendor ");
171 break;
172 }
173
174 switch (info->flash_id & FLASH_TYPEMASK) {
175 case FLASH_28F256L18T:
176 printf ("FLASH 28F256L18T\n");
177 break;
wdenkd407bf52004-10-11 22:51:13 +0000178 case FLASH_28F256K3:
179 printf ("FLASH 28F256K3\n");
180 break;
wdenk3d3befa2004-03-14 15:06:13 +0000181 default:
182 printf ("Unknown Chip Type\n");
183 break;
184 }
185
186 printf (" Size: %ld MB in %d Sectors\n",
187 info->size >> 20, info->sector_count);
188
189 printf (" Sector Start Addresses:");
190 for (i = 0; i < info->sector_count; ++i) {
191 if ((i % 5) == 0)
192 printf ("\n ");
193 printf (" %08lX%s",
194 info->start[i], info->protect[i] ? " (RO)" : " ");
195 }
196 printf ("\n");
197 return;
198}
199
200/*
201 * The following code cannot be run from FLASH!
202 */
203static ulong flash_get_size (FPW * addr, flash_info_t * info)
204{
205 volatile FPW value;
206
207 /* Write auto select command: read Manufacturer ID */
208 addr[0x5555] = (FPW) 0x00AA00AA;
209 addr[0x2AAA] = (FPW) 0x00550055;
210 addr[0x5555] = (FPW) 0x00900090;
211
212 mb ();
213 value = addr[0];
wdenk3d3befa2004-03-14 15:06:13 +0000214 switch (value) {
215
216 case (FPW) INTEL_MANUFACT:
217 info->flash_id = FLASH_MAN_INTEL;
218 break;
219
220 default:
221 info->flash_id = FLASH_UNKNOWN;
222 info->sector_count = 0;
223 info->size = 0;
224 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
225 return (0); /* no or unknown flash */
226 }
227
228 mb ();
229 value = addr[1]; /* device ID */
230 switch (value) {
231
232 case (FPW) (INTEL_ID_28F256L18T):
233 info->flash_id += FLASH_28F256L18T;
234 info->sector_count = 259;
235 info->size = 0x02000000;
236 break; /* => 32 MB */
237
wdenkd407bf52004-10-11 22:51:13 +0000238 case (FPW)(INTEL_ID_28F256K3):
239 info->flash_id += FLASH_28F256K3;
240 info->sector_count = 256;
241 info->size = 0x02000000;
242 printf ("\Intel StrataFlash 28F256K3C device initialized\n");
243 break;
244
wdenk3d3befa2004-03-14 15:06:13 +0000245 default:
246 info->flash_id = FLASH_UNKNOWN;
247 break;
248 }
249
250 if (info->sector_count > CFG_MAX_FLASH_SECT) {
251 printf ("** ERROR: sector count %d > max (%d) **\n",
252 info->sector_count, CFG_MAX_FLASH_SECT);
253 info->sector_count = CFG_MAX_FLASH_SECT;
254 }
255
256 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
257
258 return (info->size);
259}
260
261
262/* unprotects a sector for write and erase
263 * on some intel parts, this unprotects the entire chip, but it
264 * wont hurt to call this additional times per sector...
265 */
266void flash_unprotect_sectors (FPWV * addr)
267{
268#define PD_FINTEL_WSMS_READY_MASK 0x0080
269
270 *addr = (FPW) 0x00500050; /* clear status register */
271
272 /* this sends the clear lock bit command */
273 *addr = (FPW) 0x00600060;
274 *addr = (FPW) 0x00D000D0;
275}
276
277
278/*-----------------------------------------------------------------------
279 */
280
281int flash_erase (flash_info_t * info, int s_first, int s_last)
282{
283 int flag, prot, sect;
284 ulong type, start, last;
285 int rcode = 0;
286
287 if ((s_first < 0) || (s_first > s_last)) {
288 if (info->flash_id == FLASH_UNKNOWN) {
289 printf ("- missing\n");
290 } else {
291 printf ("- no sectors to erase\n");
292 }
293 return 1;
294 }
295
296 type = (info->flash_id & FLASH_VENDMASK);
297 if ((type != FLASH_MAN_INTEL)) {
298 printf ("Can't erase unknown flash type %08lx - aborted\n",
299 info->flash_id);
300 return 1;
301 }
302
303 prot = 0;
304 for (sect = s_first; sect <= s_last; ++sect) {
305 if (info->protect[sect]) {
306 prot++;
307 }
308 }
309
310 if (prot) {
311 printf ("- Warning: %d protected sectors will not be erased!\n",
312 prot);
313 } else {
314 printf ("\n");
315 }
316
wdenkd407bf52004-10-11 22:51:13 +0000317 flash_vpp(1);
wdenk3d3befa2004-03-14 15:06:13 +0000318
319 start = get_timer (0);
320 last = start;
321
322 /* Disable interrupts which might cause a timeout here */
323 flag = disable_interrupts ();
324
325 /* Start erase on unprotected sectors */
326 for (sect = s_first; sect <= s_last; sect++) {
327 if (info->protect[sect] == 0) { /* not protected */
328 FPWV *addr = (FPWV *) (info->start[sect]);
329 FPW status;
330
331 printf ("Erasing sector %2d ... ", sect);
332
333 flash_unprotect_sectors (addr);
334
335 /* arm simple, non interrupt dependent timer */
336 reset_timer_masked ();
337
338 *addr = (FPW) 0x00500050;/* clear status register */
339 *addr = (FPW) 0x00200020;/* erase setup */
340 *addr = (FPW) 0x00D000D0;/* erase confirm */
341
342 while (((status =
343 *addr) & (FPW) 0x00800080) !=
344 (FPW) 0x00800080) {
345 if (get_timer_masked () >
346 CFG_FLASH_ERASE_TOUT) {
347 printf ("Timeout\n");
348 /* suspend erase */
349 *addr = (FPW) 0x00B000B0;
350 /* reset to read mode */
351 *addr = (FPW) 0x00FF00FF;
352 rcode = 1;
353 break;
354 }
355 }
356
357 /* clear status register cmd. */
358 *addr = (FPW) 0x00500050;
359 *addr = (FPW) 0x00FF00FF;/* resest to read mode */
360 printf (" done\n");
361 }
362 }
wdenkd407bf52004-10-11 22:51:13 +0000363
364 flash_vpp(0);
365
wdenk3d3befa2004-03-14 15:06:13 +0000366 return rcode;
367}
368
369/*-----------------------------------------------------------------------
370 * Copy memory to flash, returns:
371 * 0 - OK
372 * 1 - write timeout
373 * 2 - Flash not erased
374 * 4 - Flash not identified
375 */
376
377int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
378{
379 ulong cp, wp;
380 FPW data;
381 int count, i, l, rc, port_width;
382
383 if (info->flash_id == FLASH_UNKNOWN) {
384 return 4;
385 }
386/* get lower word aligned address */
387#ifdef FLASH_PORT_WIDTH16
388 wp = (addr & ~1);
389 port_width = 2;
390#else
391 wp = (addr & ~3);
392 port_width = 4;
393#endif
394
wdenkd407bf52004-10-11 22:51:13 +0000395 flash_vpp(1);
396
wdenk3d3befa2004-03-14 15:06:13 +0000397 /*
398 * handle unaligned start bytes
399 */
400 if ((l = addr - wp) != 0) {
401 data = 0;
402 for (i = 0, cp = wp; i < l; ++i, ++cp) {
403 data = (data << 8) | (*(uchar *) cp);
404 }
405 for (; i < port_width && cnt > 0; ++i) {
406 data = (data << 8) | *src++;
407 --cnt;
408 ++cp;
409 }
410 for (; cnt == 0 && i < port_width; ++i, ++cp) {
411 data = (data << 8) | (*(uchar *) cp);
412 }
413
414 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
wdenkd407bf52004-10-11 22:51:13 +0000415 flash_vpp(0);
wdenk3d3befa2004-03-14 15:06:13 +0000416 return (rc);
417 }
418 wp += port_width;
419 }
420
421 /*
422 * handle word aligned part
423 */
424 count = 0;
425 while (cnt >= port_width) {
426 data = 0;
427 for (i = 0; i < port_width; ++i) {
428 data = (data << 8) | *src++;
429 }
430 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
wdenkd407bf52004-10-11 22:51:13 +0000431 flash_vpp(0);
wdenk3d3befa2004-03-14 15:06:13 +0000432 return (rc);
433 }
434 wp += port_width;
435 cnt -= port_width;
436 if (count++ > 0x800) {
437 spin_wheel ();
438 count = 0;
439 }
440 }
441
442 if (cnt == 0) {
wdenkd407bf52004-10-11 22:51:13 +0000443 flash_vpp(0);
wdenk3d3befa2004-03-14 15:06:13 +0000444 return (0);
445 }
446
447 /*
448 * handle unaligned tail bytes
449 */
450 data = 0;
451 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
452 data = (data << 8) | *src++;
453 --cnt;
454 }
455 for (; i < port_width; ++i, ++cp) {
456 data = (data << 8) | (*(uchar *) cp);
457 }
458
wdenkd407bf52004-10-11 22:51:13 +0000459 rc = write_data (info, wp, SWAP (data));
460
461 flash_vpp(0);
462
463 return rc;
wdenk3d3befa2004-03-14 15:06:13 +0000464}
465
466/*-----------------------------------------------------------------------
467 * Write a word or halfword to Flash, returns:
468 * 0 - OK
469 * 1 - write timeout
470 * 2 - Flash not erased
471 */
472static int write_data (flash_info_t * info, ulong dest, FPW data)
473{
474 FPWV *addr = (FPWV *) dest;
475 ulong status;
476 int flag;
477
478 /* Check if Flash is (sufficiently) erased */
479 if ((*addr & data) != data) {
480 printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
481 return (2);
482 }
wdenkd407bf52004-10-11 22:51:13 +0000483
484 flash_vpp(1);
485
wdenk3d3befa2004-03-14 15:06:13 +0000486 flash_unprotect_sectors (addr);
487 /* Disable interrupts which might cause a timeout here */
488 flag = disable_interrupts ();
489 *addr = (FPW) 0x00400040; /* write setup */
490 *addr = data;
491
492 /* arm simple, non interrupt dependent timer */
493 reset_timer_masked ();
494
495 /* wait while polling the status register */
496 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
497 if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
498 *addr = (FPW) 0x00FF00FF; /* restore read mode */
wdenkd407bf52004-10-11 22:51:13 +0000499 flash_vpp(0);
wdenk3d3befa2004-03-14 15:06:13 +0000500 return (1);
501 }
502 }
503 *addr = (FPW) 0x00FF00FF; /* restore read mode */
wdenkd407bf52004-10-11 22:51:13 +0000504 flash_vpp(0);
wdenk3d3befa2004-03-14 15:06:13 +0000505 return (0);
506}
507
508void inline spin_wheel (void)
509{
510 static int p = 0;
511 static char w[] = "\\/-";
512
513 printf ("\010%c", w[p]);
514 (++p == 3) ? (p = 0) : 0;
515}