blob: 6cc136aa3c1e6baeddded6fd8c670e62aac23243 [file] [log] [blame]
wdenkedc48b62002-09-08 17:56:50 +00001/*
2 * (C) Copyright 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkedc48b62002-09-08 17:56:50 +00006 */
7
8/* for now: just dummy functions to satisfy the linker */
9
wdenk8ed96042005-01-09 23:16:25 +000010#include <common.h>
11
Aneesh V4c93da72011-06-16 23:30:46 +000012void __flush_cache(unsigned long start, unsigned long size)
wdenkedc48b62002-09-08 17:56:50 +000013{
Tom Rini7f5eef92013-06-04 12:02:06 +000014#if defined(CONFIG_ARM1136)
wdenk8ed96042005-01-09 23:16:25 +000015 void arm1136_cache_flush(void);
16
17 arm1136_cache_flush();
18#endif
Heiko Schocherc3330e92010-09-17 13:10:30 +020019#ifdef CONFIG_ARM926EJS
20 /* test and clean, page 2-23 of arm926ejs manual */
21 asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory");
22 /* disable write buffer as well (page 2-22) */
23 asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
24#endif
wdenkedc48b62002-09-08 17:56:50 +000025 return;
26}
Aneesh V4c93da72011-06-16 23:30:46 +000027void flush_cache(unsigned long start, unsigned long size)
28 __attribute__((weak, alias("__flush_cache")));
Aneesh Ve05f0072011-06-16 23:30:50 +000029
30/*
31 * Default implementation:
32 * do a range flush for the entire range
33 */
34void __flush_dcache_all(void)
35{
36 flush_cache(0, ~0);
37}
38void flush_dcache_all(void)
39 __attribute__((weak, alias("__flush_dcache_all")));
Aneesh Vcba4b182011-08-16 04:33:05 +000040
41
42/*
43 * Default implementation of enable_caches()
44 * Real implementation should be in platform code
45 */
46void __enable_caches(void)
47{
48 puts("WARNING: Caches not enabled\n");
49}
50void enable_caches(void)
51 __attribute__((weak, alias("__enable_caches")));