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Nathan Rossi66eef1e2015-11-17 22:56:56 +10001/*
2 * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 *
6 * The following Boot Header format/structures and values are defined in the
7 * following documents:
8 * * Xilinx Zynq-7000 Technical Reference Manual (Section 6.3)
9 * * Xilinx Zynq-7000 Software Developers Guide (Appendix A.7 and A.8)
10 *
11 * Expected Header Size = 0x8C0
12 * Forced as 'little' endian, 32-bit words
13 *
14 * 0x 0 - Interrupt Table (8 words)
15 * ... (Default value = 0xeafffffe)
16 * 0x 1f
17 * 0x 20 - Width Detection
18 * * DEFAULT_WIDTHDETECTION 0xaa995566
19 * 0x 24 - Image Identifier
20 * * DEFAULT_IMAGEIDENTIFIER 0x584c4e58
21 * 0x 28 - Encryption
22 * * 0x00000000 - None
23 * * 0xa5c3c5a3 - eFuse
24 * * 0x3a5c3c5a - bbRam
25 * 0x 2C - User Field
26 * 0x 30 - Image Offset
27 * 0x 34 - Image Size
28 * 0x 38 - Reserved (0x00000000) (according to spec)
29 * * FSBL defines this field for Image Destination Address.
30 * 0x 3C - Image Load
31 * 0x 40 - Image Stored Size
32 * 0x 44 - Reserved (0x00000000) (according to spec)
33 * * FSBL defines this field for QSPI configuration Data.
34 * 0x 48 - Checksum
35 * 0x 4c - Unused (21 words)
36 * ...
37 * 0x 9c
38 * 0x a0 - Register Initialization, 256 Address and Data word pairs
39 * * List is terminated with an address of 0xffffffff or
40 * ... * at the max number of entries
41 * 0x89c
42 * 0x8a0 - Unused (8 words)
43 * ...
44 * 0x8bf
45 * 0x8c0 - Data/Image starts here or above
46 */
47
48#include "imagetool.h"
49#include "mkimage.h"
50#include <image.h>
51
52#define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
53#define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
54#define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
55#define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
56
57enum {
58 ENCRYPTION_EFUSE = 0xa5c3c5a3,
59 ENCRYPTION_BBRAM = 0x3a5c3c5a,
60 ENCRYPTION_NONE = 0x0,
61};
62
63struct zynq_reginit {
64 uint32_t address;
65 uint32_t data;
66};
67
68#define HEADER_INTERRUPT_VECTORS 8
69#define HEADER_REGINITS 256
70
71struct zynq_header {
72 uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
73 uint32_t width_detection; /* 0x20 */
74 uint32_t image_identifier; /* 0x24 */
75 uint32_t encryption; /* 0x28 */
76 uint32_t user_field; /* 0x2c */
77 uint32_t image_offset; /* 0x30 */
78 uint32_t image_size; /* 0x34 */
79 uint32_t __reserved1; /* 0x38 */
80 uint32_t image_load; /* 0x3c */
81 uint32_t image_stored_size; /* 0x40 */
82 uint32_t __reserved2; /* 0x44 */
83 uint32_t checksum; /* 0x48 */
84 uint32_t __reserved3[21]; /* 0x4c */
85 struct zynq_reginit register_init[HEADER_REGINITS]; /* 0xa0 */
86 uint32_t __reserved4[8]; /* 0x8a0 */
87};
88
89static struct zynq_header zynqimage_header;
90
91static uint32_t zynqimage_checksum(struct zynq_header *ptr)
92{
93 uint32_t checksum = 0;
94
95 if (ptr == NULL)
96 return 0;
97
98 checksum += le32_to_cpu(ptr->width_detection);
99 checksum += le32_to_cpu(ptr->image_identifier);
100 checksum += le32_to_cpu(ptr->encryption);
101 checksum += le32_to_cpu(ptr->user_field);
102 checksum += le32_to_cpu(ptr->image_offset);
103 checksum += le32_to_cpu(ptr->image_size);
104 checksum += le32_to_cpu(ptr->__reserved1);
105 checksum += le32_to_cpu(ptr->image_load);
106 checksum += le32_to_cpu(ptr->image_stored_size);
107 checksum += le32_to_cpu(ptr->__reserved2);
108 checksum = ~checksum;
109
110 return cpu_to_le32(checksum);
111}
112
113static void zynqimage_default_header(struct zynq_header *ptr)
114{
115 int i;
116
117 if (ptr == NULL)
118 return;
119
120 ptr->width_detection = HEADER_WIDTHDETECTION;
121 ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
122 ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
123
124 /* Setup not-supported/constant/reserved fields */
125 for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++)
126 ptr->interrupt_vectors[i] = HEADER_INTERRUPT_DEFAULT;
127
128 for (i = 0; i < HEADER_REGINITS; i++) {
129 ptr->register_init[i].address = HEADER_REGINIT_NULL;
130 ptr->register_init[i].data = HEADER_REGINIT_NULL;
131 }
132
133 /*
134 * Certain reserved fields are required to be set to 0, ensure they are
135 * set as such.
136 */
137 ptr->__reserved1 = 0x0;
138 ptr->__reserved2 = 0x0;
139}
140
141/* mkimage glue functions */
142static int zynqimage_verify_header(unsigned char *ptr, int image_size,
143 struct image_tool_params *params)
144{
145 struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
146
147 if (image_size < sizeof(struct zynq_header))
148 return -1;
149
Michal Simekd28baea2018-03-14 11:02:24 +0100150 if (zynqhdr->__reserved1 != 0)
151 return -1;
152
153 if (zynqhdr->__reserved2 != 0)
154 return -1;
155
Nathan Rossi66eef1e2015-11-17 22:56:56 +1000156 if (zynqhdr->width_detection != HEADER_WIDTHDETECTION)
157 return -1;
158 if (zynqhdr->image_identifier != HEADER_IMAGEIDENTIFIER)
159 return -1;
160
161 if (zynqimage_checksum(zynqhdr) != zynqhdr->checksum)
162 return -1;
163
164 return 0;
165}
166
167static void zynqimage_print_header(const void *ptr)
168{
169 struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
170 int i;
171
172 printf("Image Type : Xilinx Zynq Boot Image support\n");
173 printf("Image Offset : 0x%08x\n", le32_to_cpu(zynqhdr->image_offset));
174 printf("Image Size : %lu bytes (%lu bytes packed)\n",
175 (unsigned long)le32_to_cpu(zynqhdr->image_size),
176 (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
177 printf("Image Load : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
178 printf("User Field : 0x%08x\n", le32_to_cpu(zynqhdr->user_field));
179 printf("Checksum : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
180
181 for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++) {
182 if (zynqhdr->interrupt_vectors[i] == HEADER_INTERRUPT_DEFAULT)
183 continue;
184
185 printf("Modified Interrupt Vector Address [%d]: 0x%08x\n", i,
186 le32_to_cpu(zynqhdr->interrupt_vectors[i]));
187 }
188
189 for (i = 0; i < HEADER_REGINITS; i++) {
190 if (zynqhdr->register_init[i].address == HEADER_REGINIT_NULL)
191 break;
192
193 if (i == 0)
194 printf("Custom Register Initialization:\n");
195
196 printf(" @ 0x%08x -> 0x%08x\n",
197 le32_to_cpu(zynqhdr->register_init[i].address),
198 le32_to_cpu(zynqhdr->register_init[i].data));
199 }
200}
201
202static int zynqimage_check_params(struct image_tool_params *params)
203{
204 if (!params)
205 return 0;
206
207 if (params->addr != 0x0) {
208 fprintf(stderr, "Error: Load Address cannot be specified.\n");
209 return -1;
210 }
211
212 /*
213 * If the entry point is specified ensure it is 64 byte aligned.
214 */
215 if (params->eflag && (params->ep % 64 != 0)) {
216 fprintf(stderr,
217 "Error: Entry Point must be aligned to a 64-byte boundary.\n");
218 return -1;
219 }
220
Nathan Rossibc366052015-12-09 00:44:43 +1000221 return !(params->lflag || params->dflag);
Nathan Rossi66eef1e2015-11-17 22:56:56 +1000222}
223
224static int zynqimage_check_image_types(uint8_t type)
225{
226 if (type == IH_TYPE_ZYNQIMAGE)
227 return EXIT_SUCCESS;
228 return EXIT_FAILURE;
229}
230
Mike Looijmans3b646082016-09-20 11:37:24 +0200231static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
232 const char *filename)
233{
Michal Simekebe0f532016-12-06 17:17:01 +0100234 FILE *fp;
Mike Looijmans3b646082016-09-20 11:37:24 +0200235 struct zynq_reginit reginit;
236 unsigned int reg_count = 0;
Michal Simekebe0f532016-12-06 17:17:01 +0100237 int r, err;
238 struct stat path_stat;
Mike Looijmans3b646082016-09-20 11:37:24 +0200239
Michal Simekebe0f532016-12-06 17:17:01 +0100240 /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
241 fp = fopen(filename, "r");
Mike Looijmans3b646082016-09-20 11:37:24 +0200242 if (!fp) {
243 fprintf(stderr, "Cannot open initparams file: %s\n", filename);
244 exit(1);
245 }
Michal Simekebe0f532016-12-06 17:17:01 +0100246
247 err = fstat(fileno(fp), &path_stat);
Michal Simekac71d412016-12-20 09:58:31 +0100248 if (err) {
249 fclose(fp);
Michal Simekebe0f532016-12-06 17:17:01 +0100250 return;
Michal Simekac71d412016-12-20 09:58:31 +0100251 }
Michal Simekebe0f532016-12-06 17:17:01 +0100252
Michal Simekac71d412016-12-20 09:58:31 +0100253 if (!S_ISREG(path_stat.st_mode)) {
254 fclose(fp);
Michal Simekebe0f532016-12-06 17:17:01 +0100255 return;
Michal Simekac71d412016-12-20 09:58:31 +0100256 }
Michal Simekebe0f532016-12-06 17:17:01 +0100257
Mike Looijmans3b646082016-09-20 11:37:24 +0200258 do {
259 r = fscanf(fp, "%x %x", &reginit.address, &reginit.data);
260 if (r == 2) {
261 zynqhdr->register_init[reg_count] = reginit;
262 ++reg_count;
263 }
264 r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
265 } while ((r != EOF) && (reg_count < HEADER_REGINITS));
266 fclose(fp);
267}
268
Nathan Rossi66eef1e2015-11-17 22:56:56 +1000269static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
270 struct image_tool_params *params)
271{
272 struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
273 zynqimage_default_header(zynqhdr);
274
275 /* place image directly after header */
276 zynqhdr->image_offset =
277 cpu_to_le32((uint32_t)sizeof(struct zynq_header));
278 zynqhdr->image_size = cpu_to_le32((uint32_t)sbuf->st_size);
279 zynqhdr->image_stored_size = zynqhdr->image_size;
280 zynqhdr->image_load = 0x0;
281 if (params->eflag)
282 zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
283
Mike Looijmans3b646082016-09-20 11:37:24 +0200284 /* User can pass in text file with init list */
285 if (strlen(params->imagename2))
286 zynqimage_parse_initparams(zynqhdr, params->imagename2);
287
Nathan Rossi66eef1e2015-11-17 22:56:56 +1000288 zynqhdr->checksum = zynqimage_checksum(zynqhdr);
289}
290
291U_BOOT_IMAGE_TYPE(
292 zynqimage,
293 "Xilinx Zynq Boot Image support",
294 sizeof(struct zynq_header),
295 (void *)&zynqimage_header,
296 zynqimage_check_params,
297 zynqimage_verify_header,
298 zynqimage_print_header,
299 zynqimage_set_header,
300 NULL,
301 zynqimage_check_image_types,
302 NULL,
303 NULL
304);