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Jon Loeliger7237c032006-10-19 11:02:16 -05001/*
2 * Freescale I2C Controller
3 *
4 * Copyright 2006 Freescale Semiconductor, Inc.
5 *
6 * Based on earlier versions by Gleb Natapov <gnatapov@mrv.com>,
7 * Xianghua Xiao <x.xiao@motorola.com>, Eran Liberty (liberty@freescale.com),
8 * and Jeff Brown.
9 * Some bits are taken from linux driver writen by adrian@humboldt.co.uk.
10 *
Tom Rini5b8031c2016-01-14 22:05:13 -050011 * SPDX-License-Identifier: GPL-2.0
Jon Loeliger7237c032006-10-19 11:02:16 -050012 */
13
14#ifndef _ASM_FSL_I2C_H_
15#define _ASM_FSL_I2C_H_
16
17#include <asm/types.h>
18
mario.six@gdsys.ccec2c81c2016-04-25 08:31:01 +020019typedef struct fsl_i2c_base {
Jon Loeliger7237c032006-10-19 11:02:16 -050020
21 u8 adr; /* I2C slave address */
22 u8 res0[3];
23#define I2C_ADR 0xFE
24#define I2C_ADR_SHIFT 1
25#define I2C_ADR_RES ~(I2C_ADR)
26
27 u8 fdr; /* I2C frequency divider register */
28 u8 res1[3];
29#define IC2_FDR 0x3F
30#define IC2_FDR_SHIFT 0
31#define IC2_FDR_RES ~(IC2_FDR)
32
33 u8 cr; /* I2C control redister */
34 u8 res2[3];
35#define I2C_CR_MEN 0x80
36#define I2C_CR_MIEN 0x40
37#define I2C_CR_MSTA 0x20
38#define I2C_CR_MTX 0x10
39#define I2C_CR_TXAK 0x08
40#define I2C_CR_RSTA 0x04
Chunhe Lan9c3f77e2013-08-16 15:10:37 +080041#define I2C_CR_BIT6 0x02 /* required for workaround A004447 */
Jon Loeliger7237c032006-10-19 11:02:16 -050042#define I2C_CR_BCST 0x01
43
44 u8 sr; /* I2C status register */
45 u8 res3[3];
46#define I2C_SR_MCF 0x80
47#define I2C_SR_MAAS 0x40
48#define I2C_SR_MBB 0x20
49#define I2C_SR_MAL 0x10
50#define I2C_SR_BCSTM 0x08
51#define I2C_SR_SRW 0x04
52#define I2C_SR_MIF 0x02
53#define I2C_SR_RXAK 0x01
54
55 u8 dr; /* I2C data register */
56 u8 res4[3];
57#define I2C_DR 0xFF
58#define I2C_DR_SHIFT 0
59#define I2C_DR_RES ~(I2C_DR)
60
61 u8 dfsrr; /* I2C digital filter sampling rate register */
62 u8 res5[3];
63#define I2C_DFSRR 0x3F
64#define I2C_DFSRR_SHIFT 0
65#define I2C_DFSRR_RES ~(I2C_DR)
66
67 /* Fill out the reserved block */
68 u8 res6[0xE8];
69} fsl_i2c_t;
70
mario.six@gdsys.ccdbc82ce2016-04-25 08:31:09 +020071#ifdef CONFIG_DM_I2C
72struct fsl_i2c_dev {
73 struct fsl_i2c_base __iomem *base; /* register base */
74 u32 i2c_clk;
75 u32 index;
76 u8 slaveadd;
77 uint speed;
78};
79#endif
80
Jon Loeliger7237c032006-10-19 11:02:16 -050081#endif /* _ASM_I2C_H_ */