blob: e6b05db09d79f2f4b1097ef0d18ea72b1ff129eb [file] [log] [blame]
Mike Frysinger76d21802008-10-12 05:05:42 -04001/*
2 * U-boot - Configuration file for BF548 STAMP board
3 */
4
5#ifndef __CONFIG_BF548_EZKIT_H__
6#define __CONFIG_BF548_EZKIT_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysinger76d21802008-10-12 05:05:42 -04009
10
11/*
12 * Processor Settings
13 */
Mike Frysingerfbcf8e82010-12-23 14:58:37 -050014#define CONFIG_BFIN_CPU bf548-0.0
Mike Frysinger76d21802008-10-12 05:05:42 -040015#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 25000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 21
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 4
40
41
42/*
43 * Memory Settings
44 */
45#define CONFIG_MEM_ADD_WDTH 10
46#define CONFIG_MEM_SIZE 64
47
48#define CONFIG_EBIU_DDRCTL0_VAL 0x218A83FE
49#define CONFIG_EBIU_DDRCTL1_VAL 0x20022222
50#define CONFIG_EBIU_DDRCTL2_VAL 0x00000021
51
52/* Default EZ-Kit bank mapping:
53 * Async Bank 0 - 32MB Burst Flash
54 * Async Bank 1 - Ethernet
55 * Async Bank 2 - Nothing
56 * Async Bank 3 - Nothing
57 */
58#define CONFIG_EBIU_AMGCTL_VAL 0xFF
59#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
60#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
61#define CONFIG_EBIU_FCTL_VAL (BCLK_4)
62#define CONFIG_EBIU_MODE_VAL (B0MODE_FLASH)
63
Mike Frysingerfea63e22009-06-14 21:23:27 -040064#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
Mike Frysinger76d21802008-10-12 05:05:42 -040065#define CONFIG_SYS_MALLOC_LEN (768 * 1024)
66
67
68/*
69 * Network Settings
70 */
71#define ADI_CMDS_NETWORK 1
Ben Warren736fead2009-07-20 22:01:11 -070072#define CONFIG_SMC911X 1
73#define CONFIG_SMC911X_BASE 0x24000000
74#define CONFIG_SMC911X_16_BIT
Mike Frysinger76d21802008-10-12 05:05:42 -040075#define CONFIG_HOSTNAME bf548-ezkit
76/* Uncomment next line to use fixed MAC address */
77/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
78
79
80/*
81 * Flash Settings
82 */
83#define CONFIG_FLASH_CFI_DRIVER
84#define CONFIG_SYS_FLASH_BASE 0x20000000
85#define CONFIG_SYS_FLASH_CFI
86#define CONFIG_SYS_FLASH_PROTECTION
87#define CONFIG_SYS_MAX_FLASH_BANKS 1
88#define CONFIG_SYS_MAX_FLASH_SECT 259
89
90
91/*
92 * SPI Settings
93 */
94#define CONFIG_BFIN_SPI
95#define CONFIG_ENV_SPI_MAX_HZ 30000000
Mike Frysingerafac8b02009-06-14 22:29:35 -040096#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysinger76d21802008-10-12 05:05:42 -040097#define CONFIG_SPI_FLASH
98#define CONFIG_SPI_FLASH_STMICRO
99
100
101/*
102 * Env Storage Settings
103 */
104#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
105#define CONFIG_ENV_IS_IN_SPI_FLASH
106#define CONFIG_ENV_OFFSET 0x10000
107#define CONFIG_ENV_SIZE 0x2000
108#define CONFIG_ENV_SECT_SIZE 0x10000
Mike Frysinger76d82182009-07-21 22:17:36 -0400109#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysinger76d21802008-10-12 05:05:42 -0400110#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
111#define CONFIG_ENV_IS_IN_NAND
Mike Frysingerd413dbc2011-03-17 17:07:47 -0400112#define CONFIG_ENV_OFFSET 0x60000
Mike Frysinger76d21802008-10-12 05:05:42 -0400113#define CONFIG_ENV_SIZE 0x20000
114#else
Mike Frysinger1b48f122011-05-09 15:43:27 -0400115/* The BF548-EZKIT uses a top boot flash */
Mike Frysinger76d21802008-10-12 05:05:42 -0400116#define CONFIG_ENV_IS_IN_FLASH 1
Mike Frysinger1b48f122011-05-09 15:43:27 -0400117#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
118#define CONFIG_ENV_OFFSET (0x1000000 - CONFIG_ENV_SECT_SIZE)
119#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
120#define CONFIG_ENV_SECT_SIZE 0x8000
Mike Frysinger76d21802008-10-12 05:05:42 -0400121#endif
122
123
124/*
125 * NAND Settings
126 */
127#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
128#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
129# define CONFIG_BFIN_NFC_BOOTROM_ECC
130#endif
131#define CONFIG_DRIVER_NAND_BFIN
132#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
133#define CONFIG_SYS_MAX_NAND_DEVICE 1
Mike Frysinger76d21802008-10-12 05:05:42 -0400134
135
136/*
137 * I2C Settings
138 */
139#define CONFIG_BFIN_TWI_I2C 1
140#define CONFIG_HARD_I2C 1
Mike Frysinger76d21802008-10-12 05:05:42 -0400141
142
143/*
144 * SATA
145 */
146#if !defined(__ADSPBF544__)
147#define CONFIG_LIBATA
148#define CONFIG_SYS_SATA_MAX_DEVICE 1
149#define CONFIG_LBA48
150#define CONFIG_PATA_BFIN
151#define CONFIG_BFIN_ATAPI_BASE_ADDR 0xFFC03800
152#define CONFIG_BFIN_ATA_MODE XFER_PIO_4
153#endif
154
155
156/*
157 * SDH Settings
158 */
159#if !defined(__ADSPBF544__)
Cliff Caie54c8202009-11-20 08:24:43 +0000160#define CONFIG_GENERIC_MMC
Mike Frysinger76d21802008-10-12 05:05:42 -0400161#define CONFIG_MMC
162#define CONFIG_BFIN_SDH
163#endif
164
165
166/*
167 * USB Settings
168 */
169#if !defined(__ADSPBF544__)
170#define CONFIG_USB
171#define CONFIG_MUSB_HCD
172#define CONFIG_USB_BLACKFIN
173#define CONFIG_USB_STORAGE
174#define CONFIG_MUSB_TIMEOUT 100000
175#endif
176
177
178/*
179 * Misc Settings
180 */
181#define CONFIG_BOARD_EARLY_INIT_F
Mike Frysinger58d75702010-10-19 18:02:43 -0400182#define CONFIG_BOARD_SIZE_LIMIT $$(( 512 * 1024 ))
Mike Frysinger76d21802008-10-12 05:05:42 -0400183#define CONFIG_RTC_BFIN
184#define CONFIG_UART_CONSOLE 1
Mike Frysingerabaa5ba2010-09-29 20:24:16 +0000185#define CONFIG_BFIN_SPI_IMG_SIZE 0x50000
Mike Frysinger76d21802008-10-12 05:05:42 -0400186
187#ifndef __ADSPBF542__
188/* Don't waste time transferring a logo over the UART */
189# if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
190# define CONFIG_VIDEO
Mike Frysinger42c6e9a2012-02-03 20:44:54 -0500191# define EASYLOGO_HEADER <asm/bfin_logo_230x230_gzip.h>
Mike Frysinger76d21802008-10-12 05:05:42 -0400192# endif
193# define CONFIG_DEB_DMA_URGENT
194#endif
195
196/* Define if want to do post memory test */
197#undef CONFIG_POST
198#ifdef CONFIG_POST
Mike Frysinger21513742011-05-10 16:22:25 -0400199#define CONFIG_POST_BSPEC1_GPIO_LEDS \
200 GPIO_PG6, GPIO_PG7, GPIO_PG8, GPIO_PG9, GPIO_PG10, GPIO_PG11,
201#define CONFIG_POST_BSPEC2_GPIO_BUTTONS \
202 GPIO_PB8, GPIO_PB9, GPIO_PB10, GPIO_PB11
203#define CONFIG_POST_BSPEC2_GPIO_NAMES \
204 13, 12, 11, 10,
Mike Frysinger22f45ce2011-05-10 16:48:36 -0400205#define CONFIG_SYS_POST_FLASH_START 10
206#define CONFIG_SYS_POST_FLASH_END 127
Mike Frysinger76d21802008-10-12 05:05:42 -0400207#endif
208
209
210/*
211 * Pull in common ADI header for remaining command/environment setup
212 */
213#include <configs/bfin_adi_common.h>
214
Mike Frysinger76d21802008-10-12 05:05:42 -0400215#endif