| Graeme Russ | 8c63d47 | 2009-02-24 21:14:45 +1100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Daniel Engström, Omicron Ceti AB, daniel@omicron.se. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/io.h> |
| 26 | #include <asm/i8254.h> |
| 27 | #include <asm/ibmpc.h> |
| 28 | |
| 29 | #define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */ |
| 30 | #define TIMER2_VALUE 0x0a8e /* 440Hz */ |
| 31 | |
| 32 | int timer_init(void) |
| 33 | { |
| 34 | /* initialize timer 0 and 2 |
| 35 | * |
| 36 | * Timer 0 is used to increment system_tick 1000 times/sec |
| 37 | * Timer 1 was used for DRAM refresh in early PC's |
| 38 | * Timer 2 is used to drive the speaker |
| 39 | * (to stasrt a beep: write 3 to port 0x61, |
| 40 | * to stop it again: write 0) |
| 41 | */ |
| 42 | outb (PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2, |
| 43 | PIT_BASE + PIT_COMMAND); |
| 44 | outb (TIMER0_VALUE & 0xff, PIT_BASE + PIT_T0); |
| 45 | outb (TIMER0_VALUE >> 8, PIT_BASE + PIT_T0); |
| 46 | |
| 47 | outb (PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3, |
| 48 | PIT_BASE + PIT_COMMAND); |
| 49 | outb (TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2); |
| 50 | outb (TIMER2_VALUE >> 8, PIT_BASE + PIT_T2); |
| 51 | |
| 52 | irq_install_handler (0, timer_isr, NULL); |
| 53 | unmask_irq (0); |
| 54 | |
| 55 | return 0; |
| 56 | } |
| 57 | |
| 58 | static u16 read_pit(void) |
| 59 | { |
| 60 | u8 low; |
| 61 | |
| 62 | outb (PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND); |
| 63 | low = inb (PIT_BASE + PIT_T0); |
| 64 | |
| 65 | return ((inb (PIT_BASE + PIT_T0) << 8) | low); |
| 66 | } |
| 67 | |
| 68 | /* this is not very exact */ |
| 69 | void udelay (unsigned long usec) |
| 70 | { |
| 71 | int counter; |
| 72 | int wraps; |
| 73 | |
| 74 | if (timer_init_done) |
| 75 | { |
| 76 | counter = read_pit (); |
| 77 | wraps = usec / 1000; |
| 78 | usec = usec % 1000; |
| 79 | |
| 80 | usec *= 1194; |
| 81 | usec /= 1000; |
| 82 | usec += counter; |
| 83 | |
| 84 | while (usec > 1194) { |
| 85 | usec -= 1194; |
| 86 | wraps++; |
| 87 | } |
| 88 | |
| 89 | while (1) { |
| 90 | int new_count = read_pit (); |
| 91 | |
| 92 | if (((new_count < usec) && !wraps) || wraps < 0) |
| 93 | break; |
| 94 | |
| 95 | if (new_count > counter) |
| 96 | wraps--; |
| 97 | |
| 98 | counter = new_count; |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | } |