blob: d4143ecd80d1f9da585684a30aefcc1bfea4cbf9 [file] [log] [blame]
Andreas Bießmann5bf299b2013-04-02 06:05:54 +00001/*
2 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
3 * Rohit Choraria <rohitkc@ti.com>
4 *
5 * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andreas Bießmann5bf299b2013-04-02 06:05:54 +00008 */
9#ifndef __ASM_OMAP_GPMC_H
10#define __ASM_OMAP_GPMC_H
11
12#include <asm/arch/omap_gpmc.h>
13
14#define GPMC_BUF_EMPTY 0
15#define GPMC_BUF_FULL 1
16
17#define ECCCLEAR (0x1 << 8)
18#define ECCRESULTREG1 (0x1 << 0)
19#define ECCSIZE512BYTE 0xFF
20#define ECCSIZE1 (ECCSIZE512BYTE << 22)
21#define ECCSIZE0 (ECCSIZE512BYTE << 12)
22#define ECCSIZE0SEL (0x000 << 0)
23
24/* Generic ECC Layouts */
25/* Large Page x8 NAND device Layout */
26#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
27#define GPMC_NAND_HW_ECC_LAYOUT {\
28 .eccbytes = 12,\
29 .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
30 9, 10, 11, 12},\
31 .oobfree = {\
32 {.offset = 13,\
33 .length = 51 } } \
34}
35#endif
36
37/* Large Page x16 NAND device Layout */
38#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
39#define GPMC_NAND_HW_ECC_LAYOUT {\
40 .eccbytes = 12,\
41 .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
42 10, 11, 12, 13},\
43 .oobfree = {\
44 {.offset = 14,\
45 .length = 50 } } \
46}
47#endif
48
49/* Small Page x8 NAND device Layout */
50#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
51#define GPMC_NAND_HW_ECC_LAYOUT {\
52 .eccbytes = 3,\
53 .eccpos = {1, 2, 3},\
54 .oobfree = {\
55 {.offset = 4,\
56 .length = 12 } } \
57}
58#endif
59
60/* Small Page x16 NAND device Layout */
61#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
62#define GPMC_NAND_HW_ECC_LAYOUT {\
63 .eccbytes = 3,\
64 .eccpos = {2, 3, 4},\
65 .oobfree = {\
66 {.offset = 5,\
67 .length = 11 } } \
68}
69#endif
70
pekon guptad016dc42013-11-18 19:03:00 +053071enum omap_ecc {
72 /* 1-bit ECC calculation by Software, Error detection by Software */
73 OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
74 /* 1-bit ECC calculation by GPMC, Error detection by Software */
75 /* ECC layout compatible to legacy ROMCODE. */
76 OMAP_ECC_HAM1_CODE_HW,
77 /* 4-bit ECC calculation by GPMC, Error detection by Software */
78 OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
79 /* 4-bit ECC calculation by GPMC, Error detection by ELM */
80 OMAP_ECC_BCH4_CODE_HW,
81 /* 8-bit ECC calculation by GPMC, Error detection by Software */
82 OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
83 /* 8-bit ECC calculation by GPMC, Error detection by ELM */
84 OMAP_ECC_BCH8_CODE_HW,
85};
86
Andreas Bießmann5bf299b2013-04-02 06:05:54 +000087#endif /* __ASM_OMAP_GPMC_H */