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Andy Fleming5f184712011-04-08 02:10:27 -05001/*
2 * Generic PHY Management code
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming5f184712011-04-08 02:10:27 -05005 *
6 * Copyright 2011 Freescale Semiconductor, Inc.
7 * author Andy Fleming
8 *
9 * Based loosely off of Linux's PHY Lib
10 */
11
12#include <config.h>
13#include <common.h>
14#include <malloc.h>
15#include <net.h>
16#include <command.h>
17#include <miiphy.h>
18#include <phy.h>
19#include <errno.h>
Troy Kisky1adb4062012-10-22 16:40:43 +000020#include <linux/err.h>
Andy Fleming5f184712011-04-08 02:10:27 -050021
22/* Generic PHY support and helper functions */
23
24/**
25 * genphy_config_advert - sanitize and advertise auto-negotation parameters
26 * @phydev: target phy_device struct
27 *
28 * Description: Writes MII_ADVERTISE with the appropriate values,
29 * after sanitizing the values to make sure we only advertise
30 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
31 * hasn't changed, and > 0 if it has changed.
32 */
Kim Phillips960d70c2012-10-29 13:34:34 +000033static int genphy_config_advert(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -050034{
35 u32 advertise;
36 int oldadv, adv;
37 int err, changed = 0;
38
39 /* Only allow advertising what
40 * this PHY supports */
41 phydev->advertising &= phydev->supported;
42 advertise = phydev->advertising;
43
44 /* Setup standard advertisement */
45 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
46
47 if (adv < 0)
48 return adv;
49
50 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
51 ADVERTISE_PAUSE_ASYM);
52 if (advertise & ADVERTISED_10baseT_Half)
53 adv |= ADVERTISE_10HALF;
54 if (advertise & ADVERTISED_10baseT_Full)
55 adv |= ADVERTISE_10FULL;
56 if (advertise & ADVERTISED_100baseT_Half)
57 adv |= ADVERTISE_100HALF;
58 if (advertise & ADVERTISED_100baseT_Full)
59 adv |= ADVERTISE_100FULL;
60 if (advertise & ADVERTISED_Pause)
61 adv |= ADVERTISE_PAUSE_CAP;
62 if (advertise & ADVERTISED_Asym_Pause)
63 adv |= ADVERTISE_PAUSE_ASYM;
Charles Coldwellde1d7862013-02-21 08:25:52 -050064 if (advertise & ADVERTISED_1000baseX_Half)
65 adv |= ADVERTISE_1000XHALF;
66 if (advertise & ADVERTISED_1000baseX_Full)
67 adv |= ADVERTISE_1000XFULL;
Andy Fleming5f184712011-04-08 02:10:27 -050068
69 if (adv != oldadv) {
70 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
71
72 if (err < 0)
73 return err;
74 changed = 1;
75 }
76
77 /* Configure gigabit if it's supported */
78 if (phydev->supported & (SUPPORTED_1000baseT_Half |
79 SUPPORTED_1000baseT_Full)) {
80 oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
81
82 if (adv < 0)
83 return adv;
84
85 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
86 if (advertise & SUPPORTED_1000baseT_Half)
87 adv |= ADVERTISE_1000HALF;
88 if (advertise & SUPPORTED_1000baseT_Full)
89 adv |= ADVERTISE_1000FULL;
90
91 if (adv != oldadv) {
92 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
93 adv);
94
95 if (err < 0)
96 return err;
97 changed = 1;
98 }
99 }
100
101 return changed;
102}
103
104
105/**
106 * genphy_setup_forced - configures/forces speed/duplex from @phydev
107 * @phydev: target phy_device struct
108 *
109 * Description: Configures MII_BMCR to force speed/duplex
110 * to the values in phydev. Assumes that the values are valid.
111 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000112static int genphy_setup_forced(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500113{
114 int err;
115 int ctl = 0;
116
117 phydev->pause = phydev->asym_pause = 0;
118
119 if (SPEED_1000 == phydev->speed)
120 ctl |= BMCR_SPEED1000;
121 else if (SPEED_100 == phydev->speed)
122 ctl |= BMCR_SPEED100;
123
124 if (DUPLEX_FULL == phydev->duplex)
125 ctl |= BMCR_FULLDPLX;
126
127 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
128
129 return err;
130}
131
132
133/**
134 * genphy_restart_aneg - Enable and Restart Autonegotiation
135 * @phydev: target phy_device struct
136 */
137int genphy_restart_aneg(struct phy_device *phydev)
138{
139 int ctl;
140
141 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
142
143 if (ctl < 0)
144 return ctl;
145
146 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
147
148 /* Don't isolate the PHY if we're negotiating */
149 ctl &= ~(BMCR_ISOLATE);
150
151 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
152
153 return ctl;
154}
155
156
157/**
158 * genphy_config_aneg - restart auto-negotiation or write BMCR
159 * @phydev: target phy_device struct
160 *
161 * Description: If auto-negotiation is enabled, we configure the
162 * advertising, and then restart auto-negotiation. If it is not
163 * enabled, then we write the BMCR.
164 */
165int genphy_config_aneg(struct phy_device *phydev)
166{
167 int result;
168
169 if (AUTONEG_ENABLE != phydev->autoneg)
170 return genphy_setup_forced(phydev);
171
172 result = genphy_config_advert(phydev);
173
174 if (result < 0) /* error */
175 return result;
176
177 if (result == 0) {
178 /* Advertisment hasn't changed, but maybe aneg was never on to
179 * begin with? Or maybe phy was isolated? */
180 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
181
182 if (ctl < 0)
183 return ctl;
184
185 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
186 result = 1; /* do restart aneg */
187 }
188
189 /* Only restart aneg if we are advertising something different
190 * than we were before. */
191 if (result > 0)
192 result = genphy_restart_aneg(phydev);
193
194 return result;
195}
196
197/**
198 * genphy_update_link - update link status in @phydev
199 * @phydev: target phy_device struct
200 *
201 * Description: Update the value in phydev->link to reflect the
202 * current link value. In order to do this, we need to read
203 * the status register twice, keeping the second value.
204 */
205int genphy_update_link(struct phy_device *phydev)
206{
207 unsigned int mii_reg;
208
209 /*
210 * Wait if the link is up, and autonegotiation is in progress
211 * (ie - we're capable and it's not done)
212 */
213 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
214
215 /*
216 * If we already saw the link up, and it hasn't gone down, then
217 * we don't need to wait for autoneg again
218 */
219 if (phydev->link && mii_reg & BMSR_LSTATUS)
220 return 0;
221
222 if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
223 int i = 0;
224
225 printf("%s Waiting for PHY auto negotiation to complete",
226 phydev->dev->name);
227 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
228 /*
229 * Timeout reached ?
230 */
231 if (i > PHY_ANEG_TIMEOUT) {
232 printf(" TIMEOUT !\n");
233 phydev->link = 0;
234 return 0;
235 }
236
237 if (ctrlc()) {
238 puts("user interrupt!\n");
239 phydev->link = 0;
240 return -EINTR;
241 }
242
243 if ((i++ % 500) == 0)
244 printf(".");
245
246 udelay(1000); /* 1 ms */
247 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
248 }
249 printf(" done\n");
250 phydev->link = 1;
251 } else {
252 /* Read the link a second time to clear the latched state */
253 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
254
255 if (mii_reg & BMSR_LSTATUS)
256 phydev->link = 1;
257 else
258 phydev->link = 0;
259 }
260
261 return 0;
262}
263
264/*
265 * Generic function which updates the speed and duplex. If
266 * autonegotiation is enabled, it uses the AND of the link
267 * partner's advertised capabilities and our advertised
268 * capabilities. If autonegotiation is disabled, we use the
269 * appropriate bits in the control register.
270 *
271 * Stolen from Linux's mii.c and phy_device.c
272 */
Yegor Yefremove2043f52012-11-28 11:15:17 +0100273int genphy_parse_link(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500274{
275 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
276
277 /* We're using autonegotiation */
278 if (mii_reg & BMSR_ANEGCAPABLE) {
279 u32 lpa = 0;
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200280 int gblpa = 0;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500281 u32 estatus = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500282
283 /* Check for gigabit capability */
284 if (mii_reg & BMSR_ERCAP) {
285 /* We want a list of states supported by
286 * both PHYs in the link
287 */
288 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200289 if (gblpa < 0) {
290 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
291 gblpa = 0;
292 }
Andy Fleming5f184712011-04-08 02:10:27 -0500293 gblpa &= phy_read(phydev,
294 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
295 }
296
297 /* Set the baseline so we only have to set them
298 * if they're different
299 */
300 phydev->speed = SPEED_10;
301 phydev->duplex = DUPLEX_HALF;
302
303 /* Check the gigabit fields */
304 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
305 phydev->speed = SPEED_1000;
306
307 if (gblpa & PHY_1000BTSR_1000FD)
308 phydev->duplex = DUPLEX_FULL;
309
310 /* We're done! */
311 return 0;
312 }
313
314 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
315 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
316
Wolfgang Denk0dcfb0f2011-09-28 21:02:43 +0200317 if (lpa & (LPA_100FULL | LPA_100HALF)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500318 phydev->speed = SPEED_100;
319
Wolfgang Denk0dcfb0f2011-09-28 21:02:43 +0200320 if (lpa & LPA_100FULL)
321 phydev->duplex = DUPLEX_FULL;
322
323 } else if (lpa & LPA_10FULL)
Andy Fleming5f184712011-04-08 02:10:27 -0500324 phydev->duplex = DUPLEX_FULL;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500325
Sascha Silbe9ba30f62013-07-19 12:25:10 +0200326 /*
327 * Extended status may indicate that the PHY supports
328 * 1000BASE-T/X even though the 1000BASE-T registers
329 * are missing. In this case we can't tell whether the
330 * peer also supports it, so we only check extended
331 * status if the 1000BASE-T registers are actually
332 * missing.
333 */
334 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
Charles Coldwellde1d7862013-02-21 08:25:52 -0500335 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
336 MII_ESTATUS);
337
338 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
339 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
340 phydev->speed = SPEED_1000;
341 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
342 phydev->duplex = DUPLEX_FULL;
343 }
344
Andy Fleming5f184712011-04-08 02:10:27 -0500345 } else {
346 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
347
348 phydev->speed = SPEED_10;
349 phydev->duplex = DUPLEX_HALF;
350
351 if (bmcr & BMCR_FULLDPLX)
352 phydev->duplex = DUPLEX_FULL;
353
354 if (bmcr & BMCR_SPEED1000)
355 phydev->speed = SPEED_1000;
356 else if (bmcr & BMCR_SPEED100)
357 phydev->speed = SPEED_100;
358 }
359
360 return 0;
361}
362
363int genphy_config(struct phy_device *phydev)
364{
365 int val;
366 u32 features;
367
368 /* For now, I'll claim that the generic driver supports
369 * all possible port types */
370 features = (SUPPORTED_TP | SUPPORTED_MII
371 | SUPPORTED_AUI | SUPPORTED_FIBRE |
372 SUPPORTED_BNC);
373
374 /* Do we support autonegotiation? */
375 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
376
377 if (val < 0)
378 return val;
379
380 if (val & BMSR_ANEGCAPABLE)
381 features |= SUPPORTED_Autoneg;
382
383 if (val & BMSR_100FULL)
384 features |= SUPPORTED_100baseT_Full;
385 if (val & BMSR_100HALF)
386 features |= SUPPORTED_100baseT_Half;
387 if (val & BMSR_10FULL)
388 features |= SUPPORTED_10baseT_Full;
389 if (val & BMSR_10HALF)
390 features |= SUPPORTED_10baseT_Half;
391
392 if (val & BMSR_ESTATEN) {
393 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
394
395 if (val < 0)
396 return val;
397
398 if (val & ESTATUS_1000_TFULL)
399 features |= SUPPORTED_1000baseT_Full;
400 if (val & ESTATUS_1000_THALF)
401 features |= SUPPORTED_1000baseT_Half;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500402 if (val & ESTATUS_1000_XFULL)
403 features |= SUPPORTED_1000baseX_Full;
404 if (val & ESTATUS_1000_XHALF)
Fabio Estevam9a5dad22013-07-19 10:01:34 -0300405 features |= SUPPORTED_1000baseX_Half;
Andy Fleming5f184712011-04-08 02:10:27 -0500406 }
407
408 phydev->supported = features;
409 phydev->advertising = features;
410
411 genphy_config_aneg(phydev);
412
413 return 0;
414}
415
416int genphy_startup(struct phy_device *phydev)
417{
418 genphy_update_link(phydev);
419 genphy_parse_link(phydev);
420
421 return 0;
422}
423
424int genphy_shutdown(struct phy_device *phydev)
425{
426 return 0;
427}
428
429static struct phy_driver genphy_driver = {
430 .uid = 0xffffffff,
431 .mask = 0xffffffff,
432 .name = "Generic PHY",
433 .features = 0,
434 .config = genphy_config,
435 .startup = genphy_startup,
436 .shutdown = genphy_shutdown,
437};
438
439static LIST_HEAD(phy_drivers);
440
441int phy_init(void)
442{
Andy Fleming9082eea2011-04-07 21:56:05 -0500443#ifdef CONFIG_PHY_ATHEROS
444 phy_atheros_init();
445#endif
446#ifdef CONFIG_PHY_BROADCOM
447 phy_broadcom_init();
448#endif
449#ifdef CONFIG_PHY_DAVICOM
450 phy_davicom_init();
451#endif
Matt Porterf485c8a2013-03-20 05:38:13 +0000452#ifdef CONFIG_PHY_ET1011C
453 phy_et1011c_init();
454#endif
Yegor Yefremov0fae2502012-11-28 11:15:18 +0100455#ifdef CONFIG_PHY_ICPLUS
456 phy_icplus_init();
457#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500458#ifdef CONFIG_PHY_LXT
459 phy_lxt_init();
460#endif
461#ifdef CONFIG_PHY_MARVELL
462 phy_marvell_init();
463#endif
464#ifdef CONFIG_PHY_MICREL
465 phy_micrel_init();
466#endif
467#ifdef CONFIG_PHY_NATSEMI
468 phy_natsemi_init();
469#endif
470#ifdef CONFIG_PHY_REALTEK
471 phy_realtek_init();
472#endif
Nobuhiro Iwamatsu5751aa22011-11-23 21:24:15 +0000473#ifdef CONFIG_PHY_SMSC
474 phy_smsc_init();
475#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500476#ifdef CONFIG_PHY_TERANETICS
477 phy_teranetics_init();
478#endif
479#ifdef CONFIG_PHY_VITESSE
480 phy_vitesse_init();
481#endif
482
Andy Fleming5f184712011-04-08 02:10:27 -0500483 return 0;
484}
485
486int phy_register(struct phy_driver *drv)
487{
488 INIT_LIST_HEAD(&drv->list);
489 list_add_tail(&drv->list, &phy_drivers);
490
491 return 0;
492}
493
Kim Phillips960d70c2012-10-29 13:34:34 +0000494static int phy_probe(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500495{
496 int err = 0;
497
498 phydev->advertising = phydev->supported = phydev->drv->features;
499 phydev->mmds = phydev->drv->mmds;
500
501 if (phydev->drv->probe)
502 err = phydev->drv->probe(phydev);
503
504 return err;
505}
506
507static struct phy_driver *generic_for_interface(phy_interface_t interface)
508{
509#ifdef CONFIG_PHYLIB_10G
510 if (is_10g_interface(interface))
511 return &gen10g_driver;
512#endif
513
514 return &genphy_driver;
515}
516
Kim Phillips960d70c2012-10-29 13:34:34 +0000517static struct phy_driver *get_phy_driver(struct phy_device *phydev,
Andy Fleming5f184712011-04-08 02:10:27 -0500518 phy_interface_t interface)
519{
520 struct list_head *entry;
521 int phy_id = phydev->phy_id;
522 struct phy_driver *drv = NULL;
523
524 list_for_each(entry, &phy_drivers) {
525 drv = list_entry(entry, struct phy_driver, list);
526 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
527 return drv;
528 }
529
530 /* If we made it here, there's no driver for this PHY */
531 return generic_for_interface(interface);
532}
533
Kim Phillips960d70c2012-10-29 13:34:34 +0000534static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
535 int phy_id,
536 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500537{
538 struct phy_device *dev;
539
540 /* We allocate the device, and initialize the
541 * default values */
542 dev = malloc(sizeof(*dev));
543 if (!dev) {
544 printf("Failed to allocate PHY device for %s:%d\n",
545 bus->name, addr);
546 return NULL;
547 }
548
549 memset(dev, 0, sizeof(*dev));
550
551 dev->duplex = -1;
552 dev->link = 1;
553 dev->interface = interface;
554
555 dev->autoneg = AUTONEG_ENABLE;
556
557 dev->addr = addr;
558 dev->phy_id = phy_id;
559 dev->bus = bus;
560
561 dev->drv = get_phy_driver(dev, interface);
562
563 phy_probe(dev);
564
565 bus->phymap[addr] = dev;
566
567 return dev;
568}
569
570/**
571 * get_phy_id - reads the specified addr for its ID.
572 * @bus: the target MII bus
573 * @addr: PHY address on the MII bus
574 * @phy_id: where to store the ID retrieved.
575 *
576 * Description: Reads the ID registers of the PHY at @addr on the
577 * @bus, stores it in @phy_id and returns zero on success.
578 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000579static int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
Andy Fleming5f184712011-04-08 02:10:27 -0500580{
581 int phy_reg;
582
583 /* Grab the bits from PHYIR1, and put them
584 * in the upper half */
585 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
586
587 if (phy_reg < 0)
588 return -EIO;
589
590 *phy_id = (phy_reg & 0xffff) << 16;
591
592 /* Grab the bits from PHYIR2, and put them in the lower half */
593 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
594
595 if (phy_reg < 0)
596 return -EIO;
597
598 *phy_id |= (phy_reg & 0xffff);
599
600 return 0;
601}
602
Troy Kisky1adb4062012-10-22 16:40:43 +0000603static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
604 unsigned phy_mask, int devad, phy_interface_t interface)
605{
606 u32 phy_id = 0xffffffff;
607 while (phy_mask) {
608 int addr = ffs(phy_mask) - 1;
609 int r = get_phy_id(bus, addr, devad, &phy_id);
610 if (r < 0)
611 return ERR_PTR(r);
612 /* If the PHY ID is mostly f's, we didn't find anything */
613 if ((phy_id & 0x1fffffff) != 0x1fffffff)
614 return phy_device_create(bus, addr, phy_id, interface);
615 phy_mask &= ~(1 << addr);
616 }
617 return NULL;
618}
619
620static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
621 unsigned phy_mask, phy_interface_t interface)
622{
623 /* If we have one, return the existing device, with new interface */
624 while (phy_mask) {
625 int addr = ffs(phy_mask) - 1;
626 if (bus->phymap[addr]) {
627 bus->phymap[addr]->interface = interface;
628 return bus->phymap[addr];
629 }
630 phy_mask &= ~(1 << addr);
631 }
632 return NULL;
633}
634
635static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
636 unsigned phy_mask, phy_interface_t interface)
637{
638 int i;
639 struct phy_device *phydev;
640
641 phydev = search_for_existing_phy(bus, phy_mask, interface);
642 if (phydev)
643 return phydev;
644 /* Try Standard (ie Clause 22) access */
645 /* Otherwise we have to try Clause 45 */
646 for (i = 0; i < 5; i++) {
647 phydev = create_phy_by_mask(bus, phy_mask,
648 i ? i : MDIO_DEVAD_NONE, interface);
649 if (IS_ERR(phydev))
650 return NULL;
651 if (phydev)
652 return phydev;
653 }
654 printf("Phy not found\n");
655 return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface);
656}
657
Andy Fleming5f184712011-04-08 02:10:27 -0500658/**
659 * get_phy_device - reads the specified PHY device and returns its @phy_device struct
660 * @bus: the target MII bus
661 * @addr: PHY address on the MII bus
662 *
663 * Description: Reads the ID registers of the PHY at @addr on the
664 * @bus, then allocates and returns the phy_device to represent it.
665 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000666static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
667 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500668{
Troy Kisky1adb4062012-10-22 16:40:43 +0000669 return get_phy_device_by_mask(bus, 1 << addr, interface);
Andy Fleming5f184712011-04-08 02:10:27 -0500670}
671
672int phy_reset(struct phy_device *phydev)
673{
674 int reg;
675 int timeout = 500;
676 int devad = MDIO_DEVAD_NONE;
677
678#ifdef CONFIG_PHYLIB_10G
679 /* If it's 10G, we need to issue reset through one of the MMDs */
680 if (is_10g_interface(phydev->interface)) {
681 if (!phydev->mmds)
682 gen10g_discover_mmds(phydev);
683
684 devad = ffs(phydev->mmds) - 1;
685 }
686#endif
687
688 reg = phy_read(phydev, devad, MII_BMCR);
689 if (reg < 0) {
690 debug("PHY status read failed\n");
691 return -1;
692 }
693
694 reg |= BMCR_RESET;
695
696 if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
697 debug("PHY reset failed\n");
698 return -1;
699 }
700
701#ifdef CONFIG_PHY_RESET_DELAY
702 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
703#endif
704 /*
705 * Poll the control register for the reset bit to go to 0 (it is
706 * auto-clearing). This should happen within 0.5 seconds per the
707 * IEEE spec.
708 */
709 while ((reg & BMCR_RESET) && timeout--) {
710 reg = phy_read(phydev, devad, MII_BMCR);
711
712 if (reg < 0) {
713 debug("PHY status read failed\n");
714 return -1;
715 }
716 udelay(1000);
717 }
718
719 if (reg & BMCR_RESET) {
720 puts("PHY reset timed out\n");
721 return -1;
722 }
723
724 return 0;
725}
726
727int miiphy_reset(const char *devname, unsigned char addr)
728{
729 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
730 struct phy_device *phydev;
731
732 /*
733 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
734 * If later code tries to connect with the right interface, this will
735 * be corrected by get_phy_device in phy_connect()
736 */
737 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
738
739 return phy_reset(phydev);
740}
741
Troy Kisky1adb4062012-10-22 16:40:43 +0000742struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
743 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500744{
Andy Fleming5f184712011-04-08 02:10:27 -0500745 /* Reset the bus */
Vladimir Zapolskiye3a77212011-09-05 07:24:07 +0000746 if (bus->reset)
747 bus->reset(bus);
Andy Fleming5f184712011-04-08 02:10:27 -0500748
749 /* Wait 15ms to make sure the PHY has come out of hard reset */
750 udelay(15000);
Troy Kisky1adb4062012-10-22 16:40:43 +0000751 return get_phy_device_by_mask(bus, phy_mask, interface);
752}
Andy Fleming5f184712011-04-08 02:10:27 -0500753
Troy Kisky1adb4062012-10-22 16:40:43 +0000754void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
755{
Andy Fleming5f184712011-04-08 02:10:27 -0500756 /* Soft Reset the PHY */
757 phy_reset(phydev);
Troy Kisky1adb4062012-10-22 16:40:43 +0000758 if (phydev->dev) {
Andy Fleming5f184712011-04-08 02:10:27 -0500759 printf("%s:%d is connected to %s. Reconnecting to %s\n",
Troy Kisky1adb4062012-10-22 16:40:43 +0000760 phydev->bus->name, phydev->addr,
761 phydev->dev->name, dev->name);
762 }
Andy Fleming5f184712011-04-08 02:10:27 -0500763 phydev->dev = dev;
Wolfgang Denkb91a9d92011-07-24 21:39:10 +0000764 debug("%s connected to %s\n", dev->name, phydev->drv->name);
Troy Kisky1adb4062012-10-22 16:40:43 +0000765}
Andy Fleming5f184712011-04-08 02:10:27 -0500766
Troy Kisky1adb4062012-10-22 16:40:43 +0000767struct phy_device *phy_connect(struct mii_dev *bus, int addr,
768 struct eth_device *dev, phy_interface_t interface)
769{
770 struct phy_device *phydev;
771
772 phydev = phy_find_by_mask(bus, 1 << addr, interface);
773 if (phydev)
774 phy_connect_dev(phydev, dev);
775 else
776 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
Andy Fleming5f184712011-04-08 02:10:27 -0500777 return phydev;
778}
779
Timur Tabi6e5b9ac2012-07-05 10:33:18 +0000780/*
781 * Start the PHY. Returns 0 on success, or a negative error code.
782 */
Andy Fleming5f184712011-04-08 02:10:27 -0500783int phy_startup(struct phy_device *phydev)
784{
785 if (phydev->drv->startup)
Timur Tabi6e5b9ac2012-07-05 10:33:18 +0000786 return phydev->drv->startup(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500787
788 return 0;
789}
790
791static int __board_phy_config(struct phy_device *phydev)
792{
Troy Kisky9fafe7d2012-02-07 14:08:49 +0000793 if (phydev->drv->config)
794 return phydev->drv->config(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500795 return 0;
796}
797
798int board_phy_config(struct phy_device *phydev)
799 __attribute__((weak, alias("__board_phy_config")));
800
801int phy_config(struct phy_device *phydev)
802{
Andy Fleming5f184712011-04-08 02:10:27 -0500803 /* Invoke an optional board-specific helper */
804 board_phy_config(phydev);
805
806 return 0;
807}
808
809int phy_shutdown(struct phy_device *phydev)
810{
811 if (phydev->drv->shutdown)
812 phydev->drv->shutdown(phydev);
813
814 return 0;
815}