Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000, 2001 |
| 4 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * FPGA support |
| 9 | */ |
| 10 | #include <common.h> |
| 11 | #include <command.h> |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 12 | #include <fpga.h> |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 13 | #include <fs.h> |
wdenk | c3d2b4b | 2005-01-22 18:13:04 +0000 | [diff] [blame] | 14 | #include <malloc.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 15 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 16 | /* Local defines */ |
Michal Simek | 5cf2228 | 2017-01-06 11:20:54 +0100 | [diff] [blame] | 17 | enum { |
| 18 | FPGA_NONE = -1, |
| 19 | FPGA_INFO, |
| 20 | FPGA_LOAD, |
| 21 | FPGA_LOADB, |
| 22 | FPGA_DUMP, |
| 23 | FPGA_LOADMK, |
| 24 | FPGA_LOADP, |
| 25 | FPGA_LOADBP, |
| 26 | FPGA_LOADFS, |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 27 | FPGA_LOADS, |
Michal Simek | 5cf2228 | 2017-01-06 11:20:54 +0100 | [diff] [blame] | 28 | }; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 29 | |
Michal Simek | 323fe38 | 2018-05-30 10:00:40 +0200 | [diff] [blame] | 30 | /* |
| 31 | * Map op to supported operations. We don't use a table since we |
| 32 | * would just have to relocate it from flash anyway. |
| 33 | */ |
| 34 | static int fpga_get_op(char *opstr) |
| 35 | { |
| 36 | int op = FPGA_NONE; |
| 37 | |
| 38 | if (!strcmp("info", opstr)) |
| 39 | op = FPGA_INFO; |
| 40 | else if (!strcmp("loadb", opstr)) |
| 41 | op = FPGA_LOADB; |
| 42 | else if (!strcmp("load", opstr)) |
| 43 | op = FPGA_LOAD; |
| 44 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 45 | else if (!strcmp("loadp", opstr)) |
| 46 | op = FPGA_LOADP; |
| 47 | #endif |
| 48 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 49 | else if (!strcmp("loadbp", opstr)) |
| 50 | op = FPGA_LOADBP; |
| 51 | #endif |
| 52 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 53 | else if (!strcmp("loadfs", opstr)) |
| 54 | op = FPGA_LOADFS; |
| 55 | #endif |
| 56 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
| 57 | else if (!strcmp("loadmk", opstr)) |
| 58 | op = FPGA_LOADMK; |
| 59 | #endif |
| 60 | else if (!strcmp("dump", opstr)) |
| 61 | op = FPGA_DUMP; |
| 62 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 63 | else if (!strcmp("loads", opstr)) |
| 64 | op = FPGA_LOADS; |
| 65 | #endif |
| 66 | |
| 67 | return op; |
| 68 | } |
| 69 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 70 | /* ------------------------------------------------------------------------- */ |
| 71 | /* command form: |
| 72 | * fpga <op> <device number> <data addr> <datasize> |
| 73 | * where op is 'load', 'dump', or 'info' |
| 74 | * If there is no device number field, the fpga environment variable is used. |
| 75 | * If there is no data addr field, the fpgadata environment variable is used. |
| 76 | * The info command requires no data address field. |
| 77 | */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 78 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 79 | { |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 80 | int op, dev = FPGA_INVALID_DEVICE; |
| 81 | size_t data_size = 0; |
| 82 | void *fpga_data = NULL; |
Simon Glass | 00caae6 | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 83 | char *devstr = env_get("fpga"); |
| 84 | char *datastr = env_get("fpgadata"); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 85 | int rc = FPGA_FAIL; |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 86 | int wrong_parms = 0; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 87 | #if defined(CONFIG_FIT) |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 88 | const char *fit_uname = NULL; |
| 89 | ulong fit_addr; |
| 90 | #endif |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 91 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 92 | fpga_fs_info fpga_fsinfo; |
| 93 | fpga_fsinfo.fstype = FS_TYPE_ANY; |
| 94 | #endif |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 95 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 96 | struct fpga_secure_info fpga_sec_info; |
| 97 | |
| 98 | memset(&fpga_sec_info, 0, sizeof(fpga_sec_info)); |
| 99 | #endif |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 100 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 101 | if (devstr) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 102 | dev = (int) simple_strtoul(devstr, NULL, 16); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 103 | if (datastr) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 104 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 105 | |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 106 | if (argc > 9 || argc < 2) { |
| 107 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
| 108 | return CMD_RET_USAGE; |
| 109 | } |
| 110 | |
Michal Simek | 323fe38 | 2018-05-30 10:00:40 +0200 | [diff] [blame] | 111 | op = fpga_get_op(argv[1]); |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 112 | |
| 113 | switch (op) { |
Michal Simek | 5501096 | 2018-05-30 09:57:42 +0200 | [diff] [blame] | 114 | case FPGA_NONE: |
| 115 | printf("Unknown fpga operation \"%s\"\n", argv[1]); |
| 116 | return CMD_RET_USAGE; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 117 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 118 | case FPGA_LOADFS: |
| 119 | if (argc < 9) |
| 120 | return CMD_RET_USAGE; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 121 | fpga_fsinfo.blocksize = (unsigned int) |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 122 | simple_strtoul(argv[5], NULL, 16); |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 123 | fpga_fsinfo.interface = argv[6]; |
| 124 | fpga_fsinfo.dev_part = argv[7]; |
| 125 | fpga_fsinfo.filename = argv[8]; |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 126 | argc = 5; |
| 127 | break; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 128 | #endif |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 129 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 130 | case FPGA_LOADS: |
| 131 | if (argc < 7) |
| 132 | return CMD_RET_USAGE; |
| 133 | if (argc == 8) |
| 134 | fpga_sec_info.userkey_addr = (u8 *)(uintptr_t) |
| 135 | simple_strtoull(argv[7], |
| 136 | NULL, 16); |
| 137 | fpga_sec_info.encflag = (u8)simple_strtoul(argv[6], NULL, 16); |
| 138 | fpga_sec_info.authflag = (u8)simple_strtoul(argv[5], NULL, 16); |
| 139 | argc = 5; |
| 140 | break; |
| 141 | #endif |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame] | 142 | default: |
| 143 | break; |
| 144 | } |
| 145 | |
| 146 | switch (argc) { |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 147 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 148 | data_size = simple_strtoul(argv[4], NULL, 16); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 149 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 150 | case 4: /* fpga <op> <dev> <data> */ |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 151 | #if defined(CONFIG_FIT) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 152 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 153 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 154 | fpga_data = (void *)fit_addr; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 155 | debug("* fpga: subimage '%s' from FIT image ", |
| 156 | fit_uname); |
| 157 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 158 | } else |
| 159 | #endif |
| 160 | { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 161 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
Stefano Babic | 06297db | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 162 | debug("* fpga: cmdline image address = 0x%08lx\n", |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 163 | (ulong)fpga_data); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 164 | } |
Michal Simek | 455ad58 | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 165 | debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 166 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 167 | case 3: /* fpga <op> <dev | data addr> */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 168 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
Stefano Babic | 06297db | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 169 | debug("%s: device = %d\n", __func__, dev); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 170 | } |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 171 | |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 172 | if (dev == FPGA_INVALID_DEVICE) { |
| 173 | puts("FPGA device not specified\n"); |
Michal Simek | ccd6520 | 2018-05-30 10:04:34 +0200 | [diff] [blame^] | 174 | return CMD_RET_USAGE; |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 175 | } |
| 176 | |
| 177 | switch (op) { |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 178 | case FPGA_INFO: |
| 179 | break; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 180 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 181 | case FPGA_LOADFS: |
| 182 | /* Blocksize can be zero */ |
| 183 | if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part || |
| 184 | !fpga_fsinfo.filename) |
| 185 | wrong_parms = 1; |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 186 | break; |
| 187 | #endif |
| 188 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 189 | case FPGA_LOADS: |
| 190 | if (fpga_sec_info.authflag >= FPGA_NO_ENC_OR_NO_AUTH && |
| 191 | fpga_sec_info.encflag >= FPGA_NO_ENC_OR_NO_AUTH) { |
| 192 | puts("ERR: use <fpga load> for NonSecure bitstream\n"); |
| 193 | wrong_parms = 1; |
| 194 | } |
| 195 | |
| 196 | if (fpga_sec_info.encflag == FPGA_ENC_USR_KEY && |
| 197 | !fpga_sec_info.userkey_addr) { |
| 198 | wrong_parms = 1; |
| 199 | puts("ERR:User key not provided\n"); |
| 200 | } |
| 201 | break; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 202 | #endif |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 203 | case FPGA_LOAD: |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 204 | case FPGA_LOADP: |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 205 | case FPGA_LOADB: |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 206 | case FPGA_LOADBP: |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 207 | case FPGA_DUMP: |
| 208 | if (!fpga_data || !data_size) |
| 209 | wrong_parms = 1; |
| 210 | break; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 211 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 212 | case FPGA_LOADMK: |
| 213 | if (!fpga_data) |
| 214 | wrong_parms = 1; |
| 215 | break; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 216 | #endif |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | if (wrong_parms) { |
| 220 | puts("Wrong parameters for FPGA request\n"); |
Michal Simek | ccd6520 | 2018-05-30 10:04:34 +0200 | [diff] [blame^] | 221 | return CMD_RET_USAGE; |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 222 | } |
| 223 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 224 | switch (op) { |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 225 | case FPGA_INFO: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 226 | rc = fpga_info(dev); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 227 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 228 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 229 | case FPGA_LOAD: |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 230 | rc = fpga_load(dev, fpga_data, data_size, BIT_FULL); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 231 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 232 | |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 233 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 234 | case FPGA_LOADP: |
| 235 | rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL); |
| 236 | break; |
| 237 | #endif |
| 238 | |
wdenk | 30ce5ab | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 239 | case FPGA_LOADB: |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 240 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL); |
wdenk | 30ce5ab | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 241 | break; |
| 242 | |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 243 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 244 | case FPGA_LOADBP: |
| 245 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL); |
| 246 | break; |
| 247 | #endif |
| 248 | |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 249 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 250 | case FPGA_LOADFS: |
| 251 | rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo); |
| 252 | break; |
| 253 | #endif |
| 254 | |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 255 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 256 | case FPGA_LOADS: |
| 257 | rc = fpga_loads(dev, fpga_data, data_size, &fpga_sec_info); |
| 258 | break; |
| 259 | #endif |
| 260 | |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 261 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 262 | case FPGA_LOADMK: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 263 | switch (genimg_get_format(fpga_data)) { |
Heiko Schocher | 21d29f7 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 264 | #if defined(CONFIG_IMAGE_FORMAT_LEGACY) |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 265 | case IMAGE_FORMAT_LEGACY: |
| 266 | { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 267 | image_header_t *hdr = |
| 268 | (image_header_t *)fpga_data; |
| 269 | ulong data; |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 270 | uint8_t comp; |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 271 | |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 272 | comp = image_get_comp(hdr); |
| 273 | if (comp == IH_COMP_GZIP) { |
Michal Simek | 1b63aaa | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 274 | #if defined(CONFIG_GZIP) |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 275 | ulong image_buf = image_get_data(hdr); |
| 276 | data = image_get_load(hdr); |
| 277 | ulong image_size = ~0UL; |
| 278 | |
| 279 | if (gunzip((void *)data, ~0UL, |
| 280 | (void *)image_buf, |
| 281 | &image_size) != 0) { |
| 282 | puts("GUNZIP: error\n"); |
| 283 | return 1; |
| 284 | } |
| 285 | data_size = image_size; |
Michal Simek | 1b63aaa | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 286 | #else |
| 287 | puts("Gunzip image is not supported\n"); |
| 288 | return 1; |
| 289 | #endif |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 290 | } else { |
| 291 | data = (ulong)image_get_data(hdr); |
| 292 | data_size = image_get_data_size(hdr); |
| 293 | } |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 294 | rc = fpga_load(dev, (void *)data, data_size, |
| 295 | BIT_FULL); |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 296 | } |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 297 | break; |
Heiko Schocher | 21d29f7 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 298 | #endif |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 299 | #if defined(CONFIG_FIT) |
| 300 | case IMAGE_FORMAT_FIT: |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 301 | { |
| 302 | const void *fit_hdr = (const void *)fpga_data; |
| 303 | int noffset; |
Wolfgang Denk | e6a857d | 2011-07-30 13:33:49 +0000 | [diff] [blame] | 304 | const void *fit_data; |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 305 | |
| 306 | if (fit_uname == NULL) { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 307 | puts("No FIT subimage unit name\n"); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 308 | return 1; |
| 309 | } |
| 310 | |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 311 | if (!fit_check_format(fit_hdr)) { |
| 312 | puts("Bad FIT image format\n"); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 313 | return 1; |
| 314 | } |
| 315 | |
| 316 | /* get fpga component image node offset */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 317 | noffset = fit_image_get_node(fit_hdr, |
| 318 | fit_uname); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 319 | if (noffset < 0) { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 320 | printf("Can't find '%s' FIT subimage\n", |
| 321 | fit_uname); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 322 | return 1; |
| 323 | } |
| 324 | |
| 325 | /* verify integrity */ |
Simon Glass | b8da836 | 2013-05-07 06:11:57 +0000 | [diff] [blame] | 326 | if (!fit_image_verify(fit_hdr, noffset)) { |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 327 | puts ("Bad Data Hash\n"); |
| 328 | return 1; |
| 329 | } |
| 330 | |
| 331 | /* get fpga subimage data address and length */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 332 | if (fit_image_get_data(fit_hdr, noffset, |
| 333 | &fit_data, &data_size)) { |
| 334 | puts("Fpga subimage data not found\n"); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 335 | return 1; |
| 336 | } |
| 337 | |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 338 | rc = fpga_load(dev, fit_data, data_size, |
| 339 | BIT_FULL); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 340 | } |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 341 | break; |
| 342 | #endif |
| 343 | default: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 344 | puts("** Unknown image type\n"); |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 345 | rc = FPGA_FAIL; |
| 346 | break; |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 347 | } |
| 348 | break; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 349 | #endif |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 350 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 351 | case FPGA_DUMP: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 352 | rc = fpga_dump(dev, fpga_data, data_size); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 353 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 354 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 355 | default: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 356 | printf("Unknown operation\n"); |
Simon Glass | 4c12eeb | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 357 | return CMD_RET_USAGE; |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 358 | } |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 359 | return rc; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 360 | } |
| 361 | |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 362 | #if defined(CONFIG_CMD_FPGA_LOADFS) || defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 363 | U_BOOT_CMD(fpga, 9, 1, do_fpga, |
| 364 | #else |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 365 | U_BOOT_CMD(fpga, 6, 1, do_fpga, |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 366 | #endif |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 367 | "loadable FPGA image support", |
| 368 | "[operation type] [device number] [image address] [image size]\n" |
| 369 | "fpga operations:\n" |
Michal Simek | 2d73f0d | 2015-01-26 08:52:27 +0100 | [diff] [blame] | 370 | " dump\t[dev] [address] [size]\tLoad device to memory buffer\n" |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 371 | " info\t[dev]\t\t\tlist known device information\n" |
| 372 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 373 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 374 | " loadp\t[dev] [address] [size]\t" |
| 375 | "Load device from memory buffer with partial bitstream\n" |
| 376 | #endif |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 377 | " loadb\t[dev] [address] [size]\t" |
| 378 | "Load device from bitstream buffer (Xilinx only)\n" |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 379 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 380 | " loadbp\t[dev] [address] [size]\t" |
| 381 | "Load device from bitstream buffer with partial bitstream" |
| 382 | "(Xilinx only)\n" |
| 383 | #endif |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 384 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 385 | "Load device from filesystem (FAT by default) (Xilinx only)\n" |
| 386 | " loadfs [dev] [address] [image size] [blocksize] <interface>\n" |
| 387 | " [<dev[:part]>] <filename>\n" |
| 388 | #endif |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 389 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 390 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 391 | #if defined(CONFIG_FIT) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 392 | "\n" |
| 393 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 394 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 395 | #endif |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 396 | #endif |
Siva Durga Prasad Paladugu | cedd48e | 2018-05-31 15:10:22 +0530 | [diff] [blame] | 397 | #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) |
| 398 | "Load encrypted bitstream (Xilinx only)\n" |
| 399 | " loads [dev] [address] [size] [auth-OCM-0/DDR-1/noauth-2]\n" |
| 400 | " [enc-devkey(0)/userkey(1)/nenc(2) [Userkey address]\n" |
| 401 | "Loads the secure bistreams(authenticated/encrypted/both\n" |
| 402 | "authenticated and encrypted) of [size] from [address].\n" |
| 403 | "The auth-OCM/DDR flag specifies to perform authentication\n" |
| 404 | "in OCM or in DDR. 0 for OCM, 1 for DDR, 2 for no authentication.\n" |
| 405 | "The enc flag specifies which key to be used for decryption\n" |
| 406 | "0-device key, 1-user key, 2-no encryption.\n" |
| 407 | "The optional Userkey address specifies from which address key\n" |
| 408 | "has to be used for decryption if user key is selected.\n" |
| 409 | "NOTE: the sceure bitstream has to be created using xilinx\n" |
| 410 | "bootgen tool only.\n" |
| 411 | #endif |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 412 | ); |