wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 1 | |
wdenk | ea66bc8 | 2004-04-15 23:23:39 +0000 | [diff] [blame] | 2 | These are brief instructions on how to add support for CF adapters to |
| 3 | custom designed PXA boards. You need to set the parameters in the |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 4 | config file. This should work for most implementations especially if you |
| 5 | follow the connections of the standard lubbock. Anyway just the block |
wdenk | ea66bc8 | 2004-04-15 23:23:39 +0000 | [diff] [blame] | 6 | marked memory configuration should be touched since the other parameters |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 7 | are imposed by the PXA architecture. |
| 8 | |
| 9 | #define CONFIG_PXA_PCMCIA 1 |
| 10 | #define CONFIG_PXA_IDE 1 |
| 11 | |
wdenk | ea66bc8 | 2004-04-15 23:23:39 +0000 | [diff] [blame] | 12 | #define CONFIG_PCMCIA_SLOT_A 1 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 13 | /* just to keep build system happy */ |
| 14 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 15 | #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x28000000 |
| 16 | #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x10000000 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 17 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 18 | #define CONFIG_SYS_MECR_VAL 0x00000000 |
| 19 | #define CONFIG_SYS_MCMEM0_VAL 0x00004204 |
| 20 | #define CONFIG_SYS_MCMEM1_VAL 0x00000000 |
| 21 | #define CONFIG_SYS_MCATT0_VAL 0x00010504 |
| 22 | #define CONFIG_SYS_MCATT1_VAL 0x00000000 |
| 23 | #define CONFIG_SYS_MCIO0_VAL 0x00008407 |
| 24 | #define CONFIG_SYS_MCIO1_VAL 0x00000000 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 25 | /* memory configuration */ |
| 26 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 27 | #define CONFIG_SYS_IDE_MAXBUS 1 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 28 | /* max. 1 IDE bus */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 29 | #define CONFIG_SYS_IDE_MAXDEVICE 1 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 30 | /* max. 1 drive per IDE bus */ |
| 31 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 32 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 33 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 34 | #define CONFIG_SYS_ATA_BASE_ADDR 0x20000000 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 35 | |
| 36 | /* Offset for data I/O */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 37 | #define CONFIG_SYS_ATA_DATA_OFFSET 0x1f0 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 38 | |
| 39 | /* Offset for normal register accesses */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 40 | #define CONFIG_SYS_ATA_REG_OFFSET 0x1f0 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 41 | |
| 42 | /* Offset for alternate registers */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x3f0 |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 44 | |
wdenk | ea66bc8 | 2004-04-15 23:23:39 +0000 | [diff] [blame] | 45 | |
| 46 | Another important point is that maybe you have to power the pcmcia |
wdenk | db01a2e | 2004-04-15 23:14:49 +0000 | [diff] [blame] | 47 | subsystem. This is very board specific, for an example on how to |
| 48 | do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c |