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Heiko Schocherc0dcece2013-08-19 16:39:01 +02001/*
2 * siemens rut
3 * (C) Copyright 2013 Siemens Schweiz AG
4 * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 *
6 * Based on:
7 * U-Boot file:/include/configs/am335x_evm.h
8 *
9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
10 *
11 * SPDX-License-Identifier: GPL-2.0+
12 */
13
14#ifndef __CONFIG_RUT_H
15#define __CONFIG_RUT_H
16
17#define CONFIG_SIEMENS_RUT
18#define MACH_TYPE_RUT 4316
19#define CONFIG_SIEMENS_MACH_TYPE MACH_TYPE_RUT
20
21#include "siemens-am33x-common.h"
22
23#define CONFIG_SYS_MPUCLK 600
24#define RUT_IOCTRL_VAL 0x18b
25#define DDR_PLL_FREQ 303
26
27 /* Physical Memory Map */
28#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
29
30/* I2C Configuration */
31#define CONFIG_SYS_I2C_SPEED 100000
32
33#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
34#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
35#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
36#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
37
38#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200
39
40#undef CONFIG_SPL_NET_SUPPORT
41#undef CONFIG_SPL_NET_VCI_STRING
42#undef CONFIG_SPL_ETH_SUPPORT
43
44#define CONFIG_PHY_ADDR 1
45#define CONFIG_PHY_NATSEMI
46
47#define CONFIG_FACTORYSET
48
49/* UBI Support */
50#ifndef CONFIG_SPL_BUILD
51#define CONFIG_CMD_MTDPARTS
52#define CONFIG_MTD_PARTITIONS
53#define CONFIG_MTD_DEVICE
54#define CONFIG_RBTREE
55#define CONFIG_LZO
56#define CONFIG_CMD_UBI
57#define CONFIG_CMD_UBIFS
58#endif
59
60/* Watchdog */
61#define WATCHDOG_TRIGGER_GPIO 14
62
63#ifndef CONFIG_SPL_BUILD
64
65/* Default env settings */
66#define CONFIG_EXTRA_ENV_SETTINGS \
67 "hostname=rut\0" \
Samuel Egli56eb3da2013-11-04 14:05:03 +010068 "nand_img_size=0x500000\0" \
69 "splashpos=m,m\0" \
Heiko Schocherc0dcece2013-08-19 16:39:01 +020070 "optargs=fixrtc --no-log consoleblank=0 \0" \
71 CONFIG_COMMON_ENV_SETTINGS \
72 "mmc_dev=0\0" \
73 "mmc_root=/dev/mmcblk0p2 rw\0" \
74 "mmc_root_fs_type=ext4 rootwait\0" \
75 "mmc_load_uimage=" \
76 "mmc rescan; " \
77 "setenv bootfile uImage;" \
78 "fatload mmc ${mmc_dev} ${kloadaddr} ${bootfile}\0" \
79 "loadbootenv=fatload mmc ${mmc_dev} ${loadaddr} ${bootenv}\0" \
80 "importbootenv=echo Importing environment from mmc ...; " \
81 "env import -t $loadaddr $filesize\0" \
82 "mmc_args=run bootargs_defaults;" \
83 "mtdparts default;" \
84 "setenv bootargs ${bootargs} " \
85 "root=${mmc_root} ${mtdparts}" \
86 "rootfstype=${mmc_root_fs_type} ip=${ip_method} " \
87 "eth=${ethaddr} " \
88 "\0" \
89 "mmc_boot=run mmc_args; " \
90 "run mmc_load_uimage; " \
91 "bootm ${kloadaddr}\0" \
92 ""
93
94#ifndef CONFIG_RESTORE_FLASH
95/* set to negative value for no autoboot */
96#define CONFIG_BOOTDELAY 3
97
98#define CONFIG_BOOTCOMMAND \
99 "if mmc rescan; then " \
100 "echo SD/MMC found on device ${mmc_dev};" \
101 "if run loadbootenv; then " \
102 "echo Loaded environment from ${bootenv};" \
103 "run importbootenv;" \
104 "fi;" \
105 "if test -n $uenvcmd; then " \
106 "echo Running uenvcmd ...;" \
107 "run uenvcmd;" \
108 "fi;" \
109 "if run mmc_load_uimage; then " \
110 "run mmc_args;" \
111 "bootm ${kloadaddr};" \
112 "fi;" \
113 "fi;" \
114 "run nand_boot;" \
Samuel Egli56eb3da2013-11-04 14:05:03 +0100115 "reset;"
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200116
117#else
118#define CONFIG_BOOTDELAY 0
119
120#define CONFIG_BOOTCOMMAND \
121 "setenv autoload no; " \
122 "dhcp; " \
123 "if tftp 80000000 debrick.scr; then " \
124 "source 80000000; " \
125 "fi"
126#endif
127
128#endif /* CONFIG_SPL_BUILD */
129
130#ifdef CONFIG_SPL_BUILD
131#undef CONFIG_HW_WATCHDOG
132#endif
133
134#define CONFIG_VIDEO
135#if defined(CONFIG_VIDEO)
136#define CONFIG_VIDEO_DA8XX
137#define CONFIG_CFB_CONSOLE
138#define CONFIG_VGA_AS_SINGLE_DEVICE
139#define CONFIG_SPLASH_SCREEN
140#define CONFIG_SPLASH_SCREEN_ALIGN
141#define CONFIG_VIDEO_LOGO
142#define CONFIG_VIDEO_BMP_RLE8
143#define CONFIG_VIDEO_BMP_LOGO
144#define CONFIG_CMD_BMP
145#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE
146
147#define CONFIG_SPI
148#define CONFIG_OMAP3_SPI
149
150#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */
151#define CONFIG_ARCH_EARLY_INIT_R
152#define CONFIG_FORMIKE
Samuel Egli56eb3da2013-11-04 14:05:03 +0100153#define DISPL_PLL_SPREAD_SPECTRUM
154#define CONFIG_SYS_CONSOLE_BG_COL 0xff
155#define CONFIG_SYS_CONSOLE_FG_COL 0x00
Heiko Schocherc0dcece2013-08-19 16:39:01 +0200156#endif
157
158#endif /* ! __CONFIG_RUT_H */