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Andreas Bießmannad7a1782011-06-30 22:03:20 +00001/*
2 * Copyright (C) 2011
3 * Corscience GmbH & Co.KG, Andreas Bießmann <biessmann@corscience.de>
4 *
5 * Configuration settings for the grasshopper (ICnova AP7000) board
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andreas Bießmannad7a1782011-06-30 22:03:20 +00008 */
9#ifndef __GRASSHOPPER_CONFIG_H
10#define __GRASSHOPPER_CONFIG_H
11
12#include <asm/arch/hardware.h>
13
14#define CONFIG_AVR32
15#define CONFIG_AT32AP
16#define CONFIG_AT32AP7000
17
18/*
Andreas Bießmannad7a1782011-06-30 22:03:20 +000019 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
20 * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
21 * PLL frequency.
22 * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
23 */
24#define CONFIG_PLL
25#define CONFIG_SYS_POWER_MANAGER
26#define CONFIG_SYS_OSC0_HZ 20000000
27#define CONFIG_SYS_PLL0_DIV 1
28#define CONFIG_SYS_PLL0_MUL 7
29#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
30/*
31 * Set the CPU running at:
32 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
33 */
34#define CONFIG_SYS_CLKDIV_CPU 0
35/*
36 * Set the HSB running at:
37 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
38 */
39#define CONFIG_SYS_CLKDIV_HSB 1
40/*
41 * Set the PBA running at:
42 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
43 */
44#define CONFIG_SYS_CLKDIV_PBA 2
45/*
46 * Set the PBB running at:
47 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
48 */
49#define CONFIG_SYS_CLKDIV_PBB 1
50
51/* Reserve VM regions for SDRAM and NOR flash */
52#define CONFIG_SYS_NR_VM_REGIONS 2
53
54/*
55 * The PLLOPT register controls the PLL like this:
56 * icp = PLLOPT<2>
57 * ivco = PLLOPT<1:0>
58 *
59 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
60 */
61#define CONFIG_SYS_PLL0_OPT 0x04
62
63#define CONFIG_USART_BASE ATMEL_BASE_USART1
64#define CONFIG_USART_ID 1
65
66/* User serviceable stuff */
67#define CONFIG_CMDLINE_TAG
68#define CONFIG_SETUP_MEMORY_TAGS
69#define CONFIG_INITRD_TAG
70
71#define CONFIG_STACKSIZE (2048)
72
73#define CONFIG_BAUDRATE 115200
74
75/*
76 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage
77 * data on the serial line may interrupt the boot sequence.
78 */
79#define CONFIG_BOOTDELAY 1
80#define CONFIG_AUTOBOOT
81#define CONFIG_AUTOBOOT_KEYED
82#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d" \
83 " seconds\n", bootdelay
84#define CONFIG_AUTOBOOT_DELAY_STR "d"
85#define CONFIG_AUTOBOOT_STOP_STR " "
86
87/*
88 * After booting the board for the first time, new ethernet addresses
89 * should be generated and assigned to the environment variables
90 * "ethaddr". This is normally done during production.
91 */
92#define CONFIG_OVERWRITE_ETHADDR_ONCE
Andreas Bießmannad7a1782011-06-30 22:03:20 +000093
94/*
95 * BOOTP options
96 */
97#define CONFIG_BOOTP_SUBNETMASK
98#define CONFIG_BOOTP_GATEWAY
99
100/*
101 * Command line configuration.
102 */
103#include <config_cmd_default.h>
104
105/* remove unneeded commands */
106#undef CONFIG_CMD_FPGA
107#undef CONFIG_CMD_SETGETDCR
108
109/* add useful commands */
110#define CONFIG_CMD_ASKENV
111#define CONFIG_CMD_DHCP
112#define CONFIG_CMD_JFFS2
113#define CONFIG_CMD_PING
114#define CONFIG_CMD_REGINFO
115
116#define CONFIG_SYS_HUSH_PARSER
117#define CONFIG_AUTO_COMPLETE
Andreas Bießmannad7a1782011-06-30 22:03:20 +0000118#define CONFIG_CMDLINE_EDITING
119
120#define CONFIG_ATMEL_USART
121#define CONFIG_MACB
122#define CONFIG_PORTMUX_PIO
123#define CONFIG_SYS_NR_PIOS 5
124#define CONFIG_SYS_HSDRAMC
125
126#define CONFIG_SYS_DCACHE_LINESZ 32
127#define CONFIG_SYS_ICACHE_LINESZ 32
128
129#define CONFIG_NR_DRAM_BANKS 1
130
131#define CONFIG_SYS_FLASH_CFI
132#define CONFIG_FLASH_CFI_DRIVER
133
134#define CONFIG_SYS_FLASH_BASE 0x00000000
135#define CONFIG_SYS_FLASH_SIZE 0x800000
136#define CONFIG_SYS_MAX_FLASH_BANKS 1
137#define CONFIG_SYS_MAX_FLASH_SECT 135
138
139#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
140#define CONFIG_SYS_TEXT_BASE 0x00000000
141
142#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
143#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
144#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
145
146#define CONFIG_ENV_IS_IN_FLASH
147/* place u-boot env in flash sector after u-boot */
148#define CONFIG_ENV_SIZE 0x10000
149#define CONFIG_ENV_ADDR 0x20000
150
151#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + \
152 CONFIG_SYS_INTRAM_SIZE)
153
154#define CONFIG_SYS_MALLOC_LEN (256*1024)
155#define CONFIG_SYS_DMA_ALLOC_LEN (16384)
156
157/* Allow 4MB for the kernel run-time image */
158#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
159#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
160
161/* Other configuration settings that shouldn't have to change all that often */
162#define CONFIG_SYS_PROMPT "U-Boot> "
163#define CONFIG_SYS_CBSIZE 256
164#define CONFIG_SYS_MAXARGS 16
165#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
166 sizeof(CONFIG_SYS_PROMPT) + 16)
167#define CONFIG_SYS_LONGHELP
168
169#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
170#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
Andreas Bießmannad7a1782011-06-30 22:03:20 +0000171
172#endif /* __GRASSHOPPER_CONFIG_H */
173/* vim: set ts=8 noet: */