blob: a29652dd56ed775279bcf9d070b054849648c5a9 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher0f8bc282013-12-02 07:47:22 +01002/*
3 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
4 * (C) Copyright 2013 Siemens AG
5 *
6 * Based on:
7 * U-Boot file: include/configs/at91sam9260ek.h
8 *
9 * (C) Copyright 2007-2008
10 * Stelian Pop <stelian@popies.net>
11 * Lead Tech Design <www.leadtechdesign.com>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010012 */
13
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
17/*
18 * SoC must be defined first, before hardware.h is included.
19 * In this case SoC is defined in boards.cfg.
20 */
21#include <asm/hardware.h>
Heiko Schocher40540822015-08-21 18:53:46 +020022#include <linux/sizes.h>
Heiko Schocher0f8bc282013-12-02 07:47:22 +010023
Heiko Schocher0f8bc282013-12-02 07:47:22 +010024/*
Simon Glass98463902022-10-20 18:22:39 -060025 * Warning: changing CONFIG_TEXT_BASE requires
Heiko Schocher0f8bc282013-12-02 07:47:22 +010026 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
30
Heiko Schocher0f8bc282013-12-02 07:47:22 +010031/* ARM asynchronous clock */
32#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
33#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010034
35/* Misc CPU related */
Heiko Schocher0cac0fb2019-04-29 16:36:10 +020036
Heiko Schocher0f8bc282013-12-02 07:47:22 +010037#define CONFIG_USART_BASE ATMEL_BASE_DBGU
38#define CONFIG_USART_ID ATMEL_ID_SYS
Heiko Schocher0f8bc282013-12-02 07:47:22 +010039
Heiko Schocher0f8bc282013-12-02 07:47:22 +010040/*
Heiko Schocher0f8bc282013-12-02 07:47:22 +010041 * SDRAM: 1 bank, min 32, max 128 MB
42 * Initialized before u-boot gets started.
43 */
Heiko Schocher0f8bc282013-12-02 07:47:22 +010044#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
Heiko Schocher0ed366f2015-08-21 18:55:07 +020045#define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
Heiko Schocher0f8bc282013-12-02 07:47:22 +010046
47/*
48 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
49 * leaving the correct space for initial global data structure above
50 * that address while providing maximum stack area below.
51 */
Tom Rinieaf6ea62022-05-25 12:16:03 -040052#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
53#define CONFIG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1
Heiko Schocher0f8bc282013-12-02 07:47:22 +010054
55/* NAND flash */
56#ifdef CONFIG_CMD_NAND
Heiko Schocher0f8bc282013-12-02 07:47:22 +010057#define CONFIG_SYS_MAX_NAND_DEVICE 1
58#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
59#define CONFIG_SYS_NAND_DBW_8
60#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
61#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
62#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
63#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
64#endif
65
Heiko Schocher0f8bc282013-12-02 07:47:22 +010066#if defined(CONFIG_BOARD_TAURUS)
Heiko Schochere8b81ee2015-09-08 11:52:52 +020067/* USB DFU support */
Heiko Schochere8b81ee2015-09-08 11:52:52 +020068
Heiko Schochere8b81ee2015-09-08 11:52:52 +020069#define CONFIG_USB_GADGET_AT91
70
71/* DFU class support */
Heiko Schochere8b81ee2015-09-08 11:52:52 +020072#define DFU_MANIFEST_POLL_TIMEOUT 25000
Heiko Schocher0f8bc282013-12-02 07:47:22 +010073#endif
74
Heiko Schocher50921cd2014-10-31 08:30:56 +010075/* SPI EEPROM */
Heiko Schocher50921cd2014-10-31 08:30:56 +010076#define TAURUS_SPI_MASK (1 << 4)
Heiko Schocher50921cd2014-10-31 08:30:56 +010077
Heiko Schocher0f8bc282013-12-02 07:47:22 +010078/* bootstrap in spi flash , u-boot + env + linux in nandflash */
Heiko Schocher40540822015-08-21 18:53:46 +020079
Heiko Schocher0cac0fb2019-04-29 16:36:10 +020080#if defined(CONFIG_BOARD_AXM)
81#define CONFIG_EXTRA_ENV_SETTINGS \
82 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
83 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
84 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
85 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
86 "boot_retries=0\0" \
87 "ethact=macb0\0" \
88 "flash_nfs=run nand_kernel;run nfsargs;run addip;" \
89 "upgrade_available;bootm ${kernel_ram};reset\0" \
90 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
91 "bootm ${kernel_ram};reset\0" \
92 "flash_self_test=run nand_kernel;run setbootargs addtest;" \
93 "upgrade_available;bootm ${kernel_ram};reset\0" \
94 "hostname=systemone\0" \
95 "kernel_Off=0x00200000\0" \
96 "kernel_Off_fallback=0x03800000\0" \
97 "kernel_ram=0x21500000\0" \
98 "kernel_size=0x00400000\0" \
99 "kernel_size_fallback=0x00400000\0" \
100 "loads_echo=1\0" \
101 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
102 "${kernel_size}\0" \
103 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
104 "run nfsargs;run addip;upgrade_available;" \
105 "bootm ${kernel_ram};reset\0" \
106 "netdev=eth0\0" \
107 "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \
108 "rw nfsroot=${serverip}:${rootpath} " \
109 "at91sam9_wdt.wdt_timeout=16\0" \
110 "partitionset_active=A\0" \
111 "preboot=echo;echo Type 'run flash_self' to use kernel and root " \
112 "filesystem on memory;echo Type 'run flash_nfs' to use " \
113 "kernel from memory and root filesystem over NFS;echo Type " \
114 "'run net_nfs' to get Kernel over TFTP and mount root " \
115 "filesystem over NFS;echo\0" \
116 "project_dir=systemone\0" \
117 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \
118 "rootfs=/dev/mtdblock5\0" \
119 "rootfs_fallback=/dev/mtdblock7\0" \
120 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \
121 "root=${rootfs} rootfstype=jffs2 panic=7 " \
122 "at91sam9_wdt.wdt_timeout=16\0" \
123 "stderr=serial\0" \
124 "stdin=serial\0" \
125 "stdout=serial\0" \
126 "upgrade_available=0\0"
127#endif
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100128
Heiko Schocher237e3792014-10-31 08:31:05 +0100129/* Defines for SPL */
Heiko Schocher237e3792014-10-31 08:31:05 +0100130
Heiko Schocher237e3792014-10-31 08:31:05 +0100131#define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
Heiko Schochere8b81ee2015-09-08 11:52:52 +0200132#define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
Simon Glass98463902022-10-20 18:22:39 -0600133#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE
134#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE
Heiko Schocher237e3792014-10-31 08:31:05 +0100135
Heiko Schocher0ed366f2015-08-21 18:55:07 +0200136#define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
Heiko Schocher237e3792014-10-31 08:31:05 +0100137#define CONFIG_SYS_NAND_ECCSIZE 256
138#define CONFIG_SYS_NAND_ECCBYTES 3
Heiko Schocher237e3792014-10-31 08:31:05 +0100139#define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
140 48, 49, 50, 51, 52, 53, 54, 55, \
141 56, 57, 58, 59, 60, 61, 62, 63, }
142
Heiko Schocher237e3792014-10-31 08:31:05 +0100143#define CONFIG_SYS_MASTER_CLOCK 132096000
144#define AT91_PLL_LOCK_TIMEOUT 1000000
145#define CONFIG_SYS_AT91_PLLA 0x202A3F01
146#define CONFIG_SYS_MCKR 0x1300
147#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
148#define CONFIG_SYS_AT91_PLLB 0x10193F05
Heiko Schocher40540822015-08-21 18:53:46 +0200149
Heiko Schocher0f8bc282013-12-02 07:47:22 +0100150#endif