blob: b0d49cb46f0422e99a747e59f5c064548afd9cb6 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Laurence Withersf517afd2011-07-18 09:26:01 -04002/*
3 * GPIO driver for TI DaVinci DA8xx SOCs.
4 *
5 * (C) Copyright 2011 Guralp Systems Ltd.
6 * Laurence Withers <lwithers@guralp.com>
Laurence Withersf517afd2011-07-18 09:26:01 -04007 */
8
9#include <common.h>
Adam Ford8e51c0f2018-06-10 22:25:57 -050010#include <dm.h>
11#include <fdtdec.h>
Laurence Withersf517afd2011-07-18 09:26:01 -040012#include <asm/io.h>
13#include <asm/gpio.h>
Laurence Withersf517afd2011-07-18 09:26:01 -040014#include <asm/arch/hardware.h>
15#include <asm/arch/davinci_misc.h>
Adam Ford1eddf542018-08-16 23:13:34 -050016#include <dt-bindings/gpio/gpio.h>
Laurence Withersf517afd2011-07-18 09:26:01 -040017
Adam Ford8e51c0f2018-06-10 22:25:57 -050018#ifndef CONFIG_DM_GPIO
Laurence Withersf517afd2011-07-18 09:26:01 -040019static struct gpio_registry {
20 int is_registered;
21 char name[GPIO_NAME_SIZE];
22} gpio_registry[MAX_NUM_GPIOS];
23
Holger Hans Peter Freyther03414ac2013-02-07 23:41:01 +000024#if defined(CONFIG_SOC_DA8XX)
Laurence Withersf517afd2011-07-18 09:26:01 -040025#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
26
Tomas Novotnyb9f56692013-02-01 06:46:00 +000027#if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
28static const struct pinmux_config gpio_pinmux[] = {
29 { pinmux(13), 8, 6 }, /* GP0[0] */
30 { pinmux(13), 8, 7 },
31 { pinmux(14), 8, 0 },
32 { pinmux(14), 8, 1 },
33 { pinmux(14), 8, 2 },
34 { pinmux(14), 8, 3 },
35 { pinmux(14), 8, 4 },
36 { pinmux(14), 8, 5 },
37 { pinmux(14), 8, 6 },
38 { pinmux(14), 8, 7 },
39 { pinmux(15), 8, 0 },
40 { pinmux(15), 8, 1 },
41 { pinmux(15), 8, 2 },
42 { pinmux(15), 8, 3 },
43 { pinmux(15), 8, 4 },
44 { pinmux(15), 8, 5 },
45 { pinmux(15), 8, 6 }, /* GP1[0] */
46 { pinmux(15), 8, 7 },
47 { pinmux(16), 8, 0 },
48 { pinmux(16), 8, 1 },
49 { pinmux(16), 8, 2 },
50 { pinmux(16), 8, 3 },
51 { pinmux(16), 8, 4 },
52 { pinmux(16), 8, 5 },
53 { pinmux(16), 8, 6 },
54 { pinmux(16), 8, 7 },
55 { pinmux(17), 8, 0 },
56 { pinmux(17), 8, 1 },
57 { pinmux(17), 8, 2 },
58 { pinmux(17), 8, 3 },
59 { pinmux(17), 8, 4 },
60 { pinmux(17), 8, 5 },
61 { pinmux(17), 8, 6 }, /* GP2[0] */
62 { pinmux(17), 8, 7 },
63 { pinmux(18), 8, 0 },
64 { pinmux(18), 8, 1 },
65 { pinmux(18), 8, 2 },
66 { pinmux(18), 8, 3 },
67 { pinmux(18), 8, 4 },
68 { pinmux(18), 8, 5 },
69 { pinmux(18), 8, 6 },
70 { pinmux(18), 8, 7 },
71 { pinmux(19), 8, 0 },
72 { pinmux(9), 8, 2 },
73 { pinmux(9), 8, 3 },
74 { pinmux(9), 8, 4 },
75 { pinmux(9), 8, 5 },
76 { pinmux(9), 8, 6 },
77 { pinmux(10), 8, 1 }, /* GP3[0] */
78 { pinmux(10), 8, 2 },
79 { pinmux(10), 8, 3 },
80 { pinmux(10), 8, 4 },
81 { pinmux(10), 8, 5 },
82 { pinmux(10), 8, 6 },
83 { pinmux(10), 8, 7 },
84 { pinmux(11), 8, 0 },
85 { pinmux(11), 8, 1 },
86 { pinmux(11), 8, 2 },
87 { pinmux(11), 8, 3 },
88 { pinmux(11), 8, 4 },
89 { pinmux(9), 8, 7 },
90 { pinmux(2), 8, 6 },
91 { pinmux(11), 8, 5 },
92 { pinmux(11), 8, 6 },
93 { pinmux(12), 8, 4 }, /* GP4[0] */
94 { pinmux(12), 8, 5 },
95 { pinmux(12), 8, 6 },
96 { pinmux(12), 8, 7 },
97 { pinmux(13), 8, 0 },
98 { pinmux(13), 8, 1 },
99 { pinmux(13), 8, 2 },
100 { pinmux(13), 8, 3 },
101 { pinmux(13), 8, 4 },
102 { pinmux(13), 8, 5 },
103 { pinmux(11), 8, 7 },
104 { pinmux(12), 8, 0 },
105 { pinmux(12), 8, 1 },
106 { pinmux(12), 8, 2 },
107 { pinmux(12), 8, 3 },
108 { pinmux(9), 8, 1 },
109 { pinmux(7), 8, 3 }, /* GP5[0] */
110 { pinmux(7), 8, 4 },
111 { pinmux(7), 8, 5 },
112 { pinmux(7), 8, 6 },
113 { pinmux(7), 8, 7 },
114 { pinmux(8), 8, 0 },
115 { pinmux(8), 8, 1 },
116 { pinmux(8), 8, 2 },
117 { pinmux(8), 8, 3 },
118 { pinmux(8), 8, 4 },
119 { pinmux(8), 8, 5 },
120 { pinmux(8), 8, 6 },
121 { pinmux(8), 8, 7 },
122 { pinmux(9), 8, 0 },
123 { pinmux(7), 8, 1 },
124 { pinmux(7), 8, 2 },
125 { pinmux(5), 8, 1 }, /* GP6[0] */
126 { pinmux(5), 8, 2 },
127 { pinmux(5), 8, 3 },
128 { pinmux(5), 8, 4 },
129 { pinmux(5), 8, 5 },
130 { pinmux(5), 8, 6 },
131 { pinmux(5), 8, 7 },
132 { pinmux(6), 8, 0 },
133 { pinmux(6), 8, 1 },
134 { pinmux(6), 8, 2 },
135 { pinmux(6), 8, 3 },
136 { pinmux(6), 8, 4 },
137 { pinmux(6), 8, 5 },
138 { pinmux(6), 8, 6 },
139 { pinmux(6), 8, 7 },
140 { pinmux(7), 8, 0 },
141 { pinmux(1), 8, 0 }, /* GP7[0] */
142 { pinmux(1), 8, 1 },
143 { pinmux(1), 8, 2 },
144 { pinmux(1), 8, 3 },
145 { pinmux(1), 8, 4 },
146 { pinmux(1), 8, 5 },
147 { pinmux(1), 8, 6 },
148 { pinmux(1), 8, 7 },
149 { pinmux(2), 8, 0 },
150 { pinmux(2), 8, 1 },
151 { pinmux(2), 8, 2 },
152 { pinmux(2), 8, 3 },
153 { pinmux(2), 8, 4 },
154 { pinmux(2), 8, 5 },
155 { pinmux(0), 1, 0 },
156 { pinmux(0), 1, 1 },
157};
Tom Rini76b40ab2013-03-11 12:02:40 -0400158#else /* CONFIG_SOC_DA8XX && CONFIG_SOC_DA850 */
Laurence Withersf517afd2011-07-18 09:26:01 -0400159static const struct pinmux_config gpio_pinmux[] = {
160 { pinmux(1), 8, 7 }, /* GP0[0] */
161 { pinmux(1), 8, 6 },
162 { pinmux(1), 8, 5 },
163 { pinmux(1), 8, 4 },
164 { pinmux(1), 8, 3 },
165 { pinmux(1), 8, 2 },
166 { pinmux(1), 8, 1 },
167 { pinmux(1), 8, 0 },
168 { pinmux(0), 8, 7 },
169 { pinmux(0), 8, 6 },
170 { pinmux(0), 8, 5 },
171 { pinmux(0), 8, 4 },
172 { pinmux(0), 8, 3 },
173 { pinmux(0), 8, 2 },
174 { pinmux(0), 8, 1 },
175 { pinmux(0), 8, 0 },
176 { pinmux(4), 8, 7 }, /* GP1[0] */
177 { pinmux(4), 8, 6 },
178 { pinmux(4), 8, 5 },
179 { pinmux(4), 8, 4 },
180 { pinmux(4), 8, 3 },
181 { pinmux(4), 8, 2 },
182 { pinmux(4), 4, 1 },
183 { pinmux(4), 4, 0 },
184 { pinmux(3), 4, 0 },
185 { pinmux(2), 4, 6 },
186 { pinmux(2), 4, 5 },
187 { pinmux(2), 4, 4 },
188 { pinmux(2), 4, 3 },
189 { pinmux(2), 4, 2 },
190 { pinmux(2), 4, 1 },
191 { pinmux(2), 8, 0 },
192 { pinmux(6), 8, 7 }, /* GP2[0] */
193 { pinmux(6), 8, 6 },
194 { pinmux(6), 8, 5 },
195 { pinmux(6), 8, 4 },
196 { pinmux(6), 8, 3 },
197 { pinmux(6), 8, 2 },
198 { pinmux(6), 8, 1 },
199 { pinmux(6), 8, 0 },
200 { pinmux(5), 8, 7 },
201 { pinmux(5), 8, 6 },
202 { pinmux(5), 8, 5 },
203 { pinmux(5), 8, 4 },
204 { pinmux(5), 8, 3 },
205 { pinmux(5), 8, 2 },
206 { pinmux(5), 8, 1 },
207 { pinmux(5), 8, 0 },
208 { pinmux(8), 8, 7 }, /* GP3[0] */
209 { pinmux(8), 8, 6 },
210 { pinmux(8), 8, 5 },
211 { pinmux(8), 8, 4 },
212 { pinmux(8), 8, 3 },
213 { pinmux(8), 8, 2 },
214 { pinmux(8), 8, 1 },
215 { pinmux(8), 8, 0 },
216 { pinmux(7), 8, 7 },
217 { pinmux(7), 8, 6 },
218 { pinmux(7), 8, 5 },
219 { pinmux(7), 8, 4 },
220 { pinmux(7), 8, 3 },
221 { pinmux(7), 8, 2 },
222 { pinmux(7), 8, 1 },
223 { pinmux(7), 8, 0 },
224 { pinmux(10), 8, 7 }, /* GP4[0] */
225 { pinmux(10), 8, 6 },
226 { pinmux(10), 8, 5 },
227 { pinmux(10), 8, 4 },
228 { pinmux(10), 8, 3 },
229 { pinmux(10), 8, 2 },
230 { pinmux(10), 8, 1 },
231 { pinmux(10), 8, 0 },
232 { pinmux(9), 8, 7 },
233 { pinmux(9), 8, 6 },
234 { pinmux(9), 8, 5 },
235 { pinmux(9), 8, 4 },
236 { pinmux(9), 8, 3 },
237 { pinmux(9), 8, 2 },
238 { pinmux(9), 8, 1 },
239 { pinmux(9), 8, 0 },
240 { pinmux(12), 8, 7 }, /* GP5[0] */
241 { pinmux(12), 8, 6 },
242 { pinmux(12), 8, 5 },
243 { pinmux(12), 8, 4 },
244 { pinmux(12), 8, 3 },
245 { pinmux(12), 8, 2 },
246 { pinmux(12), 8, 1 },
247 { pinmux(12), 8, 0 },
248 { pinmux(11), 8, 7 },
249 { pinmux(11), 8, 6 },
250 { pinmux(11), 8, 5 },
251 { pinmux(11), 8, 4 },
252 { pinmux(11), 8, 3 },
253 { pinmux(11), 8, 2 },
254 { pinmux(11), 8, 1 },
255 { pinmux(11), 8, 0 },
256 { pinmux(19), 8, 6 }, /* GP6[0] */
257 { pinmux(19), 8, 5 },
258 { pinmux(19), 8, 4 },
259 { pinmux(19), 8, 3 },
260 { pinmux(19), 8, 2 },
261 { pinmux(16), 8, 1 },
262 { pinmux(14), 8, 1 },
263 { pinmux(14), 8, 0 },
264 { pinmux(13), 8, 7 },
265 { pinmux(13), 8, 6 },
266 { pinmux(13), 8, 5 },
267 { pinmux(13), 8, 4 },
268 { pinmux(13), 8, 3 },
269 { pinmux(13), 8, 2 },
270 { pinmux(13), 8, 1 },
271 { pinmux(13), 8, 0 },
272 { pinmux(18), 8, 1 }, /* GP7[0] */
273 { pinmux(18), 8, 0 },
274 { pinmux(17), 8, 7 },
275 { pinmux(17), 8, 6 },
276 { pinmux(17), 8, 5 },
277 { pinmux(17), 8, 4 },
278 { pinmux(17), 8, 3 },
279 { pinmux(17), 8, 2 },
280 { pinmux(17), 8, 1 },
281 { pinmux(17), 8, 0 },
282 { pinmux(16), 8, 7 },
283 { pinmux(16), 8, 6 },
284 { pinmux(16), 8, 5 },
285 { pinmux(16), 8, 4 },
286 { pinmux(16), 8, 3 },
287 { pinmux(16), 8, 2 },
288 { pinmux(19), 8, 0 }, /* GP8[0] */
289 { pinmux(3), 4, 7 },
290 { pinmux(3), 4, 6 },
291 { pinmux(3), 4, 5 },
292 { pinmux(3), 4, 4 },
293 { pinmux(3), 4, 3 },
294 { pinmux(3), 4, 2 },
295 { pinmux(2), 4, 7 },
296 { pinmux(19), 8, 1 },
297 { pinmux(19), 8, 0 },
298 { pinmux(18), 8, 7 },
299 { pinmux(18), 8, 6 },
300 { pinmux(18), 8, 5 },
301 { pinmux(18), 8, 4 },
302 { pinmux(18), 8, 3 },
303 { pinmux(18), 8, 2 },
304};
Tom Rini76b40ab2013-03-11 12:02:40 -0400305#endif /* CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850 */
306#else /* !CONFIG_SOC_DA8XX */
Holger Hans Peter Freyther03414ac2013-02-07 23:41:01 +0000307#define davinci_configure_pin_mux(a, b)
Tom Rini76b40ab2013-03-11 12:02:40 -0400308#endif /* CONFIG_SOC_DA8XX */
Laurence Withersf517afd2011-07-18 09:26:01 -0400309
Adam Ford8e51c0f2018-06-10 22:25:57 -0500310int gpio_request(unsigned int gpio, const char *label)
Laurence Withersf517afd2011-07-18 09:26:01 -0400311{
Joe Hershberger365d6072011-11-11 15:55:36 -0600312 if (gpio >= MAX_NUM_GPIOS)
Laurence Withersf517afd2011-07-18 09:26:01 -0400313 return -1;
314
Joe Hershberger365d6072011-11-11 15:55:36 -0600315 if (gpio_registry[gpio].is_registered)
Laurence Withersf517afd2011-07-18 09:26:01 -0400316 return -1;
317
Joe Hershberger365d6072011-11-11 15:55:36 -0600318 gpio_registry[gpio].is_registered = 1;
319 strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE);
320 gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
Laurence Withersf517afd2011-07-18 09:26:01 -0400321
Joe Hershberger365d6072011-11-11 15:55:36 -0600322 davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
Laurence Withersf517afd2011-07-18 09:26:01 -0400323
324 return 0;
325}
326
Adam Ford8e51c0f2018-06-10 22:25:57 -0500327int gpio_free(unsigned int gpio)
Laurence Withersf517afd2011-07-18 09:26:01 -0400328{
Joe Hershberger365d6072011-11-11 15:55:36 -0600329 if (gpio >= MAX_NUM_GPIOS)
330 return -1;
331
332 if (!gpio_registry[gpio].is_registered)
333 return -1;
334
335 gpio_registry[gpio].is_registered = 0;
336 gpio_registry[gpio].name[0] = '\0';
337 /* Do not configure as input or change pin mux here */
338 return 0;
Laurence Withersf517afd2011-07-18 09:26:01 -0400339}
Adam Ford8e51c0f2018-06-10 22:25:57 -0500340#endif
Laurence Withersf517afd2011-07-18 09:26:01 -0400341
Adam Ford8e51c0f2018-06-10 22:25:57 -0500342static int _gpio_direction_output(struct davinci_gpio *bank, unsigned int gpio, int value)
Laurence Withersf517afd2011-07-18 09:26:01 -0400343{
Joe Hershberger365d6072011-11-11 15:55:36 -0600344 clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
345 gpio_set_value(gpio, value);
Laurence Withersf517afd2011-07-18 09:26:01 -0400346 return 0;
347}
348
Adam Ford8e51c0f2018-06-10 22:25:57 -0500349static int _gpio_direction_input(struct davinci_gpio *bank, unsigned int gpio)
Laurence Withersf517afd2011-07-18 09:26:01 -0400350{
Adam Ford8e51c0f2018-06-10 22:25:57 -0500351 setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
352 return 0;
353}
Laurence Withersf517afd2011-07-18 09:26:01 -0400354
Adam Ford8e51c0f2018-06-10 22:25:57 -0500355static int _gpio_get_value(struct davinci_gpio *bank, unsigned int gpio)
356{
357 unsigned int ip;
Joe Hershberger365d6072011-11-11 15:55:36 -0600358 ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));
Laurence Withersf517afd2011-07-18 09:26:01 -0400359 return ip ? 1 : 0;
360}
361
Adam Ford8e51c0f2018-06-10 22:25:57 -0500362static int _gpio_set_value(struct davinci_gpio *bank, unsigned int gpio, int value)
Laurence Withersf517afd2011-07-18 09:26:01 -0400363{
Laurence Withersf517afd2011-07-18 09:26:01 -0400364 if (value)
Joe Hershberger365d6072011-11-11 15:55:36 -0600365 bank->set_data = 1U << GPIO_BIT(gpio);
Laurence Withersf517afd2011-07-18 09:26:01 -0400366 else
Joe Hershberger365d6072011-11-11 15:55:36 -0600367 bank->clr_data = 1U << GPIO_BIT(gpio);
368
369 return 0;
Laurence Withersf517afd2011-07-18 09:26:01 -0400370}
371
Adam Ford8e51c0f2018-06-10 22:25:57 -0500372static int _gpio_get_dir(struct davinci_gpio *bank, unsigned int gpio)
373{
374 return in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
375}
376
377#ifndef CONFIG_DM_GPIO
378
Laurence Withersf517afd2011-07-18 09:26:01 -0400379void gpio_info(void)
380{
Adam Ford8e51c0f2018-06-10 22:25:57 -0500381 unsigned int gpio, dir, val;
Laurence Withersf517afd2011-07-18 09:26:01 -0400382 struct davinci_gpio *bank;
383
Joe Hershberger365d6072011-11-11 15:55:36 -0600384 for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {
385 bank = GPIO_BANK(gpio);
Adam Ford8e51c0f2018-06-10 22:25:57 -0500386 dir = _gpio_get_dir(bank, gpio);
Joe Hershberger365d6072011-11-11 15:55:36 -0600387 val = gpio_get_value(gpio);
Laurence Withersf517afd2011-07-18 09:26:01 -0400388
389 printf("% 4d: %s: %d [%c] %s\n",
Joe Hershberger365d6072011-11-11 15:55:36 -0600390 gpio, dir ? " in" : "out", val,
391 gpio_registry[gpio].is_registered ? 'x' : ' ',
392 gpio_registry[gpio].name);
Laurence Withersf517afd2011-07-18 09:26:01 -0400393 }
394}
Adam Ford8e51c0f2018-06-10 22:25:57 -0500395
396int gpio_direction_input(unsigned int gpio)
397{
398 struct davinci_gpio *bank;
399
400 bank = GPIO_BANK(gpio);
401 return _gpio_direction_input(bank, gpio);
402}
403
404int gpio_direction_output(unsigned int gpio, int value)
405{
406 struct davinci_gpio *bank;
407
408 bank = GPIO_BANK(gpio);
409 return _gpio_direction_output(bank, gpio, value);
410}
411
412int gpio_get_value(unsigned int gpio)
413{
414 struct davinci_gpio *bank;
415
416 bank = GPIO_BANK(gpio);
417 return _gpio_get_value(bank, gpio);
418}
419
420int gpio_set_value(unsigned int gpio, int value)
421{
422 struct davinci_gpio *bank;
423
424 bank = GPIO_BANK(gpio);
425 return _gpio_set_value(bank, gpio, value);
426}
427
428#else /* CONFIG_DM_GPIO */
429
430static struct davinci_gpio *davinci_get_gpio_bank(struct udevice *dev, unsigned int offset)
431{
432 struct davinci_gpio_bank *bank = dev_get_priv(dev);
Adam Ford1eddf542018-08-16 23:13:34 -0500433 unsigned int addr;
Adam Ford8e51c0f2018-06-10 22:25:57 -0500434
Adam Ford1eddf542018-08-16 23:13:34 -0500435 /*
436 * The device tree is not broken into banks but the infrastructure is
Adam Ford8e51c0f2018-06-10 22:25:57 -0500437 * expecting it this way, so we'll first include the 0x10 offset, then
438 * calculate the bank manually based on the offset.
Adam Ford1eddf542018-08-16 23:13:34 -0500439 * Casting 'addr' as Unsigned long is needed to make the math work.
Adam Ford8e51c0f2018-06-10 22:25:57 -0500440 */
Adam Ford1eddf542018-08-16 23:13:34 -0500441 addr = ((unsigned long)(struct davinci_gpio *)bank->base) +
442 0x10 + (0x28 * (offset >> 5));
443 return (struct davinci_gpio *)addr;
Adam Ford8e51c0f2018-06-10 22:25:57 -0500444}
445
446static int davinci_gpio_direction_input(struct udevice *dev, unsigned int offset)
447{
448 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
449
Adam Ford1eddf542018-08-16 23:13:34 -0500450 /*
451 * Fetch the address based on GPIO, but only pass the masked low 32-bits
452 */
453 _gpio_direction_input(base, (offset & 0x1f));
Adam Ford8e51c0f2018-06-10 22:25:57 -0500454 return 0;
455}
456
457static int davinci_gpio_direction_output(struct udevice *dev, unsigned int offset,
458 int value)
459{
460 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
461
Adam Ford1eddf542018-08-16 23:13:34 -0500462 _gpio_direction_output(base, (offset & 0x1f), value);
Adam Ford8e51c0f2018-06-10 22:25:57 -0500463 return 0;
464}
465
466static int davinci_gpio_get_value(struct udevice *dev, unsigned int offset)
467{
468 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
469
Adam Ford1eddf542018-08-16 23:13:34 -0500470 return _gpio_get_value(base, (offset & 0x1f));
Adam Ford8e51c0f2018-06-10 22:25:57 -0500471}
472
473static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset,
474 int value)
475{
476 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
477
Adam Ford1eddf542018-08-16 23:13:34 -0500478 _gpio_set_value(base, (offset & 0x1f), value);
Adam Ford8e51c0f2018-06-10 22:25:57 -0500479
480 return 0;
481}
482
483static int davinci_gpio_get_function(struct udevice *dev, unsigned int offset)
484{
485 unsigned int dir;
486 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
487
488 dir = _gpio_get_dir(base, offset);
489
490 if (dir)
491 return GPIOF_INPUT;
492
493 return GPIOF_OUTPUT;
494}
495
Adam Ford9440b3d2018-08-16 23:21:57 -0500496static int davinci_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
497 struct ofnode_phandle_args *args)
498{
499 desc->offset = args->args[0];
500
501 if (args->args[1] & GPIO_ACTIVE_LOW)
502 desc->flags = GPIOD_ACTIVE_LOW;
503 else
504 desc->flags = 0;
505 return 0;
506}
507
Adam Ford8e51c0f2018-06-10 22:25:57 -0500508static const struct dm_gpio_ops gpio_davinci_ops = {
509 .direction_input = davinci_gpio_direction_input,
510 .direction_output = davinci_gpio_direction_output,
511 .get_value = davinci_gpio_get_value,
512 .set_value = davinci_gpio_set_value,
513 .get_function = davinci_gpio_get_function,
Adam Ford9440b3d2018-08-16 23:21:57 -0500514 .xlate = davinci_gpio_xlate,
Adam Ford8e51c0f2018-06-10 22:25:57 -0500515};
516
517static int davinci_gpio_probe(struct udevice *dev)
518{
519 struct davinci_gpio_bank *bank = dev_get_priv(dev);
520 struct davinci_gpio_platdata *plat = dev_get_platdata(dev);
521 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
522 const void *fdt = gd->fdt_blob;
523 int node = dev_of_offset(dev);
524
525 uc_priv->bank_name = plat->port_name;
526 uc_priv->gpio_count = fdtdec_get_int(fdt, node, "ti,ngpio", -1);
527 bank->base = (struct davinci_gpio *)plat->base;
528 return 0;
529}
530
531static const struct udevice_id davinci_gpio_ids[] = {
532 { .compatible = "ti,dm6441-gpio" },
533 { }
534};
535
536static int davinci_gpio_ofdata_to_platdata(struct udevice *dev)
537{
538 struct davinci_gpio_platdata *plat = dev_get_platdata(dev);
539 fdt_addr_t addr;
540
541 addr = devfdt_get_addr(dev);
542 if (addr == FDT_ADDR_T_NONE)
543 return -EINVAL;
544
545 plat->base = addr;
546 return 0;
547}
548
549U_BOOT_DRIVER(gpio_davinci) = {
550 .name = "gpio_davinci",
551 .id = UCLASS_GPIO,
552 .ops = &gpio_davinci_ops,
553 .ofdata_to_platdata = of_match_ptr(davinci_gpio_ofdata_to_platdata),
554 .of_match = davinci_gpio_ids,
555 .bind = dm_scan_fdt_dev,
556 .platdata_auto_alloc_size = sizeof(struct davinci_gpio_platdata),
557 .probe = davinci_gpio_probe,
558 .priv_auto_alloc_size = sizeof(struct davinci_gpio_bank),
559};
560
561#endif