blob: 88c99821b1e4d3cf662e402d655bea8df1d5e8b2 [file] [log] [blame]
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -04001/*
2 * U-boot - Configuration file for CM-BF537U board
3 */
4
5#ifndef __CONFIG_CM_BF537U_H__
6#define __CONFIG_CM_BF537U_H__
7
8#include <asm/config-pre.h>
9
10
11/*
12 * Processor Settings
13 */
Mike Frysingerfbcf8e82010-12-23 14:58:37 -050014#define CONFIG_BFIN_CPU bf537-0.2
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -040015#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 30000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 18
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 5
40/* Core voltage */
41#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
42
43
44/*
45 * Memory Settings
46 */
47#define CONFIG_MEM_ADD_WDTH 9
48#define CONFIG_MEM_SIZE 32
49
50#define CONFIG_EBIU_SDRRC_VAL 0x3f8
51#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
52
53#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
54#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
55#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
56
Sonic Zhang6e6b2212013-12-09 12:45:29 +080057#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -040058#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
59
60
61/*
62 * Network Settings
63 */
64#ifndef __ADSPBF534__
65#define ADI_CMDS_NETWORK 1
Harald Krapfenbauerfff18be2011-05-17 15:25:54 -040066#define CONFIG_SMC911X 1
67#define CONFIG_SMC911X_BASE 0x20308000
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -040068#define CONFIG_SMC911X_16_BIT
Harald Krapfenbauerfff18be2011-05-17 15:25:54 -040069#define CONFIG_NETCONSOLE 1
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -040070#endif
71#define CONFIG_HOSTNAME cm-bf537u
72/* Uncomment next line to use fixed MAC address */
73/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
Masahiro Yamadac42f56d2014-04-18 19:09:49 +090074#define CONFIG_LIB_RAND
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -040075
76/*
77 * Flash Settings
78 */
79#define CONFIG_FLASH_CFI_DRIVER
80#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
81#define CONFIG_SYS_FLASH_BASE 0x20000000
82#define CONFIG_SYS_FLASH_CFI
83#define CONFIG_SYS_FLASH_PROTECTION
84#define CONFIG_SYS_MAX_FLASH_BANKS 1
85#define CONFIG_SYS_MAX_FLASH_SECT 35
86
87
88/*
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -040089 * SPI Settings
90 */
91#define CONFIG_BFIN_SPI
92#define CONFIG_ENV_SPI_MAX_HZ 30000000
93
94
95/*
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -040096 * Env Storage Settings
97 */
98#define CONFIG_ENV_IS_IN_FLASH 1
Harald Krapfenbauerba5c1222011-05-17 15:45:36 -040099#define CONFIG_ENV_OFFSET 0x8000
100#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
101#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
102#define CONFIG_ENV_SECT_SIZE 0x8000
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400103#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
104#define ENV_IS_EMBEDDED
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400105#endif
106#ifdef ENV_IS_EMBEDDED
107/* WARNING - the following is hand-optimized to fit within
108 * the sector before the environment sector. If it throws
109 * an error during compilation remove an object here to get
110 * it linked after the configuration sector.
111 */
112# define LDS_BOARD_TEXT \
Masahiro Yamadae2906a52013-11-11 14:36:00 +0900113 arch/blackfin/lib/built-in.o (.text*); \
114 arch/blackfin/cpu/built-in.o (.text*); \
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400115 . = DEFINED(env_offset) ? env_offset : .; \
Mike Frysingerc70e7dd2010-11-19 19:28:56 -0500116 common/env_embedded.o (.text*);
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400117#endif
118
119
120/*
121 * I2C Settings
122 */
123#define CONFIG_BFIN_TWI_I2C 1
124#define CONFIG_HARD_I2C 1
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400125
126
127/*
Harald Krapfenbauerc94101a2011-05-17 15:39:54 -0400128 * SPI_MMC Settings
129 */
130#define CONFIG_MMC
131#define CONFIG_GENERIC_MMC
132#define CONFIG_MMC_SPI
133
134/*
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400135 * Misc Settings
136 */
137#define CONFIG_BAUDRATE 115200
138#define CONFIG_MISC_INIT_R
139#define CONFIG_RTC_BFIN
140#define CONFIG_UART_CONSOLE 0
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -0400141#define CONFIG_BOOTCOMMAND "run flashboot"
142#define FLASHBOOT_ENV_SETTINGS \
Harald Krapfenbauerba5c1222011-05-17 15:45:36 -0400143 "flashboot=flread 20040000 1000000 300000;" \
Harald Krapfenbauerfd04a052009-10-14 08:37:32 -0400144 "bootm 0x1000000\0"
Sonic Zhang6e6b2212013-12-09 12:45:29 +0800145#define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
Masahiro Yamadae91df492014-03-05 16:59:37 +0900146#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400147
148/*
149 * Pull in common ADI header for remaining command/environment setup
150 */
151#include <configs/bfin_adi_common.h>
152
Harald Krapfenbauer4640c2b2009-08-20 19:20:41 -0400153#endif