Gitiles
Code Review Sign In
gerrit.cesnet.cz / github / trini / u-boot / c7372d61fd38c32c410bcab86dd39494ebe1fb06 / . / arch / arm / mach-uniphier / clk / clk-pro4.c
blob: 8a978d20ffa65da7d635ac22357b516ff911e1c5 [file] [log] [blame]
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]1/*
Masahiro Yamada70dda1b2016-10-17 22:18:03 +0900[diff] [blame]2 * Copyright (C) 2011-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
Masahiro Yamadaf6e7f072015-05-29 17:30:00 +0900[diff] [blame]9#include <linux/io.h>
Masahiro Yamada107b3fb2016-01-09 01:51:13 +0900[diff] [blame]10
11#include "../init.h"
12#include "../sc-regs.h"
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]13
Masahiro Yamada5b660062016-03-30 20:17:02 +0900[diff] [blame]14void uniphier_pro4_clk_init(void)
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]15{
16 u32 tmp;
17
18 /* deassert reset */
19 tmp = readl(SC_RSTCTRL);
Masahiro Yamadac7372d62017-10-14 02:21:17 +0900[diff] [blame^]20#ifdef CONFIG_USB_DWC3_UNIPHIER
Masahiro Yamada15351632015-02-27 02:26:58 +0900[diff] [blame]21 tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
22 SC_RSTCTRL_NRST_GIO;
23#endif
Masahiro Yamada198a97a2015-02-27 02:26:51 +0900[diff] [blame]24#ifdef CONFIG_UNIPHIER_ETH
25 tmp |= SC_RSTCTRL_NRST_ETHER;
26#endif
27#ifdef CONFIG_NAND_DENALI
28 tmp |= SC_RSTCTRL_NRST_NAND;
29#endif
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]30 writel(tmp, SC_RSTCTRL);
31 readl(SC_RSTCTRL); /* dummy read */
32
Masahiro Yamadac7372d62017-10-14 02:21:17 +0900[diff] [blame^]33#ifdef CONFIG_USB_DWC3_UNIPHIER
Masahiro Yamada15351632015-02-27 02:26:58 +0900[diff] [blame]34 tmp = readl(SC_RSTCTRL2);
35 tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
36 writel(tmp, SC_RSTCTRL2);
37 readl(SC_RSTCTRL2); /* dummy read */
38#endif
39
Masahiro Yamada67976302016-03-30 20:17:42 +0900[diff] [blame]40 /* provide clocks */
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]41 tmp = readl(SC_CLKCTRL);
Masahiro Yamadac7372d62017-10-14 02:21:17 +0900[diff] [blame^]42#ifdef CONFIG_USB_DWC3_UNIPHIER
Masahiro Yamada15351632015-02-27 02:26:58 +0900[diff] [blame]43 tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
44 SC_CLKCTRL_CEN_GIO;
45#endif
Masahiro Yamada198a97a2015-02-27 02:26:51 +0900[diff] [blame]46#ifdef CONFIG_UNIPHIER_ETH
47 tmp |= SC_CLKCTRL_CEN_ETHER;
48#endif
Tom Rini8850c5d2017-05-12 22:33:27 -0400[diff] [blame]49#ifdef CONFIG_USB_EHCI_HCD
Masahiro Yamada42ca6982015-02-27 02:26:53 +0900[diff] [blame]50 tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
Masahiro Yamada198a97a2015-02-27 02:26:51 +0900[diff] [blame]51#endif
52#ifdef CONFIG_NAND_DENALI
53 tmp |= SC_CLKCTRL_CEN_NAND;
54#endif
Masahiro Yamada5894ca02014-10-03 19:21:06 +0900[diff] [blame]55 writel(tmp, SC_CLKCTRL);
56 readl(SC_CLKCTRL); /* dummy read */
57}