Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Maintainer : Prafulla Wadaskar <prafulla@marvell.com> |
| 3 | * |
| 4 | * (C) Copyright 2009 |
| 5 | * Marvell Semiconductor <www.marvell.com> |
| 6 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 7 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <netdev.h> |
Lei Wen | a7efd71 | 2011-10-18 20:11:42 +0530 | [diff] [blame] | 13 | #include <asm/arch/cpu.h> |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 14 | #include <asm/arch/kirkwood.h> |
| 15 | #include <asm/arch/mpp.h> |
| 16 | #include "mv88f6281gtw_ge.h" |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
Prafulla Wadaskar | 754ae3f | 2010-10-20 20:12:27 +0530 | [diff] [blame] | 20 | int board_early_init_f(void) |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 21 | { |
| 22 | /* |
| 23 | * default gpio configuration |
| 24 | * There are maximum 64 gpios controlled through 2 sets of registers |
| 25 | * the below configuration configures mainly initial LED status |
| 26 | */ |
| 27 | kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW, |
| 28 | MV88F6281GTW_GE_OE_VAL_HIGH, |
| 29 | MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH); |
| 30 | |
| 31 | /* Multi-Purpose Pins Functionality configuration */ |
Albert ARIBAUD | 9d86f0c | 2012-11-26 11:27:36 +0000 | [diff] [blame] | 32 | static const u32 kwmpp_config[] = { |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 33 | MPP0_SPI_SCn, |
| 34 | MPP1_SPI_MOSI, |
| 35 | MPP2_SPI_SCK, |
| 36 | MPP3_SPI_MISO, |
| 37 | MPP4_GPIO, |
| 38 | MPP5_GPO, |
| 39 | MPP6_SYSRST_OUTn, |
| 40 | MPP7_SPI_SCn, |
| 41 | MPP8_TW_SDA, |
| 42 | MPP9_TW_SCK, |
| 43 | MPP10_UART0_TXD, |
| 44 | MPP11_UART0_RXD, |
| 45 | MPP12_GPO, |
| 46 | MPP13_GPIO, |
| 47 | MPP14_GPIO, |
| 48 | MPP15_GPIO, |
| 49 | MPP16_GPIO, |
| 50 | MPP17_GPIO, |
| 51 | MPP18_GPO, |
| 52 | MPP19_GPO, |
| 53 | MPP20_GPIO, |
| 54 | MPP21_GPIO, |
| 55 | MPP22_GPIO, |
| 56 | MPP23_GPIO, |
| 57 | MPP24_GPIO, |
| 58 | MPP25_GPIO, |
| 59 | MPP26_GPIO, |
| 60 | MPP27_GPIO, |
| 61 | MPP28_GPIO, |
| 62 | MPP29_GPIO, |
| 63 | MPP30_GPIO, |
| 64 | MPP31_GPIO, |
| 65 | MPP32_GPIO, |
| 66 | MPP33_GPIO, |
| 67 | MPP34_GPIO, |
| 68 | MPP35_GPIO, |
| 69 | MPP36_GPIO, |
| 70 | MPP37_GPIO, |
| 71 | MPP38_GPIO, |
| 72 | MPP39_GPIO, |
| 73 | MPP40_GPIO, |
| 74 | MPP41_GPIO, |
| 75 | MPP42_GPIO, |
| 76 | MPP43_GPIO, |
| 77 | MPP44_GPIO, |
| 78 | MPP45_GPIO, |
| 79 | MPP46_GPIO, |
| 80 | MPP47_GPIO, |
| 81 | MPP48_GPIO, |
| 82 | MPP49_GPIO, |
| 83 | 0 |
| 84 | }; |
Valentin Longchamp | 8468363 | 2012-06-01 01:31:00 +0000 | [diff] [blame] | 85 | kirkwood_mpp_conf(kwmpp_config, NULL); |
Prafulla Wadaskar | 754ae3f | 2010-10-20 20:12:27 +0530 | [diff] [blame] | 86 | return 0; |
| 87 | } |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 88 | |
Prafulla Wadaskar | 754ae3f | 2010-10-20 20:12:27 +0530 | [diff] [blame] | 89 | int board_init(void) |
| 90 | { |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 91 | /* |
| 92 | * arch number of board |
| 93 | */ |
| 94 | gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE; |
| 95 | |
| 96 | /* adress of boot parameters */ |
| 97 | gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
Prafulla Wadaskar | 4abc5bf | 2009-07-16 20:58:01 +0530 | [diff] [blame] | 102 | #ifdef CONFIG_MV88E61XX_SWITCH |
| 103 | void reset_phy(void) |
| 104 | { |
| 105 | /* configure and initialize switch */ |
| 106 | struct mv88e61xx_config swcfg = { |
| 107 | .name = "egiga0", |
| 108 | .vlancfg = MV88E61XX_VLANCFG_ROUTER, |
| 109 | .rgmii_delay = MV88E61XX_RGMII_DELAY_EN, |
| 110 | .led_init = MV88E61XX_LED_INIT_EN, |
| 111 | .mdip = MV88E61XX_MDIP_REVERSE, |
| 112 | .portstate = MV88E61XX_PORTSTT_FORWARDING, |
| 113 | .cpuport = (1 << 5), |
| 114 | .ports_enabled = 0x3f |
| 115 | }; |
| 116 | |
| 117 | mv88e61xx_switch_initialize(&swcfg); |
| 118 | } |
| 119 | #endif /* CONFIG_MV88E61XX_SWITCH */ |