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Eric Benard3cbeb0f2014-04-04 19:05:55 +02001/*
2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
4 *
5 * Configuration settings for the Embest RIoTboard
6 *
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __RIOTBOARD_CONFIG_H
14#define __RIOTBOARD_CONFIG_H
15
Eric Benard3cbeb0f2014-04-04 19:05:55 +020016#define CONFIG_MXC_UART_BASE UART2_BASE
Fabio Estevamfa4a7a42014-06-09 13:35:35 -030017#define CONFIG_CONSOLE_DEV "ttymxc1"
Eric Benard3cbeb0f2014-04-04 19:05:55 +020018#define CONFIG_MMCROOT "/dev/mmcblk1p2"
19
20#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
21
Nikolay Dimitrov223d91c2015-05-18 02:10:45 +030022#define CONFIG_IMX6_THERMAL
Eric Benard3cbeb0f2014-04-04 19:05:55 +020023
24/* Size of malloc() pool */
25#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
26
27#define CONFIG_BOARD_EARLY_INIT_F
28#define CONFIG_BOARD_LATE_INIT
Eric Benard3cbeb0f2014-04-04 19:05:55 +020029
30#define CONFIG_MXC_UART
31
32#define CONFIG_CMD_FUSE
33#ifdef CONFIG_CMD_FUSE
34#define CONFIG_MXC_OCOTP
35#endif
36
37/* I2C Configs */
38#define CONFIG_CMD_I2C
39#define CONFIG_SYS_I2C
40#define CONFIG_SYS_I2C_MXC
York Sunf8cb1012015-03-20 10:20:40 -070041#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020042#define CONFIG_SYS_I2C_SPEED 100000
43
44/* USB Configs */
45#define CONFIG_CMD_USB
46#define CONFIG_USB_EHCI
47#define CONFIG_USB_EHCI_MX6
48#define CONFIG_USB_STORAGE
49#define CONFIG_USB_HOST_ETHER
50#define CONFIG_USB_ETHER_ASIX
51#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
52#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
53#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
54#define CONFIG_MXC_USB_FLAGS 0
55
56/* MMC Configs */
Eric Benard3cbeb0f2014-04-04 19:05:55 +020057#define CONFIG_SYS_FSL_ESDHC_ADDR 0
58
Eric Benard3cbeb0f2014-04-04 19:05:55 +020059#define CONFIG_FEC_MXC
60#define CONFIG_MII
61#define IMX_FEC_BASE ENET_BASE_ADDR
62#define CONFIG_FEC_XCV_TYPE RGMII
63#define CONFIG_ETHPRIME "FEC"
64#define CONFIG_FEC_MXC_PHYADDR 4
65
66#define CONFIG_PHYLIB
67#define CONFIG_PHY_ATHEROS
68
69#define CONFIG_CMD_SF
70#ifdef CONFIG_CMD_SF
71#define CONFIG_SPI_FLASH
72#define CONFIG_SPI_FLASH_SST
73#define CONFIG_MXC_SPI
74#define CONFIG_SF_DEFAULT_BUS 0
Nikita Kiryanov155fa9a2014-08-20 15:08:50 +030075#define CONFIG_SF_DEFAULT_CS 0
Eric Benard3cbeb0f2014-04-04 19:05:55 +020076#define CONFIG_SF_DEFAULT_SPEED 20000000
77#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
78#endif
79
Eric Benard3cbeb0f2014-04-04 19:05:55 +020080/* Command definition */
Iain Paton729d2a32014-12-14 14:51:32 +000081#undef CONFIG_CMD_FPGA
Eric Benard3cbeb0f2014-04-04 19:05:55 +020082
83#define CONFIG_CMD_BMODE
Eric Benard3cbeb0f2014-04-04 19:05:55 +020084#define CONFIG_CMD_SETEXPR
Eric Benard3cbeb0f2014-04-04 19:05:55 +020085
Eric Benard3cbeb0f2014-04-04 19:05:55 +020086#define CONFIG_ARP_TIMEOUT 200UL
87
Eric Benard3cbeb0f2014-04-04 19:05:55 +020088/* Print Buffer Size */
89#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Eric Benard3cbeb0f2014-04-04 19:05:55 +020090
91#define CONFIG_SYS_MEMTEST_START 0x10000000
92#define CONFIG_SYS_MEMTEST_END 0x10010000
93#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
94
Eric Benard3cbeb0f2014-04-04 19:05:55 +020095#define CONFIG_STACKSIZE (128 * 1024)
96
97/* Physical Memory Map */
98#define CONFIG_NR_DRAM_BANKS 1
99#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
100
101#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
102#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
103#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
104
105#define CONFIG_SYS_INIT_SP_OFFSET \
106 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
107#define CONFIG_SYS_INIT_SP_ADDR \
108 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
109
Peter Robinson056845c2015-05-22 17:30:45 +0100110/* Environment organization */
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200111#define CONFIG_ENV_SIZE (8 * 1024)
112
113#if defined(CONFIG_ENV_IS_IN_MMC)
114/* RiOTboard */
Iain Patonc86efd82014-12-14 14:51:46 +0000115#define CONFIG_FDTFILE "imx6dl-riotboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200116#define CONFIG_SYS_FSL_USDHC_NUM 3
117#define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */
118#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
119#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
120#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
121/* MarSBoard */
Iain Patonc86efd82014-12-14 14:51:46 +0000122#define CONFIG_FDTFILE "imx6q-marsboard.dtb"
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200123#define CONFIG_SYS_FSL_USDHC_NUM 2
124#define CONFIG_ENV_OFFSET (768 * 1024)
125#define CONFIG_ENV_SECT_SIZE (8 * 1024)
126#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
127#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
128#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
129#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
130#endif
131
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200132/* Framebuffer */
133#define CONFIG_VIDEO
134#define CONFIG_VIDEO_IPUV3
135#define CONFIG_CFB_CONSOLE
136#define CONFIG_VGA_AS_SINGLE_DEVICE
137#define CONFIG_SYS_CONSOLE_IS_IN_ENV
138#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
139#define CONFIG_VIDEO_BMP_RLE8
140#define CONFIG_SPLASH_SCREEN
141#define CONFIG_SPLASH_SCREEN_ALIGN
142#define CONFIG_BMP_16BPP
143#define CONFIG_VIDEO_LOGO
144#define CONFIG_VIDEO_BMP_LOGO
145#define CONFIG_IPUV3_CLK 260000000
146#define CONFIG_IMX_HDMI
147#define CONFIG_IMX_VIDEO_SKIP
148
Iain Paton729d2a32014-12-14 14:51:32 +0000149#include <config_distro_defaults.h>
Peter Robinsone51c1e82015-05-22 17:30:52 +0100150#include "mx6_common.h"
Iain Paton729d2a32014-12-14 14:51:32 +0000151
Iain Patonc86efd82014-12-14 14:51:46 +0000152/* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
153 * 1M script, 1M pxe and the ramdisk at the end */
154#define MEM_LAYOUT_ENV_SETTINGS \
155 "bootm_size=0x10000000\0" \
156 "kernel_addr_r=0x12000000\0" \
157 "fdt_addr_r=0x13000000\0" \
158 "scriptaddr=0x13100000\0" \
159 "pxefile_addr_r=0x13200000\0" \
160 "ramdisk_addr_r=0x13300000\0"
161
162#define BOOT_TARGET_DEVICES(func) \
163 func(MMC, mmc, 0) \
164 func(MMC, mmc, 1) \
165 func(MMC, mmc, 2) \
166 func(USB, usb, 0) \
167 func(PXE, pxe, na) \
168 func(DHCP, dhcp, na)
169
170#include <config_distro_bootcmd.h>
171
172#define CONSOLE_STDIN_SETTINGS \
173 "stdin=serial\0"
174
175#define CONSOLE_STDOUT_SETTINGS \
176 "stdout=serial\0" \
177 "stderr=serial\0"
178
179#define CONSOLE_ENV_SETTINGS \
180 CONSOLE_STDIN_SETTINGS \
181 CONSOLE_STDOUT_SETTINGS
182
183#define CONFIG_EXTRA_ENV_SETTINGS \
184 CONSOLE_ENV_SETTINGS \
185 MEM_LAYOUT_ENV_SETTINGS \
186 "fdtfile=" CONFIG_FDTFILE "\0" \
187 BOOTENV
188
Eric Benard3cbeb0f2014-04-04 19:05:55 +0200189#endif /* __RIOTBOARD_CONFIG_H */