wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This file contains the configuration parameters for the dbau1x00 board. |
| 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 15 | #define CONFIG_DBAU1X00 1 |
Shinya Kuribayashi | 8bde63e | 2008-06-07 20:51:56 +0900 | [diff] [blame] | 16 | #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 17 | |
Daniel Schwierzeck | 7436869 | 2014-11-15 23:30:01 +0100 | [diff] [blame] | 18 | #define CONFIG_DISPLAY_BOARDINFO |
| 19 | |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 20 | #ifdef CONFIG_DBAU1000 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 21 | /* Also known as Merlot */ |
Shinya Kuribayashi | 8bde63e | 2008-06-07 20:51:56 +0900 | [diff] [blame] | 22 | #define CONFIG_SOC_AU1000 1 |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 23 | #else |
| 24 | #ifdef CONFIG_DBAU1100 |
Shinya Kuribayashi | 8bde63e | 2008-06-07 20:51:56 +0900 | [diff] [blame] | 25 | #define CONFIG_SOC_AU1100 1 |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 26 | #else |
| 27 | #ifdef CONFIG_DBAU1500 |
Shinya Kuribayashi | 8bde63e | 2008-06-07 20:51:56 +0900 | [diff] [blame] | 28 | #define CONFIG_SOC_AU1500 1 |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 29 | #else |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 30 | #ifdef CONFIG_DBAU1550 |
| 31 | /* Cabernet */ |
Shinya Kuribayashi | 8bde63e | 2008-06-07 20:51:56 +0900 | [diff] [blame] | 32 | #define CONFIG_SOC_AU1550 1 |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 33 | #else |
wdenk | a2663ea | 2003-12-07 18:32:37 +0000 | [diff] [blame] | 34 | #error "No valid board set" |
| 35 | #endif |
| 36 | #endif |
| 37 | #endif |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 38 | #endif |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 39 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 40 | #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ |
| 41 | |
| 42 | #define CONFIG_BAUDRATE 115200 |
| 43 | |
| 44 | /* valid baudrates */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 45 | |
| 46 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
| 47 | #undef CONFIG_BOOTARGS |
| 48 | |
| 49 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 50 | "addmisc=setenv bootargs ${bootargs} " \ |
| 51 | "console=ttyS0,${baudrate} " \ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 52 | "panic=1\0" \ |
| 53 | "bootfile=/tftpboot/vmlinux.srec\0" \ |
Wolfgang Denk | fe126d8 | 2005-11-20 21:40:11 +0100 | [diff] [blame] | 54 | "load=tftp 80500000 ${u-boot}\0" \ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 55 | "" |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 56 | |
| 57 | #ifdef CONFIG_DBAU1550 |
| 58 | /* Boot from flash by default, revert to bootp */ |
| 59 | #define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm" |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 60 | #else /* CONFIG_DBAU1550 */ |
Heiko Schocher | ad88297 | 2006-04-11 14:53:29 +0200 | [diff] [blame] | 61 | #define CONFIG_BOOTCOMMAND "bootp;bootm" |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 62 | #endif /* CONFIG_DBAU1550 */ |
| 63 | |
Jon Loeliger | ab999ba | 2007-07-04 22:32:03 -0500 | [diff] [blame] | 64 | |
| 65 | /* |
Jon Loeliger | 80ff4f9 | 2007-07-10 09:29:01 -0500 | [diff] [blame] | 66 | * BOOTP options |
| 67 | */ |
| 68 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 69 | #define CONFIG_BOOTP_BOOTPATH |
| 70 | #define CONFIG_BOOTP_GATEWAY |
| 71 | #define CONFIG_BOOTP_HOSTNAME |
| 72 | |
| 73 | |
| 74 | /* |
Jon Loeliger | ab999ba | 2007-07-04 22:32:03 -0500 | [diff] [blame] | 75 | * Command line configuration. |
| 76 | */ |
| 77 | #include <config_cmd_default.h> |
| 78 | |
| 79 | #undef CONFIG_CMD_BDI |
| 80 | #undef CONFIG_CMD_BEDBUG |
| 81 | #undef CONFIG_CMD_ELF |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 82 | #undef CONFIG_CMD_SAVEENV |
Jon Loeliger | ab999ba | 2007-07-04 22:32:03 -0500 | [diff] [blame] | 83 | #undef CONFIG_CMD_FAT |
| 84 | #undef CONFIG_CMD_FPGA |
| 85 | #undef CONFIG_CMD_MII |
| 86 | #undef CONFIG_CMD_RUN |
| 87 | |
| 88 | |
| 89 | #ifdef CONFIG_DBAU1550 |
| 90 | |
| 91 | #define CONFIG_CMD_FLASH |
| 92 | #define CONFIG_CMD_LOADB |
| 93 | #define CONFIG_CMD_NET |
| 94 | |
| 95 | #undef CONFIG_CMD_I2C |
| 96 | #undef CONFIG_CMD_IDE |
| 97 | #undef CONFIG_CMD_NFS |
| 98 | #undef CONFIG_CMD_PCMCIA |
| 99 | |
| 100 | #else |
| 101 | |
| 102 | #define CONFIG_CMD_IDE |
| 103 | #define CONFIG_CMD_DHCP |
| 104 | |
| 105 | #undef CONFIG_CMD_FLASH |
| 106 | #undef CONFIG_CMD_LOADB |
| 107 | #undef CONFIG_CMD_LOADS |
| 108 | |
| 109 | #endif |
| 110 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 111 | |
| 112 | /* |
| 113 | * Miscellaneous configurable options |
| 114 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 115 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 116 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #define CONFIG_SYS_PROMPT "DbAu1xx0 # " /* Monitor Command Prompt */ |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 118 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 120 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 121 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 122 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 123 | #define CONFIG_SYS_MALLOC_LEN 128*1024 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 124 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 126 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_MHZ 396 |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 128 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #if (CONFIG_SYS_MHZ % 12) != 0 |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 130 | #error "Invalid CPU frequency - must be multiple of 12!" |
| 131 | #endif |
| 132 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) |
Shinya Kuribayashi | a55d481 | 2008-06-05 22:29:00 +0900 | [diff] [blame] | 134 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 135 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 136 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 137 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 138 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
| 140 | #define CONFIG_SYS_MEMTEST_END 0x80800000 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 141 | |
| 142 | /*----------------------------------------------------------------------- |
| 143 | * FLASH and environment organization |
| 144 | */ |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 145 | #ifdef CONFIG_DBAU1550 |
| 146 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 147 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
| 148 | #define CONFIG_SYS_MAX_FLASH_SECT (512) /* max number of sectors on one chip */ |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 149 | |
| 150 | #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */ |
| 151 | #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */ |
| 152 | |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 153 | #else /* CONFIG_DBAU1550 */ |
| 154 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
| 156 | #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 157 | |
| 158 | #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ |
| 159 | #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ |
| 160 | |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 161 | #endif /* CONFIG_DBAU1550 */ |
| 162 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 163 | #define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2} |
Heiko Schocher | ad88297 | 2006-04-11 14:53:29 +0200 | [diff] [blame] | 164 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 165 | #define CONFIG_SYS_FLASH_CFI 1 |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 166 | #define CONFIG_FLASH_CFI_DRIVER 1 |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 167 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 168 | /* The following #defines are needed to get flash environment right */ |
Wolfgang Denk | 14d0a02 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 169 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 170 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 171 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 172 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 173 | |
| 174 | /* We boot from this flash, selected with dip switch */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 175 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 176 | |
| 177 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 178 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 179 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 180 | |
Jean-Christophe PLAGNIOL-VILLARD | 93f6d72 | 2008-09-10 22:48:00 +0200 | [diff] [blame] | 181 | #define CONFIG_ENV_IS_NOWHERE 1 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 182 | |
| 183 | /* Address and size of Primary Environment Sector */ |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 184 | #define CONFIG_ENV_ADDR 0xB0030000 |
| 185 | #define CONFIG_ENV_SIZE 0x10000 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 186 | |
| 187 | #define CONFIG_FLASH_16BIT |
| 188 | |
| 189 | #define CONFIG_NR_DRAM_BANKS 2 |
| 190 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 191 | |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 192 | #ifdef CONFIG_DBAU1550 |
| 193 | #define MEM_SIZE 192 |
| 194 | #else |
| 195 | #define MEM_SIZE 64 |
| 196 | #endif |
| 197 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 198 | #define CONFIG_MEMSIZE_IN_BYTES |
| 199 | |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 200 | #ifndef CONFIG_DBAU1550 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 201 | /*---ATA PCMCIA ------------------------------------*/ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 202 | #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ |
| 203 | #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 204 | #define CONFIG_PCMCIA_SLOT_A |
| 205 | |
| 206 | #define CONFIG_ATAPI 1 |
| 207 | #define CONFIG_MAC_PARTITION 1 |
| 208 | |
| 209 | /* We run CF in "true ide" mode or a harddrive via pcmcia */ |
| 210 | #define CONFIG_IDE_PCMCIA 1 |
| 211 | |
| 212 | /* We only support one slot for now */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 213 | #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ |
| 214 | #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 215 | |
| 216 | #undef CONFIG_IDE_LED /* LED for ide not supported */ |
| 217 | #undef CONFIG_IDE_RESET /* reset for ide not supported */ |
| 218 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 219 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 220 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 221 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 222 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 223 | /* Offset for data I/O */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 224 | #define CONFIG_SYS_ATA_DATA_OFFSET 8 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 225 | |
| 226 | /* Offset for normal register accesses */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 227 | #define CONFIG_SYS_ATA_REG_OFFSET 0 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 228 | |
| 229 | /* Offset for alternate registers */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 230 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 |
wdenk | ff36fd8 | 2005-01-09 22:28:56 +0000 | [diff] [blame] | 231 | #endif /* CONFIG_DBAU1550 */ |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 232 | |
| 233 | /*----------------------------------------------------------------------- |
| 234 | * Cache Configuration |
| 235 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 236 | #define CONFIG_SYS_DCACHE_SIZE 16384 |
| 237 | #define CONFIG_SYS_ICACHE_SIZE 16384 |
| 238 | #define CONFIG_SYS_CACHELINE_SIZE 32 |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 239 | |
wdenk | 5da627a | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 240 | #endif /* __CONFIG_H */ |