TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Freescale MCF5373 FireEngine board. |
| 3 | * |
Alison Wang | 2ee03c6 | 2012-03-25 19:18:14 +0000 | [diff] [blame] | 4 | * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 5 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
| 6 | * |
Wolfgang Denk | 3765b3e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * board/config.h - configuration options, board specific |
| 12 | */ |
| 13 | |
| 14 | #ifndef _M5373EVB_H |
| 15 | #define _M5373EVB_H |
| 16 | |
| 17 | /* |
| 18 | * High Level Configuration Options |
| 19 | * (easy to change) |
| 20 | */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 21 | |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 22 | #define CONFIG_MCFUART |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 23 | #define CONFIG_SYS_UART_PORT (0) |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 24 | #define CONFIG_BAUDRATE 115200 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 25 | |
| 26 | #undef CONFIG_WATCHDOG |
| 27 | #define CONFIG_WATCHDOG_TIMEOUT 3360 /* timeout in ms, max is 3.36 sec */ |
| 28 | |
| 29 | /* Command line configuration */ |
| 30 | #include <config_cmd_default.h> |
| 31 | |
| 32 | #define CONFIG_CMD_CACHE |
| 33 | #define CONFIG_CMD_DATE |
| 34 | #define CONFIG_CMD_ELF |
| 35 | #define CONFIG_CMD_FLASH |
| 36 | #define CONFIG_CMD_I2C |
| 37 | #define CONFIG_CMD_MEMORY |
| 38 | #define CONFIG_CMD_MISC |
| 39 | #define CONFIG_CMD_MII |
| 40 | #define CONFIG_CMD_NET |
| 41 | #define CONFIG_CMD_PING |
| 42 | #define CONFIG_CMD_REGINFO |
| 43 | |
Alison Wang | 2ee03c6 | 2012-03-25 19:18:14 +0000 | [diff] [blame] | 44 | #ifdef CONFIG_NANDFLASH_SIZE |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 45 | # define CONFIG_CMD_NAND |
| 46 | #endif |
| 47 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 48 | #define CONFIG_SYS_UNIFY_CACHE |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 49 | |
| 50 | #define CONFIG_MCFFEC |
| 51 | #ifdef CONFIG_MCFFEC |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 52 | # define CONFIG_MII 1 |
TsiChung Liew | 0f3ba7e | 2008-03-30 01:22:13 -0500 | [diff] [blame] | 53 | # define CONFIG_MII_INIT 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 54 | # define CONFIG_SYS_DISCOVER_PHY |
| 55 | # define CONFIG_SYS_RX_ETH_BUFFER 8 |
| 56 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 57 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 58 | # define CONFIG_SYS_FEC0_PINMUX 0 |
| 59 | # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 60 | # define MCFFEC_TOUT_LOOP 50000 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ |
| 62 | # ifndef CONFIG_SYS_DISCOVER_PHY |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 63 | # define FECDUPLEX FULL |
| 64 | # define FECSPEED _100BASET |
| 65 | # else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 66 | # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
| 67 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 68 | # endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 69 | # endif /* CONFIG_SYS_DISCOVER_PHY */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 70 | #endif |
| 71 | |
| 72 | #define CONFIG_MCFRTC |
| 73 | #undef RTC_DEBUG |
| 74 | |
| 75 | /* Timer */ |
| 76 | #define CONFIG_MCFTMR |
| 77 | #undef CONFIG_MCFPIT |
| 78 | |
| 79 | /* I2C */ |
Heiko Schocher | 00f792e | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_I2C |
| 81 | #define CONFIG_SYS_I2C_FSL |
| 82 | #define CONFIG_SYS_FSL_I2C_SPEED 80000 |
| 83 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 84 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 85 | #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 86 | |
| 87 | #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */ |
| 88 | #define CONFIG_UDP_CHECKSUM |
| 89 | |
| 90 | #ifdef CONFIG_MCFFEC |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 91 | # define CONFIG_IPADDR 192.162.1.2 |
| 92 | # define CONFIG_NETMASK 255.255.255.0 |
| 93 | # define CONFIG_SERVERIP 192.162.1.1 |
| 94 | # define CONFIG_GATEWAYIP 192.162.1.1 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 95 | #endif /* FEC_ENET */ |
| 96 | |
| 97 | #define CONFIG_HOSTNAME M5373EVB |
| 98 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 99 | "netdev=eth0\0" \ |
Marek Vasut | 5368c55 | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 100 | "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 101 | "u-boot=u-boot.bin\0" \ |
| 102 | "load=tftp ${loadaddr) ${u-boot}\0" \ |
| 103 | "upd=run load; run prog\0" \ |
Jason Jin | 09933fb | 2011-08-19 10:10:40 +0800 | [diff] [blame] | 104 | "prog=prot off 0 3ffff;" \ |
| 105 | "era 0 3ffff;" \ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 106 | "cp.b ${loadaddr} 0 ${filesize};" \ |
| 107 | "save\0" \ |
| 108 | "" |
| 109 | |
| 110 | #define CONFIG_PRAM 512 /* 512 KB */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 111 | #define CONFIG_SYS_PROMPT "-> " |
| 112 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 113 | |
| 114 | #ifdef CONFIG_CMD_KGDB |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 115 | # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 116 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 118 | #endif |
| 119 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 120 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ |
| 121 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 122 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| 123 | #define CONFIG_SYS_LOAD_ADDR 0x40010000 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 124 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 125 | #define CONFIG_SYS_CLK 80000000 |
| 126 | #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 127 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 128 | #define CONFIG_SYS_MBAR 0xFC000000 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_LATCH_ADDR (CONFIG_SYS_CS1_BASE + 0x80000) |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 131 | |
| 132 | /* |
| 133 | * Low Level Configuration Settings |
| 134 | * (address mappings, register initial values, etc.) |
| 135 | * You should know what you are doing if you make changes here. |
| 136 | */ |
| 137 | /*----------------------------------------------------------------------- |
| 138 | * Definitions for initial stack pointer and data area (in DPRAM) |
| 139 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 140 | #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_INIT_RAM_CTRL 0x221 |
Wolfgang Denk | 25ddd1f | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 143 | #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 144 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 145 | |
| 146 | /*----------------------------------------------------------------------- |
| 147 | * Start addresses for the final memory configuration |
| 148 | * (Set up by the startup code) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 150 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
| 152 | #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ |
| 153 | #define CONFIG_SYS_SDRAM_CFG1 0x53722730 |
| 154 | #define CONFIG_SYS_SDRAM_CFG2 0x56670000 |
| 155 | #define CONFIG_SYS_SDRAM_CTRL 0xE1092000 |
| 156 | #define CONFIG_SYS_SDRAM_EMOD 0x40010000 |
| 157 | #define CONFIG_SYS_SDRAM_MODE 0x018D0000 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 158 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 159 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400 |
| 160 | #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20) |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 161 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) |
| 163 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 164 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 165 | #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 |
| 166 | #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 167 | |
| 168 | /* |
| 169 | * For booting Linux, the board info and command line data |
| 170 | * have to be in the first 8 MB of memory, since this is |
| 171 | * the maximum mapped by the Linux kernel during initialization ?? |
| 172 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) |
TsiChung Liew | d6e4baf | 2009-01-27 12:57:47 +0000 | [diff] [blame] | 174 | #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 175 | |
| 176 | /*----------------------------------------------------------------------- |
| 177 | * FLASH organization |
| 178 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 179 | #define CONFIG_SYS_FLASH_CFI |
| 180 | #ifdef CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 00b1883 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 181 | # define CONFIG_FLASH_CFI_DRIVER 1 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 182 | # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ |
| 183 | # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT |
| 184 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 185 | # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ |
| 186 | # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 187 | #endif |
| 188 | |
Alison Wang | 2ee03c6 | 2012-03-25 19:18:14 +0000 | [diff] [blame] | 189 | #ifdef CONFIG_NANDFLASH_SIZE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 190 | # define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 191 | # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE |
| 192 | # define CONFIG_SYS_NAND_SIZE 1 |
| 193 | # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 194 | # define NAND_ALLOW_ERASE_ALL 1 |
| 195 | # define CONFIG_JFFS2_NAND 1 |
| 196 | # define CONFIG_JFFS2_DEV "nand0" |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 197 | # define CONFIG_JFFS2_PART_SIZE (CONFIG_SYS_CS2_MASK & ~1) |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 198 | # define CONFIG_JFFS2_PART_OFFSET 0x00000000 |
| 199 | #endif |
| 200 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 201 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 202 | |
| 203 | /* Configuration for environment |
| 204 | * Environment is embedded in u-boot in the second sector of the flash |
| 205 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 206 | #define CONFIG_ENV_OFFSET 0x4000 |
| 207 | #define CONFIG_ENV_SECT_SIZE 0x2000 |
Jean-Christophe PLAGNIOL-VILLARD | 5a1aceb | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 208 | #define CONFIG_ENV_IS_IN_FLASH 1 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 209 | |
angelo@sysam.it | 5296cb1 | 2015-03-29 22:54:16 +0200 | [diff] [blame] | 210 | #define LDS_BOARD_TEXT \ |
| 211 | . = DEFINED(env_offset) ? env_offset : .; \ |
| 212 | common/env_embedded.o (.text*); |
| 213 | |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 214 | /*----------------------------------------------------------------------- |
| 215 | * Cache Configuration |
| 216 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 217 | #define CONFIG_SYS_CACHELINE_SIZE 16 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 218 | |
TsiChung Liew | dd9f054 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 219 | #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 220 | CONFIG_SYS_INIT_RAM_SIZE - 8) |
TsiChung Liew | dd9f054 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 221 | #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |
Wolfgang Denk | 553f098 | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 222 | CONFIG_SYS_INIT_RAM_SIZE - 4) |
TsiChung Liew | dd9f054 | 2010-03-11 22:12:53 -0600 | [diff] [blame] | 223 | #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) |
| 224 | #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ |
| 225 | CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ |
| 226 | CF_ACR_EN | CF_ACR_SM_ALL) |
| 227 | #define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ |
| 228 | CF_CACR_DCM_P) |
| 229 | |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 230 | /*----------------------------------------------------------------------- |
| 231 | * Chipselect bank definitions |
| 232 | */ |
| 233 | /* |
| 234 | * CS0 - NOR Flash 1, 2, 4, or 8MB |
| 235 | * CS1 - CompactFlash and registers |
| 236 | * CS2 - NAND Flash 16, 32, or 64MB |
| 237 | * CS3 - Available |
| 238 | * CS4 - Available |
| 239 | * CS5 - Available |
| 240 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 241 | #define CONFIG_SYS_CS0_BASE 0 |
| 242 | #define CONFIG_SYS_CS0_MASK 0x007f0001 |
| 243 | #define CONFIG_SYS_CS0_CTRL 0x00001fa0 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 244 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 245 | #define CONFIG_SYS_CS1_BASE 0x10000000 |
| 246 | #define CONFIG_SYS_CS1_MASK 0x001f0001 |
| 247 | #define CONFIG_SYS_CS1_CTRL 0x002A3780 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 248 | |
Alison Wang | 2ee03c6 | 2012-03-25 19:18:14 +0000 | [diff] [blame] | 249 | #ifdef CONFIG_NANDFLASH_SIZE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 250 | #define CONFIG_SYS_CS2_BASE 0x20000000 |
Alison Wang | 2ee03c6 | 2012-03-25 19:18:14 +0000 | [diff] [blame] | 251 | #define CONFIG_SYS_CS2_MASK ((CONFIG_NANDFLASH_SIZE << 20) | 1) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 252 | #define CONFIG_SYS_CS2_CTRL 0x00001f60 |
TsiChungLiew | aa5f1f9 | 2008-01-14 17:23:08 -0600 | [diff] [blame] | 253 | #endif |
| 254 | |
| 255 | #endif /* _M5373EVB_H */ |