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TsiChungLiew4a442d32007-08-16 19:23:50 -05001/*
2 * Configuation settings for the Freescale MCF5329 FireEngine board.
3 *
4 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
6 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02007 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiew4a442d32007-08-16 19:23:50 -05008 */
9
10/*
11 * board/config.h - configuration options, board specific
12 */
13
14#ifndef _M5235EVB_H
15#define _M5235EVB_H
16
17/*
18 * High Level Configuration Options
19 * (easy to change)
20 */
TsiChungLiew4a442d32007-08-16 19:23:50 -050021
TsiChungLiew4a442d32007-08-16 19:23:50 -050022#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020023#define CONFIG_SYS_UART_PORT (0)
TsiChungLiew4a442d32007-08-16 19:23:50 -050024#define CONFIG_BAUDRATE 115200
TsiChungLiew4a442d32007-08-16 19:23:50 -050025
26#undef CONFIG_WATCHDOG
27#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
28
29/*
30 * BOOTP options
31 */
32#define CONFIG_BOOTP_BOOTFILESIZE
33#define CONFIG_BOOTP_BOOTPATH
34#define CONFIG_BOOTP_GATEWAY
35#define CONFIG_BOOTP_HOSTNAME
36
37/* Command line configuration */
38#include <config_cmd_default.h>
39
40#define CONFIG_CMD_BOOTD
41#define CONFIG_CMD_CACHE
42#define CONFIG_CMD_DHCP
43#define CONFIG_CMD_ELF
44#define CONFIG_CMD_FLASH
45#define CONFIG_CMD_I2C
46#define CONFIG_CMD_MEMORY
47#define CONFIG_CMD_MISC
48#define CONFIG_CMD_MII
49#define CONFIG_CMD_NET
50#define CONFIG_CMD_PCI
51#define CONFIG_CMD_PING
52#define CONFIG_CMD_REGINFO
53
54#undef CONFIG_CMD_LOADB
55#undef CONFIG_CMD_LOADS
56
57#define CONFIG_MCFFEC
58#ifdef CONFIG_MCFFEC
TsiChungLiew4a442d32007-08-16 19:23:50 -050059# define CONFIG_MII 1
TsiChung Liew0f3ba7e2008-03-30 01:22:13 -050060# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061# define CONFIG_SYS_DISCOVER_PHY
62# define CONFIG_SYS_RX_ETH_BUFFER 8
63# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew4a442d32007-08-16 19:23:50 -050064
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065# define CONFIG_SYS_FEC0_PINMUX 0
66# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denk53677ef2008-05-20 16:00:29 +020067# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
69# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiew4a442d32007-08-16 19:23:50 -050070# define FECDUPLEX FULL
71# define FECSPEED _100BASET
72# else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
74# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew4a442d32007-08-16 19:23:50 -050075# endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiew4a442d32007-08-16 19:23:50 -050077#endif
78
79/* Timer */
80#define CONFIG_MCFTMR
81#undef CONFIG_MCFPIT
82
83/* I2C */
Heiko Schocher00f792e2012-10-24 13:48:22 +020084#define CONFIG_SYS_I2C
85#define CONFIG_SYS_i2C_FSL
86#define CONFIG_SYS_FSL_I2C_SPEED 80000
87#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
88#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
90#define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi)
91#define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
92#define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
TsiChungLiew4a442d32007-08-16 19:23:50 -050093
94/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
95#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
96#define CONFIG_BOOTFILE "u-boot.bin"
97#ifdef CONFIG_MCFFEC
TsiChungLiew4a442d32007-08-16 19:23:50 -050098# define CONFIG_IPADDR 192.162.1.2
99# define CONFIG_NETMASK 255.255.255.0
100# define CONFIG_SERVERIP 192.162.1.1
101# define CONFIG_GATEWAYIP 192.162.1.1
TsiChungLiew4a442d32007-08-16 19:23:50 -0500102#endif /* FEC_ENET */
103
104#define CONFIG_HOSTNAME M5235EVB
105#define CONFIG_EXTRA_ENV_SETTINGS \
106 "netdev=eth0\0" \
107 "loadaddr=10000\0" \
108 "u-boot=u-boot.bin\0" \
109 "load=tftp ${loadaddr) ${u-boot}\0" \
110 "upd=run load; run prog\0" \
111 "prog=prot off ffe00000 ffe3ffff;" \
112 "era ffe00000 ffe3ffff;" \
113 "cp.b ${loadaddr} ffe00000 ${filesize};"\
114 "save\0" \
115 ""
116
117#define CONFIG_PRAM 512 /* 512 KB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_PROMPT "-> "
119#define CONFIG_SYS_LONGHELP /* undef to save memory */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500120
121#if defined(CONFIG_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500123#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500125#endif
126
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
128#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
129#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
130#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE+0x20000)
TsiChungLiew4a442d32007-08-16 19:23:50 -0500131
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#define CONFIG_SYS_CLK 75000000
133#define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
TsiChungLiew4a442d32007-08-16 19:23:50 -0500134
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_MBAR 0x40000000
TsiChungLiew4a442d32007-08-16 19:23:50 -0500136
137/*
138 * Low Level Configuration Settings
139 * (address mappings, register initial values, etc.)
140 * You should know what you are doing if you make changes here.
141 */
142/*-----------------------------------------------------------------------
143 * Definitions for initial stack pointer and data area (in DPRAM)
144 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk553f0982010-10-26 13:32:32 +0200146#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_INIT_RAM_CTRL 0x21
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200148#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE - 0x10)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
TsiChungLiew4a442d32007-08-16 19:23:50 -0500150
151/*-----------------------------------------------------------------------
152 * Start addresses for the final memory configuration
153 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200154 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
TsiChungLiew4a442d32007-08-16 19:23:50 -0500155 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_SDRAM_BASE 0x00000000
157#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500158
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
160#define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
TsiChungLiew4a442d32007-08-16 19:23:50 -0500161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
163#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500164
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
166#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500167
168/*
169 * For booting Linux, the board info and command line data
170 * have to be in the first 8 MB of memory, since this is
171 * the maximum mapped by the Linux kernel during initialization ??
172 */
173/* Initial Memory map for Linux */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
TsiChung Liewd6e4baf2009-01-27 12:57:47 +0000175#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
TsiChungLiew4a442d32007-08-16 19:23:50 -0500176
177/*-----------------------------------------------------------------------
178 * FLASH organization
179 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_SYS_FLASH_CFI
181#ifdef CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200182# define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183# define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500184#ifdef NORFLASH_PS32BIT
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
TsiChungLiew4a442d32007-08-16 19:23:50 -0500186#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
TsiChungLiew4a442d32007-08-16 19:23:50 -0500188#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189# define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
190# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
191# define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
TsiChungLiew4a442d32007-08-16 19:23:50 -0500192#endif
193
TsiChung Liew012522f2008-10-21 10:03:07 +0000194#define CONFIG_SYS_FLASH_BASE (CONFIG_SYS_CS0_BASE)
TsiChungLiew4a442d32007-08-16 19:23:50 -0500195
196/* Configuration for environment
197 * Environment is embedded in u-boot in the second sector of the flash
198 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200199#define CONFIG_ENV_IS_IN_FLASH 1
angelo@sysam.it5296cb12015-03-29 22:54:16 +0200200
201#define LDS_BOARD_TEXT \
202 . = DEFINED(env_offset) ? env_offset : .; \
203 common/env_embedded.o (.text);
204
TsiChungLiew4a442d32007-08-16 19:23:50 -0500205#ifdef NORFLASH_PS32BIT
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200206# define CONFIG_ENV_OFFSET (0x8000)
207# define CONFIG_ENV_SIZE 0x4000
208# define CONFIG_ENV_SECT_SIZE 0x4000
TsiChungLiew4a442d32007-08-16 19:23:50 -0500209#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200210# define CONFIG_ENV_OFFSET (0x4000)
211# define CONFIG_ENV_SIZE 0x2000
212# define CONFIG_ENV_SECT_SIZE 0x2000
TsiChungLiew4a442d32007-08-16 19:23:50 -0500213#endif
214
215/*-----------------------------------------------------------------------
216 * Cache Configuration
217 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200218#define CONFIG_SYS_CACHELINE_SIZE 16
TsiChungLiew4a442d32007-08-16 19:23:50 -0500219
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600220#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200221 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600222#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200223 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600224#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV)
225#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
226 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
227 CF_ACR_EN | CF_ACR_SM_ALL)
228#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
229 CF_CACR_CEIB | CF_CACR_DCM | \
230 CF_CACR_EUSP)
231
TsiChungLiew4a442d32007-08-16 19:23:50 -0500232/*-----------------------------------------------------------------------
233 * Chipselect bank definitions
234 */
235/*
236 * CS0 - NOR Flash 1, 2, 4, or 8MB
237 * CS1 - Available
238 * CS2 - Available
239 * CS3 - Available
240 * CS4 - Available
241 * CS5 - Available
242 * CS6 - Available
243 * CS7 - Available
244 */
245#ifdef NORFLASH_PS32BIT
TsiChung Liew012522f2008-10-21 10:03:07 +0000246# define CONFIG_SYS_CS0_BASE 0xFFC00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200247# define CONFIG_SYS_CS0_MASK 0x003f0001
TsiChung Liew012522f2008-10-21 10:03:07 +0000248# define CONFIG_SYS_CS0_CTRL 0x00001D00
TsiChungLiew4a442d32007-08-16 19:23:50 -0500249#else
TsiChung Liew012522f2008-10-21 10:03:07 +0000250# define CONFIG_SYS_CS0_BASE 0xFFE00000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200251# define CONFIG_SYS_CS0_MASK 0x001f0001
TsiChung Liew012522f2008-10-21 10:03:07 +0000252# define CONFIG_SYS_CS0_CTRL 0x00001D80
TsiChungLiew4a442d32007-08-16 19:23:50 -0500253#endif
254
255#endif /* _M5329EVB_H */