blob: 21ac5e7d7413a5a49a3015f04af8e7185b67b44d [file] [log] [blame]
Otavio Salvador4579dc32015-02-17 10:42:46 -02001/*
2 * Copyright (C) 2014, 2015 O.S. Systems Software LTDA.
3 * Copyright (C) 2014 Kynetics LLC.
4 * Copyright (C) 2014 Revolution Robotics, Inc.
5 *
6 * Author: Otavio Salvador <otavio@ossystems.com.br>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11#include <asm/arch/clock.h>
12#include <asm/arch/iomux.h>
13#include <asm/arch/imx-regs.h>
14#include <asm/arch/mx6-pins.h>
15#include <asm/arch/sys_proto.h>
16#include <asm/gpio.h>
17#include <asm/imx-common/iomux-v3.h>
18#include <asm/io.h>
19#include <linux/sizes.h>
20#include <common.h>
21#include <watchdog.h>
22#include <fsl_esdhc.h>
23#include <mmc.h>
Fabio Estevam09ac7b52015-02-28 15:16:42 -030024#include <usb.h>
Otavio Salvador4579dc32015-02-17 10:42:46 -020025
26DECLARE_GLOBAL_DATA_PTR;
27
28#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
29 PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
30 PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
31 PAD_CTL_LVE)
32
33#define USDHC_PAD_CTRL (PAD_CTL_PUS_22K_UP | \
34 PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
35 PAD_CTL_SRE_FAST | PAD_CTL_HYS | \
36 PAD_CTL_LVE)
37
38int dram_init(void)
39{
40 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
41
42 return 0;
43}
44
45static void setup_iomux_uart(void)
46{
47 static iomux_v3_cfg_t const uart1_pads[] = {
48 MX6_PAD_UART1_TXD__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
49 MX6_PAD_UART1_RXD__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
50 };
51
52 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
53}
54
55static struct fsl_esdhc_cfg usdhc_cfg[1] = {
56 {USDHC2_BASE_ADDR},
57};
58
59int board_mmc_getcd(struct mmc *mmc)
60{
61 return 1; /* Assume boot SD always present */
62}
63
64int board_mmc_init(bd_t *bis)
65{
66 static iomux_v3_cfg_t const usdhc2_pads[] = {
67 MX6_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
68 MX6_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
69 MX6_PAD_SD2_RST__USDHC2_RST | MUX_PAD_CTRL(USDHC_PAD_CTRL),
70 MX6_PAD_SD2_DAT0__USDHC2_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
71 MX6_PAD_SD2_DAT1__USDHC2_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
72 MX6_PAD_SD2_DAT2__USDHC2_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
73 MX6_PAD_SD2_DAT3__USDHC2_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
74 MX6_PAD_SD2_DAT4__USDHC2_DAT4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
75 MX6_PAD_SD2_DAT5__USDHC2_DAT5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
76 MX6_PAD_SD2_DAT6__USDHC2_DAT6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
77 MX6_PAD_SD2_DAT7__USDHC2_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
78 };
79
80 imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
81
82 usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
83 return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
84}
85
Fabio Estevam09ac7b52015-02-28 15:16:42 -030086int board_usb_phy_mode(int port)
87{
88 return USB_INIT_DEVICE;
89}
90
Otavio Salvador4579dc32015-02-17 10:42:46 -020091int board_early_init_f(void)
92{
93 setup_iomux_uart();
94 return 0;
95}
96
97int board_init(void)
98{
99 /* address of boot parameters */
100 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
101
102 return 0;
103}
104
105int board_late_init(void)
106{
107#ifdef CONFIG_HW_WATCHDOG
108 hw_watchdog_init();
109#endif
110
111 return 0;
112}
113
114int checkboard(void)
115{
116 puts("Board: WaRP Board\n");
117
118 return 0;
119}