Albert Aribaud | ce9c227 | 2010-06-17 19:38:21 +0530 | [diff] [blame] | 1 | /* |
Albert ARIBAUD | 57b4bce | 2011-04-22 19:41:02 +0200 | [diff] [blame] | 2 | * Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net> |
Albert Aribaud | ce9c227 | 2010-06-17 19:38:21 +0530 | [diff] [blame] | 3 | * |
| 4 | * (C) Copyright 2009 |
| 5 | * Marvell Semiconductor <www.marvell.com> |
| 6 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 7 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Albert Aribaud | ce9c227 | 2010-06-17 19:38:21 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <miiphy.h> |
| 13 | #include <asm/arch/orion5x.h> |
Wolfgang Denk | 85e04b7 | 2011-12-09 12:14:28 +0100 | [diff] [blame] | 14 | #include "../common/common.h" |
Albert ARIBAUD | 9608e7d | 2015-01-31 22:55:38 +0100 | [diff] [blame] | 15 | #include <spl.h> |
| 16 | #include <ns16550.h> |
Albert Aribaud | ce9c227 | 2010-06-17 19:38:21 +0530 | [diff] [blame] | 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
Albert Aribaud | ce9c227 | 2010-06-17 19:38:21 +0530 | [diff] [blame] | 20 | int board_init(void) |
| 21 | { |
| 22 | /* arch number of board */ |
| 23 | gd->bd->bi_arch_number = MACH_TYPE_EDMINI_V2; |
| 24 | |
| 25 | /* boot parameter start at 256th byte of RAM base */ |
| 26 | gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; |
| 27 | |
| 28 | return 0; |
| 29 | } |
Albert Aribaud | ab9164d | 2010-07-12 22:24:30 +0200 | [diff] [blame] | 30 | |
| 31 | #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R) |
| 32 | /* Configure and enable MV88E1116 PHY */ |
| 33 | void reset_phy(void) |
| 34 | { |
Simon Guinot | c59c085 | 2012-06-05 13:16:00 +0000 | [diff] [blame] | 35 | mv_phy_88e1116_init("egiga0", 8); |
Albert Aribaud | ab9164d | 2010-07-12 22:24:30 +0200 | [diff] [blame] | 36 | } |
| 37 | #endif /* CONFIG_RESET_PHY_R */ |
Albert ARIBAUD | 9608e7d | 2015-01-31 22:55:38 +0100 | [diff] [blame] | 38 | |
| 39 | /* |
| 40 | * SPL serial setup and NOR boot device selection |
| 41 | */ |
| 42 | |
| 43 | #ifdef CONFIG_SPL_BUILD |
| 44 | |
| 45 | void spl_board_init(void) |
| 46 | { |
| 47 | preloader_console_init(); |
| 48 | } |
| 49 | |
| 50 | u32 spl_boot_device(void) |
| 51 | { |
| 52 | return BOOT_DEVICE_NOR; |
| 53 | } |
| 54 | |
| 55 | #endif /* CONFIG_SPL_BUILD */ |