blob: 51972cb7cb3f6d833ebc19b71959cf7166fef689 [file] [log] [blame]
Mingkai Hu3b75e982013-07-04 17:30:36 +08001/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
York Sun3aab0cd2013-08-12 14:57:12 -07004 * SPDX-License-Identifier: GPL-2.0+
Mingkai Hu3b75e982013-07-04 17:30:36 +08005 */
6
7#include <config.h>
8#include <common.h>
9#include <asm/io.h>
10#include <asm/immap_85xx.h>
11#include <asm/fsl_serdes.h>
12
13#define SRDS1_MAX_LANES 4
14
15static u32 serdes1_prtcl_map;
16
17struct serdes_config {
18 u32 protocol;
19 u8 lanes[SRDS1_MAX_LANES];
20};
21
22static const struct serdes_config serdes1_cfg_tbl[] = {
23 /* SerDes 1 */
24 {1, {PCIE1, PCIE1, PCIE1, PCIE1} },
25 {2, {PCIE1, PCIE1, PCIE1, PCIE1} },
26 {3, {PCIE1, PCIE1, NONE, NONE} },
27 {4, {PCIE1, PCIE1, NONE, NONE} },
28 {5, {PCIE1, NONE, NONE, NONE} },
29 {6, {PCIE1, NONE, NONE, NONE} },
30 {}
31};
32
33int is_serdes_configured(enum srds_prtcl device)
34{
35 return (1 << device) & serdes1_prtcl_map;
36}
37
38void fsl_serdes_init(void)
39{
40 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
41 u32 pordevsr = in_be32(&gur->pordevsr);
42 u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
43 MPC85xx_PORDEVSR_IO_SEL_SHIFT;
44 const struct serdes_config *ptr;
45 int lane;
46
47 debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
48
49 if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
50 printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
51 return;
52 }
53
54 ptr = &serdes1_cfg_tbl[srds_cfg];
55 if (!ptr->protocol)
56 return;
57
58 for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
59 enum srds_prtcl lane_prtcl = ptr->lanes[lane];
60 serdes1_prtcl_map |= (1 << lane_prtcl);
61 }
62}