blob: 2b38b50a9d5b52d6cb6a8bb71088ccb0192c1e17 [file] [log] [blame]
J. German Riverab940ca62014-06-23 15:15:55 -07001/*
2 * Copyright (C) 2014 Freescale Semiconductor
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6#include <errno.h>
7#include <asm/io.h>
J. German Rivera7b3bd9a2015-01-06 13:19:02 -08008#include <fsl-mc/fsl_mc.h>
9#include <fsl-mc/fsl_mc_sys.h>
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -070010#include <fsl-mc/fsl_mc_private.h>
J. German Rivera7b3bd9a2015-01-06 13:19:02 -080011#include <fsl-mc/fsl_dpmng.h>
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -070012#include <fsl-mc/fsl_dprc.h>
13#include <fsl-mc/fsl_dpio.h>
14#include <fsl-mc/fsl_qbman_portal.h>
J. German Riverab940ca62014-06-23 15:15:55 -070015
J. German Rivera125e2bc2015-03-20 19:28:18 -070016#define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
17#define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
18#define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
19
20#define MC_MEM_SIZE_ENV_VAR "mcmemsize"
21#define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
22
J. German Riverab940ca62014-06-23 15:15:55 -070023DECLARE_GLOBAL_DATA_PTR;
24static int mc_boot_status;
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -070025struct fsl_mc_io *dflt_mc_io = NULL;
26uint16_t dflt_dprc_handle = 0;
27struct fsl_dpbp_obj *dflt_dpbp = NULL;
28struct fsl_dpio_obj *dflt_dpio = NULL;
J. German Rivera125e2bc2015-03-20 19:28:18 -070029uint16_t dflt_dpio_handle = 0;
J. German Riverab940ca62014-06-23 15:15:55 -070030
J. German Rivera125e2bc2015-03-20 19:28:18 -070031#ifdef DEBUG
32void dump_ram_words(const char *title, void *addr)
33{
34 int i;
35 uint32_t *words = addr;
36
37 printf("Dumping beginning of %s (%p):\n", title, addr);
38 for (i = 0; i < 16; i++)
39 printf("%#x ", words[i]);
40
41 printf("\n");
42}
43
44void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
45{
46 printf("MC CCSR registers:\n"
47 "reg_gcr1 %#x\n"
48 "reg_gsr %#x\n"
49 "reg_sicbalr %#x\n"
50 "reg_sicbahr %#x\n"
51 "reg_sicapr %#x\n"
52 "reg_mcfbalr %#x\n"
53 "reg_mcfbahr %#x\n"
54 "reg_mcfapr %#x\n"
55 "reg_psr %#x\n",
56 mc_ccsr_regs->reg_gcr1,
57 mc_ccsr_regs->reg_gsr,
58 mc_ccsr_regs->reg_sicbalr,
59 mc_ccsr_regs->reg_sicbahr,
60 mc_ccsr_regs->reg_sicapr,
61 mc_ccsr_regs->reg_mcfbalr,
62 mc_ccsr_regs->reg_mcfbahr,
63 mc_ccsr_regs->reg_mcfapr,
64 mc_ccsr_regs->reg_psr);
65}
66#else
67
68#define dump_ram_words(title, addr)
69#define dump_mc_ccsr_regs(mc_ccsr_regs)
70
71#endif /* DEBUG */
72
73#ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
J. German Riverab940ca62014-06-23 15:15:55 -070074/**
75 * Copying MC firmware or DPL image to DDR
76 */
77static int mc_copy_image(const char *title,
J. German Rivera7b3bd9a2015-01-06 13:19:02 -080078 u64 image_addr, u32 image_size, u64 mc_ram_addr)
J. German Riverab940ca62014-06-23 15:15:55 -070079{
80 debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
81 memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
J. German Rivera125e2bc2015-03-20 19:28:18 -070082 flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
J. German Riverab940ca62014-06-23 15:15:55 -070083 return 0;
84}
85
86/**
87 * MC firmware FIT image parser checks if the image is in FIT
88 * format, verifies integrity of the image and calculates
89 * raw image address and size values.
J. German Rivera7b3bd9a2015-01-06 13:19:02 -080090 * Returns 0 on success and a negative errno on error.
J. German Riverab940ca62014-06-23 15:15:55 -070091 * task fail.
92 **/
J. German Riverab940ca62014-06-23 15:15:55 -070093int parse_mc_firmware_fit_image(const void **raw_image_addr,
94 size_t *raw_image_size)
95{
96 int format;
97 void *fit_hdr;
98 int node_offset;
99 const void *data;
100 size_t size;
101 const char *uname = "firmware";
102
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800103 /* Check if the image is in NOR flash */
J. German Riverab940ca62014-06-23 15:15:55 -0700104#ifdef CONFIG_SYS_LS_MC_FW_IN_NOR
105 fit_hdr = (void *)CONFIG_SYS_LS_MC_FW_ADDR;
106#else
107#error "No CONFIG_SYS_LS_MC_FW_IN_xxx defined"
108#endif
109
110 /* Check if Image is in FIT format */
111 format = genimg_get_format(fit_hdr);
112
113 if (format != IMAGE_FORMAT_FIT) {
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800114 printf("fsl-mc: ERROR: Bad firmware image (not a FIT image)\n");
115 return -EINVAL;
J. German Riverab940ca62014-06-23 15:15:55 -0700116 }
117
118 if (!fit_check_format(fit_hdr)) {
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800119 printf("fsl-mc: ERROR: Bad firmware image (bad FIT header)\n");
120 return -EINVAL;
J. German Riverab940ca62014-06-23 15:15:55 -0700121 }
122
123 node_offset = fit_image_get_node(fit_hdr, uname);
124
125 if (node_offset < 0) {
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800126 printf("fsl-mc: ERROR: Bad firmware image (missing subimage)\n");
127 return -ENOENT;
J. German Riverab940ca62014-06-23 15:15:55 -0700128 }
129
130 /* Verify MC firmware image */
131 if (!(fit_image_verify(fit_hdr, node_offset))) {
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800132 printf("fsl-mc: ERROR: Bad firmware image (bad CRC)\n");
133 return -EINVAL;
J. German Riverab940ca62014-06-23 15:15:55 -0700134 }
135
136 /* Get address and size of raw image */
137 fit_image_get_data(fit_hdr, node_offset, &data, &size);
138
139 *raw_image_addr = data;
140 *raw_image_size = size;
141
142 return 0;
143}
J. German Rivera125e2bc2015-03-20 19:28:18 -0700144#endif
145
146/*
147 * Calculates the values to be used to specify the address range
148 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
149 * It returns the highest 512MB-aligned address within the given
150 * address range, in '*aligned_base_addr', and the number of 256 MiB
151 * blocks in it, in 'num_256mb_blocks'.
152 */
153static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
154 size_t mc_ram_size,
155 u64 *aligned_base_addr,
156 u8 *num_256mb_blocks)
157{
158 u64 addr;
159 u16 num_blocks;
160
161 if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
162 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
163 mc_ram_size);
164 return -EINVAL;
165 }
166
167 num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
168 if (num_blocks < 1 || num_blocks > 0xff) {
169 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
170 mc_ram_size);
171 return -EINVAL;
172 }
173
174 addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
175 MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
176
177 if (addr < mc_private_ram_start_addr) {
178 printf("fsl-mc: ERROR: bad start address %#llx\n",
179 mc_private_ram_start_addr);
180 return -EFAULT;
181 }
182
183 *aligned_base_addr = addr;
184 *num_256mb_blocks = num_blocks;
185 return 0;
186}
187
188static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size)
189{
190 u64 mc_dpc_offset;
191#ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
192 int error;
193 void *dpc_fdt_hdr;
194 int dpc_size;
195#endif
196
197#ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
198 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
199 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
200
201 mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
202#else
203#error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
204#endif
205
206 /*
207 * Load the MC DPC blob in the MC private DRAM block:
208 */
209#ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
210 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
211#else
212 /*
213 * Get address and size of the DPC blob stored in flash:
214 */
215#ifdef CONFIG_SYS_LS_MC_DPC_IN_NOR
216 dpc_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPC_ADDR;
217#else
218#error "No CONFIG_SYS_LS_MC_DPC_IN_xxx defined"
219#endif
220
221 error = fdt_check_header(dpc_fdt_hdr);
222 if (error != 0) {
223 /*
224 * Don't return with error here, since the MC firmware can
225 * still boot without a DPC
226 */
J. German Riveracc088c32015-07-02 11:28:56 +0530227 printf("\nfsl-mc: WARNING: No DPC image found");
J. German Rivera125e2bc2015-03-20 19:28:18 -0700228 return 0;
229 }
230
231 dpc_size = fdt_totalsize(dpc_fdt_hdr);
232 if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
J. German Riveracc088c32015-07-02 11:28:56 +0530233 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
J. German Rivera125e2bc2015-03-20 19:28:18 -0700234 dpc_size);
235 return -EINVAL;
236 }
237
238 mc_copy_image("MC DPC blob",
239 (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
240#endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
241
242 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
243 return 0;
244}
245
246static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size)
247{
248 u64 mc_dpl_offset;
249#ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
250 int error;
251 void *dpl_fdt_hdr;
252 int dpl_size;
253#endif
254
255#ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
256 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
257 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
258
259 mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
260#else
261#error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
262#endif
263
264 /*
265 * Load the MC DPL blob in the MC private DRAM block:
266 */
267#ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
268 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
269#else
270 /*
271 * Get address and size of the DPL blob stored in flash:
272 */
273#ifdef CONFIG_SYS_LS_MC_DPL_IN_NOR
274 dpl_fdt_hdr = (void *)CONFIG_SYS_LS_MC_DPL_ADDR;
275#else
276#error "No CONFIG_SYS_LS_MC_DPL_IN_xxx defined"
277#endif
278
279 error = fdt_check_header(dpl_fdt_hdr);
280 if (error != 0) {
J. German Riveracc088c32015-07-02 11:28:56 +0530281 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
J. German Rivera125e2bc2015-03-20 19:28:18 -0700282 return error;
283 }
284
285 dpl_size = fdt_totalsize(dpl_fdt_hdr);
286 if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
J. German Riveracc088c32015-07-02 11:28:56 +0530287 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
J. German Rivera125e2bc2015-03-20 19:28:18 -0700288 dpl_size);
289 return -EINVAL;
290 }
291
292 mc_copy_image("MC DPL blob",
293 (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
294#endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
295
296 dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
297 return 0;
298}
299
300/**
301 * Return the MC boot timeout value in milliseconds
302 */
303static unsigned long get_mc_boot_timeout_ms(void)
304{
305 unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
306
307 char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
308
309 if (timeout_ms_env_var) {
310 timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
311 if (timeout_ms == 0) {
312 printf("fsl-mc: WARNING: Invalid value for \'"
313 MC_BOOT_TIMEOUT_ENV_VAR
314 "\' environment variable: %lu\n",
315 timeout_ms);
316
317 timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
318 }
319 }
320
321 return timeout_ms;
322}
323
J. German Riverac1000c12015-07-02 11:28:58 +0530324#ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
325static int load_mc_aiop_img(u64 mc_ram_addr, size_t mc_ram_size)
326{
327 void *aiop_img;
328
329 /*
330 * Load the MC AIOP image in the MC private DRAM block:
331 */
332
333 aiop_img = (void *)CONFIG_SYS_LS_MC_AIOP_IMG_ADDR;
334 mc_copy_image("MC AIOP image",
335 (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
336 mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
337
338 return 0;
339}
340#endif
J. German Rivera125e2bc2015-03-20 19:28:18 -0700341static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
342{
343 u32 reg_gsr;
344 u32 mc_fw_boot_status;
345 unsigned long timeout_ms = get_mc_boot_timeout_ms();
346 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
347
348 dmb();
J. German Rivera125e2bc2015-03-20 19:28:18 -0700349 assert(timeout_ms > 0);
350 for (;;) {
351 udelay(1000); /* throttle polling */
352 reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
353 mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
354 if (mc_fw_boot_status & 0x1)
355 break;
356
357 timeout_ms--;
358 if (timeout_ms == 0)
359 break;
360 }
361
362 if (timeout_ms == 0) {
J. German Riveracc088c32015-07-02 11:28:56 +0530363 printf("ERROR: timeout\n");
J. German Rivera125e2bc2015-03-20 19:28:18 -0700364
365 /* TODO: Get an error status from an MC CCSR register */
366 return -ETIMEDOUT;
367 }
368
369 if (mc_fw_boot_status != 0x1) {
370 /*
371 * TODO: Identify critical errors from the GSR register's FS
372 * field and for those errors, set error to -ENODEV or other
373 * appropriate errno, so that the status property is set to
374 * failure in the fsl,dprc device tree node.
375 */
J. German Riveracc088c32015-07-02 11:28:56 +0530376 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
377 reg_gsr);
378 } else {
379 printf("SUCCESS\n");
J. German Rivera125e2bc2015-03-20 19:28:18 -0700380 }
381
J. German Riveracc088c32015-07-02 11:28:56 +0530382
J. German Rivera125e2bc2015-03-20 19:28:18 -0700383 *final_reg_gsr = reg_gsr;
384 return 0;
385}
J. German Riverab940ca62014-06-23 15:15:55 -0700386
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700387int mc_init(void)
J. German Riverab940ca62014-06-23 15:15:55 -0700388{
389 int error = 0;
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700390 int portal_id = 0;
J. German Riverab940ca62014-06-23 15:15:55 -0700391 struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
392 u64 mc_ram_addr;
J. German Riverab940ca62014-06-23 15:15:55 -0700393 u32 reg_gsr;
J. German Rivera125e2bc2015-03-20 19:28:18 -0700394 u32 reg_mcfbalr;
395#ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
J. German Riverab940ca62014-06-23 15:15:55 -0700396 const void *raw_image_addr;
397 size_t raw_image_size = 0;
J. German Rivera125e2bc2015-03-20 19:28:18 -0700398#endif
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800399 struct mc_version mc_ver_info;
J. German Rivera125e2bc2015-03-20 19:28:18 -0700400 u64 mc_ram_aligned_base_addr;
401 u8 mc_ram_num_256mb_blocks;
402 size_t mc_ram_size = mc_get_dram_block_size();
J. German Riverab940ca62014-06-23 15:15:55 -0700403
404 /*
405 * The MC private DRAM block was already carved at the end of DRAM
406 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
407 */
408 if (gd->bd->bi_dram[1].start) {
409 mc_ram_addr =
410 gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
411 } else {
412 mc_ram_addr =
413 gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
414 }
415
J. German Rivera125e2bc2015-03-20 19:28:18 -0700416 error = calculate_mc_private_ram_params(mc_ram_addr,
417 mc_ram_size,
418 &mc_ram_aligned_base_addr,
419 &mc_ram_num_256mb_blocks);
420 if (error != 0)
421 goto out;
422
J. German Riverab940ca62014-06-23 15:15:55 -0700423 /*
424 * Management Complex cores should be held at reset out of POR.
425 * U-boot should be the first software to touch MC. To be safe,
426 * we reset all cores again by setting GCR1 to 0. It doesn't do
427 * anything if they are held at reset. After we setup the firmware
428 * we kick off MC by deasserting the reset bit for core 0, and
429 * deasserting the reset bits for Command Portal Managers.
430 * The stop bits are not touched here. They are used to stop the
431 * cores when they are active. Setting stop bits doesn't stop the
432 * cores from fetching instructions when they are released from
433 * reset.
434 */
435 out_le32(&mc_ccsr_regs->reg_gcr1, 0);
436 dmb();
437
J. German Rivera125e2bc2015-03-20 19:28:18 -0700438#ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
439 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
440#else
J. German Riverab940ca62014-06-23 15:15:55 -0700441 error = parse_mc_firmware_fit_image(&raw_image_addr, &raw_image_size);
442 if (error != 0)
443 goto out;
444 /*
445 * Load the MC FW at the beginning of the MC private DRAM block:
446 */
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800447 mc_copy_image("MC Firmware",
448 (u64)raw_image_addr, raw_image_size, mc_ram_addr);
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800449#endif
J. German Rivera125e2bc2015-03-20 19:28:18 -0700450 dump_ram_words("firmware", (void *)mc_ram_addr);
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800451
J. German Rivera125e2bc2015-03-20 19:28:18 -0700452 error = load_mc_dpc(mc_ram_addr, mc_ram_size);
453 if (error != 0)
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800454 goto out;
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800455
J. German Rivera125e2bc2015-03-20 19:28:18 -0700456 error = load_mc_dpl(mc_ram_addr, mc_ram_size);
457 if (error != 0)
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800458 goto out;
J. German Riverab940ca62014-06-23 15:15:55 -0700459
J. German Riverac1000c12015-07-02 11:28:58 +0530460#ifdef CONFIG_SYS_LS_MC_AIOP_IMG_IN_NOR
461 error = load_mc_aiop_img(mc_ram_addr, mc_ram_size);
462 if (error != 0)
463 goto out;
464#endif
465
J. German Riverab940ca62014-06-23 15:15:55 -0700466 debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
J. German Rivera125e2bc2015-03-20 19:28:18 -0700467 dump_mc_ccsr_regs(mc_ccsr_regs);
J. German Riverab940ca62014-06-23 15:15:55 -0700468
469 /*
J. German Rivera125e2bc2015-03-20 19:28:18 -0700470 * Tell MC what is the address range of the DRAM block assigned to it:
J. German Riverab940ca62014-06-23 15:15:55 -0700471 */
J. German Rivera125e2bc2015-03-20 19:28:18 -0700472 reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
473 (mc_ram_num_256mb_blocks - 1);
474 out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
475 out_le32(&mc_ccsr_regs->reg_mcfbahr,
476 (u32)(mc_ram_aligned_base_addr >> 32));
J. German Riverab940ca62014-06-23 15:15:55 -0700477 out_le32(&mc_ccsr_regs->reg_mcfapr, MCFAPR_BYPASS_ICID_MASK);
478
479 /*
J. German Rivera125e2bc2015-03-20 19:28:18 -0700480 * Tell the MC that we want delayed DPL deployment.
J. German Riverab940ca62014-06-23 15:15:55 -0700481 */
J. German Rivera125e2bc2015-03-20 19:28:18 -0700482 out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
J. German Riverab940ca62014-06-23 15:15:55 -0700483
J. German Riveracc088c32015-07-02 11:28:56 +0530484 printf("\nfsl-mc: Booting Management Complex ... ");
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800485
J. German Riverab940ca62014-06-23 15:15:55 -0700486 /*
487 * Deassert reset and release MC core 0 to run
488 */
489 out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
J. German Rivera125e2bc2015-03-20 19:28:18 -0700490 error = wait_for_mc(true, &reg_gsr);
491 if (error != 0)
J. German Riverab940ca62014-06-23 15:15:55 -0700492 goto out;
J. German Riverab940ca62014-06-23 15:15:55 -0700493
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800494 /*
495 * TODO: need to obtain the portal_id for the root container from the
496 * DPL
497 */
498 portal_id = 0;
499
500 /*
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700501 * Initialize the global default MC portal
502 * And check that the MC firmware is responding portal commands:
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800503 */
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700504 dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
505 if (!dflt_mc_io) {
506 printf(" No memory: malloc() failed\n");
507 return -ENOMEM;
508 }
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800509
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700510 dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
511 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
512 portal_id, dflt_mc_io->mmio_regs);
513
514 error = mc_get_version(dflt_mc_io, &mc_ver_info);
J. German Rivera7b3bd9a2015-01-06 13:19:02 -0800515 if (error != 0) {
516 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
517 error);
518 goto out;
519 }
520
521 if (MC_VER_MAJOR != mc_ver_info.major)
522 printf("fsl-mc: ERROR: Firmware major version mismatch (found: %d, expected: %d)\n",
523 mc_ver_info.major, MC_VER_MAJOR);
524
525 if (MC_VER_MINOR != mc_ver_info.minor)
526 printf("fsl-mc: WARNING: Firmware minor version mismatch (found: %d, expected: %d)\n",
527 mc_ver_info.minor, MC_VER_MINOR);
528
529 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
530 mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
J. German Rivera125e2bc2015-03-20 19:28:18 -0700531 reg_gsr & GSR_FS_MASK);
532
533 /*
534 * Tell the MC to deploy the DPL:
535 */
536 out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
J. German Riveracc088c32015-07-02 11:28:56 +0530537 printf("fsl-mc: Deploying data path layout ... ");
J. German Rivera125e2bc2015-03-20 19:28:18 -0700538 error = wait_for_mc(false, &reg_gsr);
539 if (error != 0)
540 goto out;
J. German Riveracc088c32015-07-02 11:28:56 +0530541
J. German Riverab940ca62014-06-23 15:15:55 -0700542out:
543 if (error != 0)
544 mc_boot_status = -error;
545 else
546 mc_boot_status = 0;
547
548 return error;
549}
550
551int get_mc_boot_status(void)
552{
553 return mc_boot_status;
554}
555
556/**
557 * Return the actual size of the MC private DRAM block.
J. German Riverab940ca62014-06-23 15:15:55 -0700558 */
559unsigned long mc_get_dram_block_size(void)
560{
J. German Rivera125e2bc2015-03-20 19:28:18 -0700561 unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
562
563 char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
564
565 if (dram_block_size_env_var) {
566 dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
567 10);
568
569 if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
570 printf("fsl-mc: WARNING: Invalid value for \'"
571 MC_MEM_SIZE_ENV_VAR
572 "\' environment variable: %lu\n",
573 dram_block_size);
574
575 dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
576 }
577 }
578
579 return dram_block_size;
J. German Riverab940ca62014-06-23 15:15:55 -0700580}
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700581
582int dpio_init(struct dprc_obj_desc obj_desc)
583{
584 struct qbman_swp_desc p_des;
585 struct dpio_attr attr;
586 int err = 0;
587
588 dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
589 if (!dflt_dpio) {
590 printf(" No memory: malloc() failed\n");
591 return -ENOMEM;
592 }
593
594 dflt_dpio->dpio_id = obj_desc.id;
595
596 err = dpio_open(dflt_mc_io, obj_desc.id, &dflt_dpio_handle);
597 if (err) {
598 printf("dpio_open() failed\n");
599 goto err_open;
600 }
601
602 err = dpio_get_attributes(dflt_mc_io, dflt_dpio_handle, &attr);
603 if (err) {
604 printf("dpio_get_attributes() failed %d\n", err);
605 goto err_get_attr;
606 }
607
608 err = dpio_enable(dflt_mc_io, dflt_dpio_handle);
609 if (err) {
610 printf("dpio_enable() failed %d\n", err);
611 goto err_get_enable;
612 }
613 debug("ce_paddr=0x%llx, ci_paddr=0x%llx, portalid=%d, prios=%d\n",
614 attr.qbman_portal_ce_paddr,
615 attr.qbman_portal_ci_paddr,
616 attr.qbman_portal_id,
617 attr.num_priorities);
618
619 p_des.cena_bar = (void *)attr.qbman_portal_ce_paddr;
620 p_des.cinh_bar = (void *)attr.qbman_portal_ci_paddr;
621
622 dflt_dpio->sw_portal = qbman_swp_init(&p_des);
623 if (dflt_dpio->sw_portal == NULL) {
624 printf("qbman_swp_init() failed\n");
625 goto err_get_swp_init;
626 }
627 return 0;
628
629err_get_swp_init:
630err_get_enable:
631 dpio_disable(dflt_mc_io, dflt_dpio_handle);
632err_get_attr:
633 dpio_close(dflt_mc_io, dflt_dpio_handle);
634err_open:
635 free(dflt_dpio);
636 return err;
637}
638
639int dpbp_init(struct dprc_obj_desc obj_desc)
640{
641 dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
642 if (!dflt_dpbp) {
643 printf(" No memory: malloc() failed\n");
644 return -ENOMEM;
645 }
646 dflt_dpbp->dpbp_attr.id = obj_desc.id;
647
648 return 0;
649}
650
Prabhakar Kushwahac5177712015-03-19 09:20:46 -0700651int dprc_init_container_obj(struct dprc_obj_desc obj_desc, uint16_t dprc_handle)
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700652{
Prabhakar Kushwahac5177712015-03-19 09:20:46 -0700653 int error = 0, state = 0;
654 struct dprc_endpoint dpni_endpoint, dpmac_endpoint;
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700655 if (!strcmp(obj_desc.type, "dpbp")) {
656 if (!dflt_dpbp) {
657 error = dpbp_init(obj_desc);
658 if (error < 0)
659 printf("dpbp_init failed\n");
660 }
661 } else if (!strcmp(obj_desc.type, "dpio")) {
662 if (!dflt_dpio) {
663 error = dpio_init(obj_desc);
664 if (error < 0)
665 printf("dpio_init failed\n");
666 }
Prabhakar Kushwahac5177712015-03-19 09:20:46 -0700667 } else if (!strcmp(obj_desc.type, "dpni")) {
668 strcpy(dpni_endpoint.type, obj_desc.type);
669 dpni_endpoint.id = obj_desc.id;
670 error = dprc_get_connection(dflt_mc_io, dprc_handle,
671 &dpni_endpoint, &dpmac_endpoint, &state);
672 if (!strcmp(dpmac_endpoint.type, "dpmac"))
673 error = ldpaa_eth_init(obj_desc);
674 if (error < 0)
675 printf("ldpaa_eth_init failed\n");
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700676 }
677
678 return error;
679}
680
681int dprc_scan_container_obj(uint16_t dprc_handle, char *obj_type, int i)
682{
683 int error = 0;
684 struct dprc_obj_desc obj_desc;
685
686 memset((void *)&obj_desc, 0x00, sizeof(struct dprc_obj_desc));
687
688 error = dprc_get_obj(dflt_mc_io, dprc_handle,
689 i, &obj_desc);
690 if (error < 0) {
691 printf("dprc_get_obj(i=%d) failed: %d\n",
692 i, error);
693 return error;
694 }
695
696 if (!strcmp(obj_desc.type, obj_type)) {
697 debug("Discovered object: type %s, id %d, req %s\n",
698 obj_desc.type, obj_desc.id, obj_type);
699
Prabhakar Kushwahac5177712015-03-19 09:20:46 -0700700 error = dprc_init_container_obj(obj_desc, dprc_handle);
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700701 if (error < 0) {
702 printf("dprc_init_container_obj(i=%d) failed: %d\n",
703 i, error);
704 return error;
705 }
706 }
707
708 return error;
709}
710
711int fsl_mc_ldpaa_init(bd_t *bis)
712{
713 int i, error = 0;
714 int dprc_opened = 0, container_id;
715 int num_child_objects = 0;
716
717 error = mc_init();
J. German Rivera125e2bc2015-03-20 19:28:18 -0700718 if (error < 0)
719 goto error;
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700720
721 error = dprc_get_container_id(dflt_mc_io, &container_id);
722 if (error < 0) {
723 printf("dprc_get_container_id() failed: %d\n", error);
724 goto error;
725 }
726
727 debug("fsl-mc: Container id=0x%x\n", container_id);
728
729 error = dprc_open(dflt_mc_io, container_id, &dflt_dprc_handle);
730 if (error < 0) {
731 printf("dprc_open() failed: %d\n", error);
732 goto error;
733 }
734 dprc_opened = true;
735
736 error = dprc_get_obj_count(dflt_mc_io,
737 dflt_dprc_handle,
738 &num_child_objects);
739 if (error < 0) {
740 printf("dprc_get_obj_count() failed: %d\n", error);
741 goto error;
742 }
743 debug("Total child in container %d = %d\n", container_id,
744 num_child_objects);
745
746 if (num_child_objects != 0) {
747 /*
748 * Discover objects currently in the DPRC container in the MC:
749 */
750 for (i = 0; i < num_child_objects; i++)
751 error = dprc_scan_container_obj(dflt_dprc_handle,
752 "dpbp", i);
753
754 for (i = 0; i < num_child_objects; i++)
755 error = dprc_scan_container_obj(dflt_dprc_handle,
756 "dpio", i);
757
758 for (i = 0; i < num_child_objects; i++)
759 error = dprc_scan_container_obj(dflt_dprc_handle,
760 "dpni", i);
761 }
762error:
763 if (dprc_opened)
764 dprc_close(dflt_mc_io, dflt_dprc_handle);
765
766 return error;
767}
768
769void fsl_mc_ldpaa_exit(bd_t *bis)
770{
771 int err;
772
J. German Rivera125e2bc2015-03-20 19:28:18 -0700773 if (get_mc_boot_status() == 0) {
774 err = dpio_disable(dflt_mc_io, dflt_dpio_handle);
775 if (err < 0) {
776 printf("dpio_disable() failed: %d\n", err);
777 return;
778 }
779 err = dpio_reset(dflt_mc_io, dflt_dpio_handle);
780 if (err < 0) {
781 printf("dpio_reset() failed: %d\n", err);
782 return;
783 }
784 err = dpio_close(dflt_mc_io, dflt_dpio_handle);
785 if (err < 0) {
786 printf("dpio_close() failed: %d\n", err);
787 return;
788 }
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700789
J. German Rivera125e2bc2015-03-20 19:28:18 -0700790 free(dflt_dpio);
791 free(dflt_dpbp);
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700792 }
793
J. German Rivera125e2bc2015-03-20 19:28:18 -0700794 if (dflt_mc_io)
795 free(dflt_mc_io);
Prabhakar Kushwahaa2a55e52015-03-19 09:20:45 -0700796}