blob: 30e05da57455ba606e03a1b05fb36c7b151b08e0 [file] [log] [blame]
Troy Kiskyc30eab22012-10-22 16:40:39 +00001U-boot config options used in fec_mxc.c
2
3CONFIG_FEC_MXC
Olaf Mandel95c69222015-05-28 14:59:18 +02004 Selects fec_mxc.c to be compiled into u-boot. Can read out the
5 ethaddr from the SoC eFuses (see below).
Troy Kiskyc30eab22012-10-22 16:40:39 +00006
7CONFIG_MII
8 Must be defined if CONFIG_FEC_MXC is defined.
9
10CONFIG_FEC_XCV_TYPE
11 Defaults to MII100 for 100 Base-tx.
12 RGMII selects 1000 Base-tx reduced pin count interface.
13 RMII selects 100 Base-tx reduced pin count interface.
14
15CONFIG_FEC_MXC_SWAP_PACKET
16 Forced on iff MX28.
17 Swaps the bytes order of all words(4 byte units) in the packet.
18 This should not be specified by a board file. It is cpu specific.
19
20CONFIG_PHYLIB
21 fec_mxc supports PHYLIB and should be used for new boards.
22
23CONFIG_FEC_MXC_NO_ANEG
24 Relevant only if PHYLIB not used. Skips auto-negotiation restart.
25
26CONFIG_FEC_MXC_PHYADDR
27 Optional, selects the exact phy address that should be connected
28 and function fecmxc_initialize will try to initialize it.
Olaf Mandel95c69222015-05-28 14:59:18 +020029
30
31Reading the ethaddr from the SoC eFuses:
32if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
33ethaddr variable, then its value gets read from the corresponding eFuses in
34the SoC. See the README files of the specific SoC for details.