| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 2 | CONFIG_ARCH_ZYNQMP=y |
| 3 | CONFIG_SYS_TEXT_BASE=0x8000000 |
| 4 | CONFIG_SYS_MALLOC_F_LEN=0x8000 |
| 5 | CONFIG_SPL=y |
| Michal Simek | dcd8a10 | 2018-06-04 08:33:30 +0200 | [diff] [blame] | 6 | CONFIG_DEBUG_UART_BASE=0xff000000 |
| 7 | CONFIG_DEBUG_UART_CLOCK=100000000 |
| Michal Simek | cbe3101 | 2019-09-10 11:48:52 +0200 | [diff] [blame] | 8 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 9 | CONFIG_SPL_SPI_SUPPORT=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 10 | CONFIG_ZYNQMP_USB=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 11 | CONFIG_DEBUG_UART=y |
| 12 | CONFIG_AHCI=y |
| 13 | CONFIG_DISTRO_DEFAULTS=y |
| 14 | CONFIG_FIT=y |
| 15 | CONFIG_FIT_VERBOSE=y |
| 16 | CONFIG_SPL_LOAD_FIT=y |
| 17 | # CONFIG_DISPLAY_CPUINFO is not set |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 18 | CONFIG_SPL_OS_BOOT=y |
| 19 | CONFIG_SPL_RAM_SUPPORT=y |
| 20 | CONFIG_SPL_RAM_DEVICE=y |
| Michal Simek | cbe3101 | 2019-09-10 11:48:52 +0200 | [diff] [blame] | 21 | CONFIG_SPL_SPI_LOAD=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 22 | CONFIG_SPL_ATF=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 23 | CONFIG_CMD_MEMTEST=y |
| 24 | CONFIG_CMD_CLK=y |
| 25 | CONFIG_CMD_DFU=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 26 | CONFIG_CMD_FPGA_LOADBP=y |
| 27 | CONFIG_CMD_FPGA_LOADP=y |
| Michal Simek | 871ad92 | 2019-01-15 11:01:54 +0100 | [diff] [blame] | 28 | CONFIG_CMD_FPGA_LOAD_SECURE=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 29 | CONFIG_CMD_GPIO=y |
| 30 | CONFIG_CMD_GPT=y |
| 31 | CONFIG_CMD_I2C=y |
| 32 | CONFIG_CMD_MMC=y |
| 33 | CONFIG_CMD_USB=y |
| 34 | CONFIG_CMD_TFTPPUT=y |
| 35 | CONFIG_CMD_TIME=y |
| 36 | CONFIG_CMD_TIMER=y |
| 37 | CONFIG_CMD_EXT4_WRITE=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 38 | CONFIG_SPL_OF_CONTROL=y |
| Tom Rini | 8c5cad0 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 39 | CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu104-revC" |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 40 | CONFIG_ENV_IS_IN_FAT=y |
| Tom Rini | 8d8ee47 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 41 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 42 | CONFIG_NET_RANDOM_ETHADDR=y |
| 43 | CONFIG_SPL_DM=y |
| 44 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| 45 | CONFIG_SCSI_AHCI=y |
| 46 | CONFIG_SATA_CEVA=y |
| 47 | CONFIG_CLK_ZYNQMP=y |
| 48 | CONFIG_DFU_RAM=y |
| 49 | CONFIG_FPGA_XILINX=y |
| 50 | CONFIG_FPGA_ZYNQMPPL=y |
| 51 | CONFIG_DM_GPIO=y |
| Michal Simek | 8bdad43 | 2019-01-18 09:10:39 +0100 | [diff] [blame] | 52 | CONFIG_DM_I2C=y |
| 53 | CONFIG_SYS_I2C_CADENCE=y |
| 54 | CONFIG_I2C_MUX=y |
| 55 | CONFIG_I2C_MUX_PCA954x=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 56 | CONFIG_MISC=y |
| Michal Simek | 8bdad43 | 2019-01-18 09:10:39 +0100 | [diff] [blame] | 57 | CONFIG_I2C_EEPROM=y |
| T Karthik Reddy | 332d185 | 2018-12-03 19:35:09 +0530 | [diff] [blame] | 58 | CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 |
| Michal Simek | 8bdad43 | 2019-01-18 09:10:39 +0100 | [diff] [blame] | 59 | CONFIG_SYS_I2C_EEPROM_ADDR=0x0 |
| 60 | CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0 |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 61 | CONFIG_MMC_SDHCI=y |
| 62 | CONFIG_MMC_SDHCI_ZYNQ=y |
| Michal Simek | 19096ab | 2019-10-15 12:07:30 +0200 | [diff] [blame] | 63 | CONFIG_SPI_FLASH_BAR=y |
| Michal Simek | f854004 | 2019-01-15 10:45:41 +0100 | [diff] [blame] | 64 | CONFIG_SPI_FLASH_ISSI=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 65 | CONFIG_SPI_FLASH_MACRONIX=y |
| 66 | CONFIG_SPI_FLASH_SPANSION=y |
| 67 | CONFIG_SPI_FLASH_STMICRO=y |
| 68 | CONFIG_SPI_FLASH_WINBOND=y |
| 69 | # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set |
| 70 | CONFIG_PHY_MARVELL=y |
| 71 | CONFIG_PHY_NATSEMI=y |
| 72 | CONFIG_PHY_REALTEK=y |
| 73 | CONFIG_PHY_TI=y |
| 74 | CONFIG_PHY_VITESSE=y |
| 75 | CONFIG_PHY_FIXED=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 76 | CONFIG_PHY_GIGE=y |
| Adam Ford | d7869b21 | 2018-07-20 23:03:57 -0500 | [diff] [blame] | 77 | CONFIG_MII=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 78 | CONFIG_ZYNQ_GEM=y |
| 79 | CONFIG_SCSI=y |
| 80 | CONFIG_DM_SCSI=y |
| 81 | CONFIG_DEBUG_UART_ZYNQ=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 82 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 83 | CONFIG_ZYNQ_SERIAL=y |
| Michal Simek | 8ae3fd6 | 2019-01-15 09:30:38 +0100 | [diff] [blame] | 84 | CONFIG_SPI=y |
| 85 | CONFIG_ZYNQMP_GQSPI=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 86 | CONFIG_USB=y |
| 87 | CONFIG_USB_XHCI_HCD=y |
| 88 | CONFIG_USB_XHCI_DWC3=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 89 | CONFIG_USB_DWC3=y |
| Michal Simek | b4af64fd | 2018-05-18 13:15:08 +0200 | [diff] [blame] | 90 | CONFIG_USB_DWC3_GENERIC=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 91 | CONFIG_USB_ULPI_VIEWPORT=y |
| 92 | CONFIG_USB_ULPI=y |
| Michal Simek | f7c8e49 | 2018-03-28 15:36:36 +0200 | [diff] [blame] | 93 | CONFIG_USB_GADGET=y |
| 94 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 95 | CONFIG_EFI_LOADER_BOUNCE_BUFFER=y |