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Kuo-Jung Su3cff8422013-05-08 15:36:26 +08001/*
2 * Faraday I2C Controller
3 *
4 * (C) Copyright 2010 Faraday Technology
5 * Dante Su <dantesu@faraday-tech.com>
6 *
Tom Rini8dde4ca2013-07-24 09:25:40 -04007 * SPDX-License-Identifier: GPL-2.0+
Kuo-Jung Su3cff8422013-05-08 15:36:26 +08008 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <i2c.h>
13
14#include "fti2c010.h"
15
16#ifndef CONFIG_HARD_I2C
17#error "fti2c010: CONFIG_HARD_I2C is not defined"
18#endif
19
20#ifndef CONFIG_SYS_I2C_SPEED
21#define CONFIG_SYS_I2C_SPEED 50000
22#endif
23
24#ifndef CONFIG_FTI2C010_FREQ
25#define CONFIG_FTI2C010_FREQ clk_get_rate("I2C")
26#endif
27
28/* command timeout */
29#define CFG_CMD_TIMEOUT 10 /* ms */
30
31/* 7-bit chip address + 1-bit read/write */
32#define I2C_RD(chip) ((((chip) << 1) & 0xff) | 1)
33#define I2C_WR(chip) (((chip) << 1) & 0xff)
34
35struct fti2c010_chip {
36 void __iomem *regs;
37 uint bus;
38 uint speed;
39};
40
41static struct fti2c010_chip chip_list[] = {
42 {
43 .bus = 0,
44 .regs = (void __iomem *)CONFIG_FTI2C010_BASE,
45 },
46#ifdef CONFIG_I2C_MULTI_BUS
47# ifdef CONFIG_FTI2C010_BASE1
48 {
49 .bus = 1,
50 .regs = (void __iomem *)CONFIG_FTI2C010_BASE1,
51 },
52# endif
53# ifdef CONFIG_FTI2C010_BASE2
54 {
55 .bus = 2,
56 .regs = (void __iomem *)CONFIG_FTI2C010_BASE2,
57 },
58# endif
59# ifdef CONFIG_FTI2C010_BASE3
60 {
61 .bus = 3,
62 .regs = (void __iomem *)CONFIG_FTI2C010_BASE3,
63 },
64# endif
65#endif /* #ifdef CONFIG_I2C_MULTI_BUS */
66};
67
68static struct fti2c010_chip *curr = chip_list;
69
70static int fti2c010_wait(uint32_t mask)
71{
72 int ret = -1;
73 uint32_t stat, ts;
74 struct fti2c010_regs *regs = curr->regs;
75
76 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
77 stat = readl(&regs->sr);
78 if ((stat & mask) == mask) {
79 ret = 0;
80 break;
81 }
82 }
83
84 return ret;
85}
86
87/*
88 * u-boot I2C API
89 */
90
91/*
92 * Initialization, must be called once on start up, may be called
93 * repeatedly to change the speed and slave addresses.
94 */
95void i2c_init(int speed, int slaveaddr)
96{
97 if (speed || !curr->speed)
98 i2c_set_bus_speed(speed);
99
100 /* if slave mode disabled */
101 if (!slaveaddr)
102 return;
103
104 /*
105 * TODO:
106 * Implement slave mode, but is it really necessary?
107 */
108}
109
110/*
111 * Probe the given I2C chip address. Returns 0 if a chip responded,
112 * not 0 on failure.
113 */
114int i2c_probe(uchar chip)
115{
116 int ret;
117 struct fti2c010_regs *regs = curr->regs;
118
119 i2c_init(0, 0);
120
121 /* 1. Select slave device (7bits Address + 1bit R/W) */
122 writel(I2C_WR(chip), &regs->dr);
123 writel(CR_ENABLE | CR_TBEN | CR_START, &regs->cr);
124 ret = fti2c010_wait(SR_DT);
125 if (ret)
126 return ret;
127
128 /* 2. Select device register */
129 writel(0, &regs->dr);
130 writel(CR_ENABLE | CR_TBEN, &regs->cr);
131 ret = fti2c010_wait(SR_DT);
132
133 return ret;
134}
135
136/*
137 * Read/Write interface:
138 * chip: I2C chip address, range 0..127
139 * addr: Memory (register) address within the chip
140 * alen: Number of bytes to use for addr (typically 1, 2 for larger
141 * memories, 0 for register type devices with only one
142 * register)
143 * buffer: Where to read/write the data
144 * len: How many bytes to read/write
145 *
146 * Returns: 0 on success, not 0 on failure
147 */
148int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
149{
150 int ret, pos;
151 uchar paddr[4];
152 struct fti2c010_regs *regs = curr->regs;
153
154 i2c_init(0, 0);
155
156 paddr[0] = (addr >> 0) & 0xFF;
157 paddr[1] = (addr >> 8) & 0xFF;
158 paddr[2] = (addr >> 16) & 0xFF;
159 paddr[3] = (addr >> 24) & 0xFF;
160
161 /*
162 * Phase A. Set register address
163 */
164
165 /* A.1 Select slave device (7bits Address + 1bit R/W) */
166 writel(I2C_WR(chip), &regs->dr);
167 writel(CR_ENABLE | CR_TBEN | CR_START, &regs->cr);
168 ret = fti2c010_wait(SR_DT);
169 if (ret)
170 return ret;
171
172 /* A.2 Select device register */
173 for (pos = 0; pos < alen; ++pos) {
174 uint32_t ctrl = CR_ENABLE | CR_TBEN;
175
176 writel(paddr[pos], &regs->dr);
177 writel(ctrl, &regs->cr);
178 ret = fti2c010_wait(SR_DT);
179 if (ret)
180 return ret;
181 }
182
183 /*
184 * Phase B. Get register data
185 */
186
187 /* B.1 Select slave device (7bits Address + 1bit R/W) */
188 writel(I2C_RD(chip), &regs->dr);
189 writel(CR_ENABLE | CR_TBEN | CR_START, &regs->cr);
190 ret = fti2c010_wait(SR_DT);
191 if (ret)
192 return ret;
193
194 /* B.2 Get register data */
195 for (pos = 0; pos < len; ++pos) {
196 uint32_t ctrl = CR_ENABLE | CR_TBEN;
197 uint32_t stat = SR_DR;
198
199 if (pos == len - 1) {
200 ctrl |= CR_NAK | CR_STOP;
201 stat |= SR_ACK;
202 }
203 writel(ctrl, &regs->cr);
204 ret = fti2c010_wait(stat);
205 if (ret)
206 break;
207 buf[pos] = (uchar)(readl(&regs->dr) & 0xFF);
208 }
209
210 return ret;
211}
212
213/*
214 * Read/Write interface:
215 * chip: I2C chip address, range 0..127
216 * addr: Memory (register) address within the chip
217 * alen: Number of bytes to use for addr (typically 1, 2 for larger
218 * memories, 0 for register type devices with only one
219 * register)
220 * buffer: Where to read/write the data
221 * len: How many bytes to read/write
222 *
223 * Returns: 0 on success, not 0 on failure
224 */
225int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
226{
227 int ret, pos;
228 uchar paddr[4];
229 struct fti2c010_regs *regs = curr->regs;
230
231 i2c_init(0, 0);
232
233 paddr[0] = (addr >> 0) & 0xFF;
234 paddr[1] = (addr >> 8) & 0xFF;
235 paddr[2] = (addr >> 16) & 0xFF;
236 paddr[3] = (addr >> 24) & 0xFF;
237
238 /*
239 * Phase A. Set register address
240 *
241 * A.1 Select slave device (7bits Address + 1bit R/W)
242 */
243 writel(I2C_WR(chip), &regs->dr);
244 writel(CR_ENABLE | CR_TBEN | CR_START, &regs->cr);
245 ret = fti2c010_wait(SR_DT);
246 if (ret)
247 return ret;
248
249 /* A.2 Select device register */
250 for (pos = 0; pos < alen; ++pos) {
251 uint32_t ctrl = CR_ENABLE | CR_TBEN;
252
253 writel(paddr[pos], &regs->dr);
254 writel(ctrl, &regs->cr);
255 ret = fti2c010_wait(SR_DT);
256 if (ret)
257 return ret;
258 }
259
260 /*
261 * Phase B. Set register data
262 */
263 for (pos = 0; pos < len; ++pos) {
264 uint32_t ctrl = CR_ENABLE | CR_TBEN;
265
266 if (pos == len - 1)
267 ctrl |= CR_STOP;
268 writel(buf[pos], &regs->dr);
269 writel(ctrl, &regs->cr);
270 ret = fti2c010_wait(SR_DT);
271 if (ret)
272 break;
273 }
274
275 return ret;
276}
277
278/*
279 * Functions for setting the current I2C bus and its speed
280 */
281#ifdef CONFIG_I2C_MULTI_BUS
282
283/*
284 * i2c_set_bus_num:
285 *
286 * Change the active I2C bus. Subsequent read/write calls will
287 * go to this one.
288 *
289 * bus - bus index, zero based
290 *
291 * Returns: 0 on success, not 0 on failure
292 */
293int i2c_set_bus_num(uint bus)
294{
295 if (bus >= ARRAY_SIZE(chip_list))
296 return -1;
297 curr = chip_list + bus;
298 i2c_init(0, 0);
299 return 0;
300}
301
302/*
303 * i2c_get_bus_num:
304 *
305 * Returns index of currently active I2C bus. Zero-based.
306 */
307
308uint i2c_get_bus_num(void)
309{
310 return curr->bus;
311}
312
313#endif /* #ifdef CONFIG_I2C_MULTI_BUS */
314
315/*
316 * i2c_set_bus_speed:
317 *
318 * Change the speed of the active I2C bus
319 *
320 * speed - bus speed in Hz
321 *
322 * Returns: 0 on success, not 0 on failure
323 */
324int i2c_set_bus_speed(uint speed)
325{
326 struct fti2c010_regs *regs = curr->regs;
327 uint clk = CONFIG_FTI2C010_FREQ;
328 uint gsr = 0, tsr = 32;
329 uint spd, div;
330
331 if (!speed)
332 speed = CONFIG_SYS_I2C_SPEED;
333
334 for (div = 0; div < 0x3ffff; ++div) {
335 /* SCLout = PCLK/(2*(COUNT + 2) + GSR) */
336 spd = clk / (2 * (div + 2) + gsr);
337 if (spd <= speed)
338 break;
339 }
340
341 if (curr->speed == spd)
342 return 0;
343
344 writel(CR_I2CRST, &regs->cr);
345 mdelay(100);
346 if (readl(&regs->cr) & CR_I2CRST) {
347 printf("fti2c010: reset timeout\n");
348 return -1;
349 }
350
351 curr->speed = spd;
352
353 writel(TGSR_GSR(gsr) | TGSR_TSR(tsr), &regs->tgsr);
354 writel(CDR_DIV(div), &regs->cdr);
355
356 return 0;
357}
358
359/*
360 * i2c_get_bus_speed:
361 *
362 * Returns speed of currently active I2C bus in Hz
363 */
364
365uint i2c_get_bus_speed(void)
366{
367 return curr->speed;
368}