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Sean Andersonbba86182020-06-24 06:41:23 -04001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
4 */
5
6#include <dt-bindings/clock/k210-sysctl.h>
7#include <dt-bindings/mfd/k210-sysctl.h>
Sean Andersonbe3076e2020-09-14 11:02:04 -04008#include <dt-bindings/pinctrl/k210-pinctrl.h>
Sean Andersonbba86182020-06-24 06:41:23 -04009#include <dt-bindings/reset/k210-sysctl.h>
10
11/ {
12 /*
13 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
14 * wide, and the upper half of all addresses is ignored.
15 */
16 #address-cells = <1>;
17 #size-cells = <1>;
18 compatible = "kendryte,k210";
19
20 aliases {
Sean Andersone89e8982020-09-28 10:52:28 -040021 cpu0 = &cpu0;
22 cpu1 = &cpu1;
Sean Andersonbba86182020-06-24 06:41:23 -040023 dma0 = &dmac0;
24 gpio0 = &gpio0;
25 gpio1 = &gpio1_0;
26 i2c0 = &i2c0;
27 i2c1 = &i2c1;
28 i2c2 = &i2c2;
29 pinctrl0 = &fpioa;
30 serial0 = &uarths0;
31 serial1 = &uart1;
32 serial2 = &uart2;
33 serial3 = &uart3;
34 spi0 = &spi0;
35 spi1 = &spi1;
36 spi2 = &spi2;
37 spi3 = &spi3;
38 timer0 = &timer0;
39 timer1 = &timer1;
40 timer2 = &timer2;
41 };
42
43 cpus {
44 #address-cells = <1>;
45 #size-cells = <0>;
46 timebase-frequency = <7800000>;
47 cpu0: cpu@0 {
48 device_type = "cpu";
49 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
50 reg = <0>;
51 riscv,isa = "rv64imafdgc";
52 mmu-type = "sv39";
53 i-cache-block-size = <64>;
54 i-cache-size = <0x8000>;
55 d-cache-block-size = <64>;
56 d-cache-size = <0x8000>;
57 clocks = <&sysclk K210_CLK_CPU>;
58 cpu0_intc: interrupt-controller {
59 #interrupt-cells = <1>;
60 interrupt-controller;
61 compatible = "riscv,cpu-intc";
62 };
63 };
64 cpu1: cpu@1 {
65 device_type = "cpu";
66 compatible = "kendryte,k210", "sifive,rocket0", "riscv";
67 reg = <1>;
68 riscv,isa = "rv64imafdgc";
69 mmu-type = "sv39";
70 i-cache-block-size = <64>;
71 i-cache-size = <0x8000>;
72 d-cache-block-size = <64>;
73 d-cache-size = <0x8000>;
74 clocks = <&sysclk K210_CLK_CPU>;
75 cpu1_intc: interrupt-controller {
76 #interrupt-cells = <1>;
77 interrupt-controller;
78 compatible = "riscv,cpu-intc";
79 };
80 };
81 };
82
83 sram: memory@80000000 {
84 device_type = "memory";
85 compatible = "kendryte,k210-sram";
86 reg = <0x80000000 0x400000>,
87 <0x80400000 0x200000>,
88 <0x80600000 0x200000>;
89 reg-names = "sram0", "sram1", "airam";
90 clocks = <&sysclk K210_CLK_SRAM0>,
91 <&sysclk K210_CLK_SRAM1>,
92 <&sysclk K210_CLK_PLL1>;
93 clock-names = "sram0", "sram1", "airam";
94 };
95
96 reserved-memory {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 ranges;
100
101 ai_reserved: ai@80600000 {
102 reg = <0x80600000 0x200000>;
103 reusable;
104 };
105 };
106
107 clocks {
108 in0: osc {
109 compatible = "fixed-clock";
110 #clock-cells = <0>;
111 clock-frequency = <26000000>;
112 };
113 };
114
115 soc {
116 #address-cells = <1>;
117 #size-cells = <1>;
118 compatible = "kendryte,k210-soc", "simple-bus";
119 ranges;
120 interrupt-parent = <&plic0>;
121
122 debug0: debug@0 {
123 compatible = "kendryte,k210-debug", "riscv,debug";
124 reg = <0x0 0x1000>;
125 };
126
127 rom0: nvmem@1000 {
128 reg = <0x1000 0x1000>;
129 read-only;
130 };
131
Sean Andersone89e8982020-09-28 10:52:28 -0400132 clint0: clint@2000000 {
Sean Andersonbba86182020-06-24 06:41:23 -0400133 #interrupt-cells = <1>;
134 compatible = "kendryte,k210-clint", "riscv,clint0";
135 reg = <0x2000000 0xC000>;
Sean Andersonbba86182020-06-24 06:41:23 -0400136 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>,
137 <&cpu1_intc 3>, <&cpu1_intc 7>;
Sean Andersone89e8982020-09-28 10:52:28 -0400138 clocks = <&sysclk K210_CLK_CLINT>;
Sean Andersonbba86182020-06-24 06:41:23 -0400139 };
140
141 plic0: interrupt-controller@C000000 {
142 #interrupt-cells = <1>;
143 compatible = "kendryte,k210-plic", "riscv,plic0";
144 reg = <0xC000000 0x4000000>;
145 interrupt-controller;
146 interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>,
147 <&cpu1_intc 9>, <&cpu1_intc 11>;
148 riscv,ndev = <65>;
149 riscv,max-priority = <7>;
150 };
151
152 uarths0: serial@38000000 {
153 compatible = "kendryte,k210-uarths", "sifive,uart0";
154 reg = <0x38000000 0x1000>;
155 interrupts = <33>;
156 clocks = <&sysclk K210_CLK_CPU>;
157 status = "disabled";
158 };
159
160 gpio0: gpio-controller@38001000 {
161 #interrupt-cells = <2>;
162 #gpio-cells = <2>;
163 compatible = "kendryte,k210-gpiohs", "sifive,gpio0";
164 reg = <0x38001000 0x1000>;
165 interrupt-controller;
166 interrupts = <34 35 36 37 38 39 40 41
167 42 43 44 45 46 47 48 49
168 50 51 52 53 54 55 56 57
169 58 59 60 61 62 63 64 65>;
170 gpio-controller;
171 ngpios = <32>;
172 status = "disabled";
173 };
174
175 kpu0: kpu@40800000 {
176 compatible = "kendryte,k210-kpu";
177 reg = <0x40800000 0xc00000>;
178 interrupts = <25>;
179 clocks = <&sysclk K210_CLK_AI>;
180 memory-region = <&ai_reserved>;
181 status = "disabled";
182 };
183
184 fft0: fft@42000000 {
185 compatible = "kendryte,k210-fft";
186 reg = <0x42000000 0x400000>;
187 interrupts = <26>;
188 clocks = <&sysclk K210_CLK_FFT>;
189 resets = <&sysrst K210_RST_FFT>;
190 status = "disabled";
191 };
192
193 dmac0: dma-controller@50000000 {
194 compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a";
195 reg = <0x50000000 0x1000>;
196 interrupts = <27 28 29 30 31 32>;
197 clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>;
198 clock-names = "core-clk", "cfgr-clk";
199 resets = <&sysrst K210_RST_DMA>;
200 dma-channels = <6>;
201 snps,dma-masters = <2>;
202 snps,data-width = <5>;
203 snps,block-size = <0x400000 0x400000 0x400000
204 0x400000 0x400000 0x400000>;
205 snps,axi-max-burst-len = <256>;
206 status = "disabled";
207 };
208
209 apb0: bus@50200000 {
210 #address-cells = <1>;
211 #size-cells = <1>;
212 compatible = "kendryte,k210-apb", "simple-pm-bus";
213 ranges;
214 clocks = <&sysclk K210_CLK_APB0>;
215
216 gpio1: gpio-controller@50200000 {
217 #address-cells = <1>;
218 #size-cells = <0>;
219 compatible = "kendryte,k210-gpio",
220 "snps,dw-apb-gpio";
221 reg = <0x50200000 0x80>;
222 clocks = <&sysclk K210_CLK_GPIO>;
223 resets = <&sysrst K210_RST_GPIO>;
224 status = "disabled";
225
226 gpio1_0: gpio1@0 {
227 #gpio-cells = <2>;
228 #interrupt-cells = <2>;
229 compatible = "snps,dw-apb-gpio-port";
230 reg = <0>;
231 interrupt-controller;
232 interrupts = <23>;
233 gpio-controller;
234 snps,nr-gpios = <8>;
235 };
236 };
237
238 uart1: serial@50210000 {
239 compatible = "kendryte,k210-uart",
240 "snps,dw-apb-uart";
241 reg = <0x50210000 0x100>;
242 interrupts = <11>;
243 clocks = <&sysclk K210_CLK_UART1>;
244 resets = <&sysrst K210_RST_UART1>;
245 reg-io-width = <4>;
246 reg-shift = <2>;
247 dcd-override;
248 dsr-override;
249 cts-override;
250 ri-override;
251 status = "disabled";
252 };
253
254 uart2: serial@50220000 {
255 compatible = "kendryte,k210-uart",
256 "snps,dw-apb-uart";
257 reg = <0x50220000 0x100>;
258 interrupts = <12>;
259 clocks = <&sysclk K210_CLK_UART2>;
260 resets = <&sysrst K210_RST_UART2>;
261 reg-io-width = <4>;
262 reg-shift = <2>;
263 dcd-override;
264 dsr-override;
265 cts-override;
266 ri-override;
267 status = "disabled";
268 };
269
270 uart3: serial@50230000 {
271 compatible = "kendryte,k210-uart",
272 "snps,dw-apb-uart";
273 reg = <0x50230000 0x100>;
274 interrupts = <13>;
275 clocks = <&sysclk K210_CLK_UART3>;
276 resets = <&sysrst K210_RST_UART3>;
277 reg-io-width = <4>;
278 reg-shift = <2>;
279 dcd-override;
280 dsr-override;
281 cts-override;
282 ri-override;
283 status = "disabled";
284 };
285
286 spi2: spi@50240000 {
287 compatible = "kendryte,k120-spislave",
288 "snps,dw-apb-ssi";
289 spi-slave;
290 reg = <0x50240000 0x100>;
291 interrupts = <2>;
292 clocks = <&sysclk K210_CLK_SPI2>;
293 resets = <&sysrst K210_RST_SPI2>;
294 spi-max-frequency = <25000000>;
295 status = "disabled";
296 };
297
298 i2s0: i2s@50250000 {
299 compatible = "kendryte,k210-i2s",
300 "snps,designware-i2s";
301 reg = <0x50250000 0x200>;
302 interrupts = <5>;
303 clocks = <&sysclk K210_CLK_I2S0>;
304 clock-names = "i2sclk";
305 resets = <&sysrst K210_RST_I2S0>;
306 status = "disabled";
307 };
308
309 apu0: sound@520250200 {
310 compatible = "kendryte,k210-apu";
311 reg = <0x50250200 0x200>;
312 status = "disabled";
313 };
314
315 i2s1: i2s@50260000 {
316 compatible = "kendryte,k210-i2s",
317 "snps,designware-i2s";
318 reg = <0x50260000 0x200>;
319 interrupts = <6>;
320 clocks = <&sysclk K210_CLK_I2S1>;
321 clock-names = "i2sclk";
322 resets = <&sysrst K210_RST_I2S1>;
323 status = "disabled";
324 };
325
326 i2s2: i2s@50270000 {
327 compatible = "kendryte,k210-i2s",
328 "snps,designware-i2s";
329 reg = <0x50270000 0x200>;
330 interrupts = <7>;
331 clocks = <&sysclk K210_CLK_I2S2>;
332 clock-names = "i2sclk";
333 resets = <&sysrst K210_RST_I2S2>;
334 status = "disabled";
335 };
336
337 i2c0: i2c@50280000 {
338 compatible = "kendryte,k210-i2c",
339 "snps,designware-i2c";
340 reg = <0x50280000 0x100>;
341 interrupts = <8>;
342 clocks = <&sysclk K210_CLK_I2C0>;
343 resets = <&sysrst K210_RST_I2C0>;
344 status = "disabled";
345 };
346
347 i2c1: i2c@50290000 {
348 compatible = "kendryte,k210-i2c",
349 "snps,designware-i2c";
350 reg = <0x50290000 0x100>;
351 interrupts = <9>;
352 clocks = <&sysclk K210_CLK_I2C1>;
353 resets = <&sysrst K210_RST_I2C1>;
354 status = "disabled";
355 };
356
357 i2c2: i2c@502A0000 {
358 compatible = "kendryte,k210-i2c",
359 "snps,designware-i2c";
360 reg = <0x502A0000 0x100>;
361 interrupts = <10>;
362 clocks = <&sysclk K210_CLK_I2C2>;
363 resets = <&sysrst K210_RST_I2C2>;
364 status = "disabled";
365 };
366
367 fpioa: pinmux@502B0000 {
368 compatible = "kendryte,k210-fpioa";
369 reg = <0x502B0000 0x100>;
370 clocks = <&sysclk K210_CLK_FPIOA>;
371 resets = <&sysrst K210_RST_FPIOA>;
Sean Andersonbe3076e2020-09-14 11:02:04 -0400372 kendryte,sysctl = <&sysctl>;
373 kendryte,power-offset = <K210_SYSCTL_POWER_SEL>;
374 pinctrl-0 = <&fpioa_jtag>;
375 pinctrl-names = "default";
Sean Andersonbba86182020-06-24 06:41:23 -0400376 status = "disabled";
Sean Andersonbe3076e2020-09-14 11:02:04 -0400377
378 fpioa_jtag: jtag {
379 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
380 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
381 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
382 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
383 };
Sean Andersonbba86182020-06-24 06:41:23 -0400384 };
385
386 sha256: sha256@502C0000 {
387 compatible = "kendryte,k210-sha256";
388 reg = <0x502C0000 0x100>;
389 clocks = <&sysclk K210_CLK_SHA>;
390 resets = <&sysrst K210_RST_SHA>;
391 status = "disabled";
392 };
393
394 timer0: timer@502D0000 {
395 compatible = "kendryte,k210-timer",
396 "snps,dw-apb-timer";
397 reg = <0x502D0000 0x100>;
398 interrupts = <14 15>;
399 clocks = <&sysclk K210_CLK_TIMER0>;
400 clock-names = "timer";
401 resets = <&sysrst K210_RST_TIMER0>;
402 status = "disabled";
403 };
404
405 timer1: timer@502E0000 {
406 compatible = "kendryte,k210-timer",
407 "snps,dw-apb-timer";
408 reg = <0x502E0000 0x100>;
409 interrupts = <16 17>;
410 clocks = <&sysclk K210_CLK_TIMER1>;
411 clock-names = "timer";
412 resets = <&sysrst K210_RST_TIMER1>;
413 status = "disabled";
414 };
415
416 timer2: timer@502F0000 {
417 compatible = "kendryte,k210-timer",
418 "snps,dw-apb-timer";
419 reg = <0x502F0000 0x100>;
420 interrupts = <18 19>;
421 clocks = <&sysclk K210_CLK_TIMER2>;
422 clock-names = "timer";
423 resets = <&sysrst K210_RST_TIMER2>;
424 status = "disabled";
425 };
426 };
427
428 apb1: bus@50400000 {
429 #address-cells = <1>;
430 #size-cells = <1>;
431 compatible = "kendryte,k210-apb", "simple-pm-bus";
432 ranges;
433 clocks = <&sysclk K210_CLK_APB1>;
434
435 wdt0: watchdog@50400000 {
436 compatible = "kendryte,k210-wdt", "snps,dw-wdt";
437 reg = <0x50400000 0x100>;
438 interrupts = <21>;
439 clocks = <&sysclk K210_CLK_WDT0>;
440 resets = <&sysrst K210_RST_WDT0>;
441 status = "disabled";
442 };
443
444 wdt1: watchdog@50410000 {
445 compatible = "kendryte,k210-wdt", "snps,dw-wdt";
446 reg = <0x50410000 0x100>;
447 interrupts = <22>;
448 clocks = <&sysclk K210_CLK_WDT1>;
449 resets = <&sysrst K210_RST_WDT1>;
450 status = "disabled";
451 };
452
453 otp0: nvmem@50420000 {
454 #address-cells = <1>;
455 #size-cells = <1>;
456 compatible = "kendryte,k210-otp";
457 reg = <0x50420000 0x100>,
458 <0x88000000 0x20000>;
459 reg-names = "reg", "mem";
460 clocks = <&sysclk K210_CLK_ROM>;
461 resets = <&sysrst K210_RST_ROM>;
462 read-only;
463 status = "disabled";
464
465 /* Bootloader */
466 firmware@00000 {
467 reg = <0x00000 0xC200>;
468 };
469
470 /*
471 * config string as described in RISC-V
472 * privileged spec 1.9
473 */
474 config-1-9@1c000 {
475 reg = <0x1C000 0x1000>;
476 };
477
478 /*
479 * Device tree containing only registers,
480 * interrupts, and cpus
481 */
482 fdt@1d000 {
483 reg = <0x1D000 0x2000>;
484 };
485
486 /* CPU/ROM credits */
487 credits@1f000 {
488 reg = <0x1F000 0x1000>;
489 };
490 };
491
492 dvp0: camera@50430000 {
493 compatible = "kendryte,k210-dvp";
494 reg = <0x50430000 0x100>;
495 interrupts = <24>;
496 clocks = <&sysclk K210_CLK_DVP>;
497 resets = <&sysrst K210_RST_DVP>;
498 status = "disabled";
499 };
500
501 sysctl: syscon@50440000 {
502 compatible = "kendryte,k210-sysctl",
503 "syscon", "simple-mfd";
504 reg = <0x50440000 0x100>;
505 reg-io-width = <4>;
506
507 sysclk: clock-controller {
508 #clock-cells = <1>;
509 compatible = "kendryte,k210-clk";
510 clocks = <&in0>;
511 };
512
513 sysrst: reset-controller {
514 compatible = "kendryte,k210-rst",
515 "syscon-reset";
516 #reset-cells = <1>;
517 regmap = <&sysctl>;
518 offset = <K210_SYSCTL_PERI_RESET>;
519 mask = <0x27FFFFFF>;
520 assert-high = <1>;
521 };
522
523 reboot {
524 compatible = "syscon-reboot";
525 regmap = <&sysctl>;
526 offset = <K210_SYSCTL_SOFT_RESET>;
527 mask = <1>;
528 value = <1>;
529 };
530 };
531
532 aes0: aes@50450000 {
533 compatible = "kendryte,k210-aes";
534 reg = <0x50450000 0x100>;
535 clocks = <&sysclk K210_CLK_AES>;
536 resets = <&sysrst K210_RST_AES>;
537 status = "disabled";
538 };
539
540 rtc: rtc@50460000 {
541 compatible = "kendryte,k210-rtc";
542 reg = <0x50460000 0x100>;
543 clocks = <&in0>;
544 resets = <&sysrst K210_RST_RTC>;
545 interrupts = <20>;
546 status = "disabled";
547 };
548 };
549
550 apb2: bus@52000000 {
551 #address-cells = <1>;
552 #size-cells = <1>;
553 compatible = "kendryte,k210-apb", "simple-pm-bus";
554 ranges;
555 clocks = <&sysclk K210_CLK_APB2>;
556
557 spi0: spi@52000000 {
558 #address-cells = <1>;
559 #size-cells = <0>;
560 compatible = "kendryte,k210-spi",
561 "snps,dw-apb-ssi";
562 reg = <0x52000000 0x100>;
563 interrupts = <1>;
564 clocks = <&sysclk K210_CLK_SPI0>;
565 clock-names = "ssi_clk";
566 resets = <&sysrst K210_RST_SPI0>;
567 spi-max-frequency = <25000000>;
568 num-cs = <4>;
569 reg-io-width = <4>;
570 status = "disabled";
571 };
572
573 spi1: spi@53000000 {
574 #address-cells = <1>;
575 #size-cells = <0>;
576 compatible = "kendryte,k210-spi",
577 "snps,dw-apb-ssi";
578 reg = <0x53000000 0x100>;
579 interrupts = <2>;
580 clocks = <&sysclk K210_CLK_SPI1>;
581 clock-names = "ssi_clk";
582 resets = <&sysrst K210_RST_SPI1>;
583 spi-max-frequency = <25000000>;
584 num-cs = <4>;
585 reg-io-width = <4>;
586 status = "disabled";
587 };
588
589 spi3: spi@54000000 {
590 #address-cells = <1>;
591 #size-cells = <0>;
592 compatible = "kendryte,k210-spi",
593 "snps,dw-apb-ssi";
594 reg = <0x54000000 0x200>;
595 interrupts = <4>;
596 clocks = <&sysclk K210_CLK_SPI3>;
597 clock-names = "ssi_clk";
598 resets = <&sysrst K210_RST_SPI3>;
599 /* Could possibly go up to 200 MHz */
600 spi-max-frequency = <100000000>;
601 num-cs = <4>;
602 reg-io-width = <4>;
603 status = "disabled";
604 };
605 };
606 };
607};