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Ben Warren89973f82008-08-31 22:22:04 -07001/*
2 * (C) Copyright 2008
3 * Benjamin Warren, biggerbadderben@gmail.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Jerry Van Barenae0b05d2009-02-05 22:18:02 -050015 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Ben Warren89973f82008-08-31 22:22:04 -070016 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * netdev.h - definitions an prototypes for network devices
26 */
27
28#ifndef _NETDEV_H_
29#define _NETDEV_H_
30
31/*
32 * Board and CPU-specific initialization functions
33 * board_eth_init() has highest priority. cpu_eth_init() only
34 * gets called if board_eth_init() isn't instantiated or fails.
35 * Return values:
36 * 0: success
37 * -1: failure
38 */
39
40int board_eth_init(bd_t *bis);
41int cpu_eth_init(bd_t *bis);
42
43/* Driver initialization prototypes */
Thomas Chouc960b132010-04-20 12:49:52 +080044int altera_tse_initialize(u8 dev_num, int mac_base,
Joachim Foersterb962ac72011-10-17 05:24:44 +000045 int sgdma_rx_base, int sgdma_tx_base,
46 u32 sgdma_desc_base, u32 sgdma_desc_size);
Jens Scharsigc041e9d2010-01-23 12:03:45 +010047int at91emac_register(bd_t *bis, unsigned long iobase);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020048int au1x00_enet_initialize(bd_t*);
49int ax88180_initialize(bd_t *bis);
Ben Warren89973f82008-08-31 22:22:04 -070050int bfin_EMAC_initialize(bd_t *bis);
Rob Herringefdd7312011-12-15 11:15:49 +000051int calxedaxgmac_initialize(u32 id, ulong base_addr);
Ben Warrenb1c0eaa2009-08-25 13:09:37 -070052int cs8900_initialize(u8 dev_num, int base_addr);
Ben Warren84535872009-05-26 00:34:07 -070053int davinci_emac_initialize(void);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020054int dc21x4x_initialize(bd_t *bis);
Vipin Kumar9afc1af2012-05-07 13:06:44 +053055int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020056int dm9000_initialize(bd_t *bis);
Ilya Yanok62cbc402009-02-09 18:45:28 +010057int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
Ben Warrenad3381c2008-08-31 10:44:19 -070058int e1000_initialize(bd_t *bis);
Ben Warren10efa022008-08-31 20:37:00 -070059int eepro100_initialize(bd_t *bis);
Reinhard Meyera61a8192010-09-12 16:23:49 +020060int enc28j60_initialize(unsigned int bus, unsigned int cs,
61 unsigned int max_hz, unsigned int mode);
Matthias Kaehlcke594d57d2010-01-31 17:39:49 +010062int ep93xx_eth_initialize(u8 dev_num, int base_addr);
Ben Warren164846e2008-08-31 10:15:26 -070063int eth_3com_initialize (bd_t * bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020064int ethoc_initialize(u8 dev_num, int base_addr);
Ben Warren3456a142008-10-22 23:20:29 -070065int fec_initialize (bd_t *bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020066int fecmxc_initialize(bd_t *bis);
Marek Vasut9e27e9d2011-09-16 01:13:47 +020067int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
Macpaul Linb3dbf4a52010-12-21 16:59:46 +080068int ftgmac100_initialize(bd_t *bits);
Po-Yu Chuang750326e2009-08-10 11:00:00 +080069int ftmac100_initialize(bd_t *bits);
Kuo-Jung Suc4775472013-05-07 14:33:31 +080070int ftmac110_initialize(bd_t *bits);
Ben Warren89973f82008-08-31 22:22:04 -070071int greth_initialize(bd_t *bis);
Ben Warren6aca1452008-08-31 10:13:34 -070072void gt6426x_eth_initialize(bd_t *bis);
Ben Warren8218bd22008-08-31 10:16:59 -070073int inca_switch_initialize(bd_t *bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020074int ks8695_eth_initialize(void);
Roberto Cerati45a16932013-04-24 10:46:17 +080075int ks8851_mll_initialize(u8 dev_num, int base_addr);
Nishanth Menonb7ad4102009-10-16 00:06:35 -050076int lan91c96_initialize(u8 dev_num, int base_addr);
Ben Warren89973f82008-08-31 22:22:04 -070077int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
78int mcdmafec_initialize(bd_t *bis);
79int mcffec_initialize(bd_t *bis);
Ben Warrena0aad082008-08-31 10:36:38 -070080int mpc512x_fec_initialize(bd_t *bis);
Ben Warrene1d74802008-08-31 10:39:12 -070081int mpc5xxx_fec_initialize(bd_t *bis);
Gary Jennejohnba705b52008-11-20 12:28:38 +010082int mpc82xx_scc_enet_initialize(bd_t *bis);
Albert Aribaudd44265a2010-07-12 22:24:28 +020083int mvgbe_initialize(bd_t *bis);
Ben Warrenb902b8d2008-08-31 10:07:16 -070084int natsemi_initialize(bd_t *bis);
Bernhard Kaindld0201692011-10-20 10:56:59 +000085int ne2k_register(void);
Ben Warrencc940742008-09-05 01:55:22 -040086int npe_initialize(bd_t *bis);
Ben Warren19403632008-08-31 10:03:22 -070087int ns8382x_initialize(bd_t *bis);
Ben Warrene3090532008-08-31 10:08:43 -070088int pcnet_initialize(bd_t *bis);
Ben Warren4fce2ac2008-08-31 10:40:51 -070089int plb2800_eth_initialize(bd_t *bis);
Ben Warren25a85902008-10-27 23:53:17 -070090int ppc_4xx_eth_initialize (bd_t *bis);
Ben Warren0b252f52008-08-31 21:41:08 -070091int rtl8139_initialize(bd_t *bis);
Ben Warren02d69892008-08-31 09:49:42 -070092int rtl8169_initialize(bd_t *bis);
Ben Warren9eb79bd2008-10-23 22:02:49 -070093int scc_initialize(bd_t *bis);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020094int sh_eth_initialize(bd_t *bis);
Ben Warren89973f82008-08-31 22:22:04 -070095int skge_initialize(bd_t *bis);
Ben Warren7194ab82009-10-04 22:37:03 -070096int smc91111_initialize(u8 dev_num, int base_addr);
Wolfgang Denkbd6ce9d2011-09-10 16:59:02 +020097int smc911x_initialize(u8 dev_num, int base_addr);
Henrik Nordström518ce472012-11-25 12:41:36 +010098int sunxi_wemac_initialize(bd_t *bis);
Ben Warrenccdd12f2008-08-31 09:59:33 -070099int tsi108_eth_initialize(bd_t *bis);
Wolfgang Denk2b5243f2009-07-18 16:13:18 +0200100int uec_standard_init(bd_t *bis);
Ben Warren89973f82008-08-31 22:22:04 -0700101int uli526x_initialize(bd_t *bis);
Ajay Bhargav79788bb2011-09-13 22:21:58 +0530102int armada100_fec_register(unsigned long base_addr);
Michal Simek4f1ec4c2011-10-06 20:35:35 +0000103int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
104 unsigned long dma_addr);
Michal Simekc1044a12011-10-12 23:23:22 +0000105int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
106 int txpp, int rxpp);
Stephan Linzdf482652012-02-25 00:48:31 +0000107int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
108 unsigned long ctrl_addr);
David Andrey01fbf312013-04-05 17:24:24 +0200109int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio);
Stephan Linzdf482652012-02-25 00:48:31 +0000110/*
111 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
112 * exported by a public hader file, we need a global definition at this point.
113 */
114#if defined(CONFIG_XILINX_LL_TEMAC)
115#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
116#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
117#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
118#endif
Ben Warren89973f82008-08-31 22:22:04 -0700119
120/* Boards with PCI network controllers can call this from their board_eth_init()
121 * function to initialize whatever's on board.
122 * Return value is total # of devices found */
123
124static inline int pci_eth_init(bd_t *bis)
125{
126 int num = 0;
Ben Warrene3090532008-08-31 10:08:43 -0700127
Ben Warren10efa022008-08-31 20:37:00 -0700128#ifdef CONFIG_PCI
129
130#ifdef CONFIG_EEPRO100
131 num += eepro100_initialize(bis);
132#endif
Ben Warren8ca0b3f2008-08-31 10:45:44 -0700133#ifdef CONFIG_TULIP
134 num += dc21x4x_initialize(bis);
135#endif
Ben Warrenad3381c2008-08-31 10:44:19 -0700136#ifdef CONFIG_E1000
137 num += e1000_initialize(bis);
138#endif
Ben Warrene3090532008-08-31 10:08:43 -0700139#ifdef CONFIG_PCNET
140 num += pcnet_initialize(bis);
141#endif
Ben Warrenb902b8d2008-08-31 10:07:16 -0700142#ifdef CONFIG_NATSEMI
143 num += natsemi_initialize(bis);
144#endif
Ben Warren19403632008-08-31 10:03:22 -0700145#ifdef CONFIG_NS8382X
146 num += ns8382x_initialize(bis);
147#endif
Ben Warren0b252f52008-08-31 21:41:08 -0700148#if defined(CONFIG_RTL8139)
149 num += rtl8139_initialize(bis);
150#endif
Ben Warren02d69892008-08-31 09:49:42 -0700151#if defined(CONFIG_RTL8169)
152 num += rtl8169_initialize(bis);
153#endif
Timur Tabib11f6642009-04-09 10:27:05 -0500154#if defined(CONFIG_ULI526X)
Ben Warren89973f82008-08-31 22:22:04 -0700155 num += uli526x_initialize(bis);
156#endif
Ben Warren10efa022008-08-31 20:37:00 -0700157
158#endif /* CONFIG_PCI */
Ben Warren89973f82008-08-31 22:22:04 -0700159 return num;
160}
161
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530162/*
163 * Boards with mv88e61xx switch can use this by defining
164 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
165 * the stuct and enums here are used to specify switch configuration params
166 */
167#if defined(CONFIG_MV88E61XX_SWITCH)
Albert ARIBAUD0a16ea52012-11-26 11:27:35 +0000168
169/* constants for any 88E61xx switch */
170#define MV88E61XX_MAX_PORTS_NUM 6
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530171
172enum mv88e61xx_cfg_mdip {
173 MV88E61XX_MDIP_NOCHANGE,
174 MV88E61XX_MDIP_REVERSE
175};
176
177enum mv88e61xx_cfg_ledinit {
178 MV88E61XX_LED_INIT_DIS,
179 MV88E61XX_LED_INIT_EN
180};
181
182enum mv88e61xx_cfg_rgmiid {
183 MV88E61XX_RGMII_DELAY_DIS,
184 MV88E61XX_RGMII_DELAY_EN
185};
186
187enum mv88e61xx_cfg_prtstt {
188 MV88E61XX_PORTSTT_DISABLED,
189 MV88E61XX_PORTSTT_BLOCKING,
190 MV88E61XX_PORTSTT_LEARNING,
191 MV88E61XX_PORTSTT_FORWARDING
192};
193
194struct mv88e61xx_config {
195 char *name;
Albert ARIBAUD0a16ea52012-11-26 11:27:35 +0000196 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530197 enum mv88e61xx_cfg_rgmiid rgmii_delay;
198 enum mv88e61xx_cfg_prtstt portstate;
199 enum mv88e61xx_cfg_ledinit led_init;
200 enum mv88e61xx_cfg_mdip mdip;
201 u32 ports_enabled;
202 u8 cpuport;
203};
204
Albert ARIBAUD0a16ea52012-11-26 11:27:35 +0000205/*
206 * Common mappings for Internal VLANs
207 * These mappings consider that all ports are useable; the driver
208 * will mask inexistent/unused ports.
209 */
210
211/* Switch mode : routes any port to any port */
212#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
213
214/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
215#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
216
Prafulla Wadaskar6f51deb2009-05-19 01:40:16 +0530217int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
218#endif /* CONFIG_MV88E61XX_SWITCH */
219
Troy Kiskyfe428b92012-10-22 16:40:46 +0000220struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
221#ifdef CONFIG_PHYLIB
222struct phy_device;
223int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
224 struct mii_dev *bus, struct phy_device *phydev);
225#else
Marek Vasut2e5f4422011-09-11 18:05:36 +0000226/*
227 * Allow FEC to fine-tune MII configuration on boards which require this.
228 */
229int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
Troy Kiskyfe428b92012-10-22 16:40:46 +0000230#endif
Marek Vasut2e5f4422011-09-11 18:05:36 +0000231
Ben Warren89973f82008-08-31 22:22:04 -0700232#endif /* _NETDEV_H_ */