Hyungwon Hwang | d39c21f | 2013-07-31 17:25:34 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. All rights reserved. |
| 3 | * Hyungwon Hwang <human.hwang@samsung.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/arch/mipi_dsim.h> |
| 10 | |
| 11 | #define SCAN_FROM_LEFT_TO_RIGHT 0 |
| 12 | #define SCAN_FROM_RIGHT_TO_LEFT 1 |
| 13 | #define SCAN_FROM_TOP_TO_BOTTOM 0 |
| 14 | #define SCAN_FROM_BOTTOM_TO_TOP 1 |
| 15 | |
| 16 | static void l5f31188_sleep_in(struct mipi_dsim_device *dev, |
| 17 | struct mipi_dsim_master_ops *ops) |
| 18 | { |
| 19 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x10, 0x00); |
| 20 | } |
| 21 | |
| 22 | static void l5f31188_sleep_out(struct mipi_dsim_device *dev, |
| 23 | struct mipi_dsim_master_ops *ops) |
| 24 | { |
| 25 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00); |
| 26 | } |
| 27 | |
| 28 | static void l5f31188_set_gamma(struct mipi_dsim_device *dev, |
| 29 | struct mipi_dsim_master_ops *ops) |
| 30 | { |
| 31 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x26, 0x00); |
| 32 | } |
| 33 | |
| 34 | static void l5f31188_display_off(struct mipi_dsim_device *dev, |
| 35 | struct mipi_dsim_master_ops *ops) |
| 36 | { |
| 37 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x28, 0x00); |
| 38 | } |
| 39 | |
| 40 | static void l5f31188_display_on(struct mipi_dsim_device *dev, |
| 41 | struct mipi_dsim_master_ops *ops) |
| 42 | { |
| 43 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00); |
| 44 | } |
| 45 | |
| 46 | static void l5f31188_ctl_memory_access(struct mipi_dsim_device *dev, |
| 47 | struct mipi_dsim_master_ops *ops, |
| 48 | int h_direction, int v_direction) |
| 49 | { |
| 50 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x36, |
| 51 | (((h_direction & 0x1) << 1) | (v_direction & 0x1))); |
| 52 | } |
| 53 | |
| 54 | static void l5f31188_set_pixel_format(struct mipi_dsim_device *dev, |
| 55 | struct mipi_dsim_master_ops *ops) |
| 56 | { |
| 57 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x3A, 0x70); |
| 58 | } |
| 59 | |
| 60 | static void l5f31188_write_disbv(struct mipi_dsim_device *dev, |
| 61 | struct mipi_dsim_master_ops *ops, unsigned int brightness) |
| 62 | { |
| 63 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x51, brightness); |
| 64 | } |
| 65 | |
| 66 | static void l5f31188_write_ctrld(struct mipi_dsim_device *dev, |
| 67 | struct mipi_dsim_master_ops *ops) |
| 68 | { |
| 69 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x53, 0x2C); |
| 70 | } |
| 71 | |
| 72 | static void l5f31188_write_cabc(struct mipi_dsim_device *dev, |
| 73 | struct mipi_dsim_master_ops *ops, |
| 74 | unsigned int wm_mode) |
| 75 | { |
| 76 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x55, wm_mode); |
| 77 | } |
| 78 | |
| 79 | static void l5f31188_write_cabcmb(struct mipi_dsim_device *dev, |
| 80 | struct mipi_dsim_master_ops *ops, unsigned int min_brightness) |
| 81 | { |
| 82 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0x5E, |
| 83 | min_brightness); |
| 84 | } |
| 85 | |
| 86 | static void l5f31188_set_extension(struct mipi_dsim_device *dev, |
| 87 | struct mipi_dsim_master_ops *ops) |
| 88 | { |
| 89 | const unsigned char data_to_send[] = { |
| 90 | 0xB9, 0xFF, 0x83, 0x94 |
| 91 | }; |
| 92 | |
| 93 | ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE, |
| 94 | (unsigned int)data_to_send, ARRAY_SIZE(data_to_send)); |
| 95 | } |
| 96 | |
| 97 | static void l5f31188_set_dgc_lut(struct mipi_dsim_device *dev, |
| 98 | struct mipi_dsim_master_ops *ops) |
| 99 | { |
| 100 | const unsigned char data_to_send[] = { |
| 101 | 0xC1, 0x01, 0x00, 0x04, 0x0E, 0x18, 0x1E, 0x26, |
| 102 | 0x2F, 0x36, 0x3E, 0x47, 0x4E, 0x56, 0x5D, 0x65, |
| 103 | 0x6D, 0x75, 0x7D, 0x84, 0x8C, 0x94, 0x9C, 0xA4, |
| 104 | 0xAD, 0xB5, 0xBD, 0xC5, 0xCC, 0xD4, 0xDE, 0xE5, |
| 105 | 0xEE, 0xF7, 0xFF, 0x3F, 0x9A, 0xCE, 0xD4, 0x21, |
| 106 | 0xA1, 0x26, 0x54, 0x00, 0x00, 0x04, 0x0E, 0x19, |
| 107 | 0x1F, 0x27, 0x30, 0x37, 0x40, 0x48, 0x50, 0x58, |
| 108 | 0x60, 0x67, 0x6F, 0x77, 0x7F, 0x87, 0x8F, 0x97, |
| 109 | 0x9F, 0xA7, 0xB0, 0xB8, 0xC0, 0xC8, 0xCE, 0xD8, |
| 110 | 0xE0, 0xE7, 0xF0, 0xF7, 0xFF, 0x3C, 0xEB, 0xFD, |
| 111 | 0x2F, 0x66, 0xA8, 0x2C, 0x46, 0x00, 0x00, 0x04, |
| 112 | 0x0E, 0x18, 0x1E, 0x26, 0x30, 0x38, 0x41, 0x4A, |
| 113 | 0x52, 0x5A, 0x62, 0x6B, 0x73, 0x7B, 0x83, 0x8C, |
| 114 | 0x94, 0x9C, 0xA5, 0xAD, 0xB6, 0xBD, 0xC5, 0xCC, |
| 115 | 0xD4, 0xDD, 0xE3, 0xEB, 0xF2, 0xF9, 0xFF, 0x3F, |
| 116 | 0xA4, 0x8A, 0x8F, 0xC7, 0x33, 0xF5, 0xE9, 0x00 |
| 117 | }; |
| 118 | ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE, |
| 119 | (unsigned int)data_to_send, ARRAY_SIZE(data_to_send)); |
| 120 | } |
| 121 | |
| 122 | static void l5f31188_set_tcon(struct mipi_dsim_device *dev, |
| 123 | struct mipi_dsim_master_ops *ops) |
| 124 | { |
| 125 | const unsigned char data_to_send[] = { |
| 126 | 0xC7, 0x00, 0x20 |
| 127 | }; |
| 128 | ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE, |
| 129 | (unsigned int)data_to_send, ARRAY_SIZE(data_to_send)); |
| 130 | } |
| 131 | |
| 132 | static void l5f31188_set_ptba(struct mipi_dsim_device *dev, |
| 133 | struct mipi_dsim_master_ops *ops) |
| 134 | { |
| 135 | const unsigned char data_to_send[] = { |
| 136 | 0xBF, 0x06, 0x10 |
| 137 | }; |
| 138 | ops->cmd_write(dev, MIPI_DSI_DCS_LONG_WRITE, |
| 139 | (unsigned int)data_to_send, ARRAY_SIZE(data_to_send)); |
| 140 | } |
| 141 | |
| 142 | static void l5f31188_set_eco(struct mipi_dsim_device *dev, |
| 143 | struct mipi_dsim_master_ops *ops) |
| 144 | { |
| 145 | ops->cmd_write(dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xC6, 0x0C); |
| 146 | } |
| 147 | |
| 148 | static int l5f31188_panel_init(struct mipi_dsim_device *dev) |
| 149 | { |
| 150 | struct mipi_dsim_master_ops *ops = dev->master_ops; |
| 151 | |
| 152 | l5f31188_set_extension(dev, ops); |
| 153 | l5f31188_set_dgc_lut(dev, ops); |
| 154 | |
| 155 | l5f31188_set_eco(dev, ops); |
| 156 | l5f31188_set_tcon(dev, ops); |
| 157 | l5f31188_set_ptba(dev, ops); |
| 158 | l5f31188_set_gamma(dev, ops); |
| 159 | l5f31188_ctl_memory_access(dev, ops, |
| 160 | SCAN_FROM_LEFT_TO_RIGHT, SCAN_FROM_TOP_TO_BOTTOM); |
| 161 | l5f31188_set_pixel_format(dev, ops); |
| 162 | l5f31188_write_disbv(dev, ops, 0xFF); |
| 163 | l5f31188_write_ctrld(dev, ops); |
| 164 | l5f31188_write_cabc(dev, ops, 0x0); |
| 165 | l5f31188_write_cabcmb(dev, ops, 0x0); |
| 166 | |
| 167 | l5f31188_sleep_out(dev, ops); |
| 168 | |
| 169 | /* 120 msec */ |
| 170 | udelay(120 * 1000); |
| 171 | |
| 172 | return 0; |
| 173 | } |
| 174 | |
| 175 | static void l5f31188_display_enable(struct mipi_dsim_device *dev) |
| 176 | { |
| 177 | struct mipi_dsim_master_ops *ops = dev->master_ops; |
| 178 | l5f31188_display_on(dev, ops); |
| 179 | } |
| 180 | |
| 181 | static struct mipi_dsim_lcd_driver l5f31188_dsim_ddi_driver = { |
| 182 | .name = "l5f31188", |
| 183 | .id = -1, |
| 184 | |
| 185 | .mipi_panel_init = l5f31188_panel_init, |
| 186 | .mipi_display_on = l5f31188_display_enable, |
| 187 | }; |
| 188 | |
| 189 | void l5f31188_init(void) |
| 190 | { |
| 191 | exynos_mipi_dsi_register_lcd_driver(&l5f31188_dsim_ddi_driver); |
| 192 | } |