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wdenka562e1b2005-01-09 18:21:42 +00001/*
2 * Configuation settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
wdenka562e1b2005-01-09 18:21:42 +00007 */
8
9/* ---
10 * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
11 * Date: 2004-03-29
12 * Author: Florian Schlote
13 *
14 * For a description of configuration options please refer also to the
15 * general u-boot-1.x.x/README file
16 * ---
17 */
18
19/* ---
20 * board/config.h - configuration options, board specific
21 * ---
22 */
23
24#ifndef _CONFIG_COBRA5272_H
25#define _CONFIG_COBRA5272_H
26
27/* ---
28 * Define processor
29 * possible values for Sentec board: only Coldfire M5272 processor supported
30 * (please do not change)
31 * ---
32 */
33
34#define CONFIG_MCF52x2 /* define processor family */
35#define CONFIG_M5272 /* define processor type */
36
37/* ---
38 * Defines processor clock - important for correct timings concerning serial
39 * interface etc.
wdenka562e1b2005-01-09 18:21:42 +000040 * ---
41 */
42
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043#define CONFIG_SYS_CLK 66000000
44#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
wdenka562e1b2005-01-09 18:21:42 +000045
46/* ---
47 * Enable use of Ethernet
48 * ---
49 */
TsiChungLiew67064242007-08-15 19:41:06 -050050#define CONFIG_MCFFEC
wdenka562e1b2005-01-09 18:21:42 +000051
TsiChungLiew67064242007-08-15 19:41:06 -050052/* Enable Dma Timer */
53#define CONFIG_MCFTMR
wdenka562e1b2005-01-09 18:21:42 +000054
55/* ---
56 * Define baudrate for UART1 (console output, tftp, ...)
57 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020058 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
wdenka562e1b2005-01-09 18:21:42 +000059 * interface
60 * ---
61 */
62
TsiChungLiew67064242007-08-15 19:41:06 -050063#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_UART_PORT (0)
wdenka562e1b2005-01-09 18:21:42 +000065#define CONFIG_BAUDRATE 19200
wdenka562e1b2005-01-09 18:21:42 +000066
67/* ---
68 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
69 * timeout acc. to your needs
70 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
71 * for 10 sec
72 * ---
73 */
74
75#if 0
76#define CONFIG_WATCHDOG
77#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
78#endif
79
80/* ---
81 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
82 * bootloader residing in flash ('chainloading'); if you want to use
83 * chainloading or want to compile a u-boot binary that can be loaded into
84 * RAM via BDM set
Wolfgang Denk53677ef2008-05-20 16:00:29 +020085 * "#if 0" to "#if 1"
wdenka562e1b2005-01-09 18:21:42 +000086 * You will need a first stage bootloader then, e. g. colilo or a working BDM
87 * cable (Background Debug Mode)
88 *
89 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
90 *
Wolfgang Denk14d0a022010-10-07 21:51:12 +020091 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
wdenka562e1b2005-01-09 18:21:42 +000092 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
93 *
94 * ---
95 */
96
97#if 0
98#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
99#endif
100
101/* ---
102 * Configuration for environment
103 * Environment is embedded in u-boot in the second sector of the flash
104 * ---
105 */
106
107#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200108#define CONFIG_ENV_OFFSET 0x4000
109#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200110#define CONFIG_ENV_IS_IN_FLASH 1
wdenka562e1b2005-01-09 18:21:42 +0000111#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200112#define CONFIG_ENV_ADDR 0xffe04000
113#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200114#define CONFIG_ENV_IS_IN_FLASH 1
wdenka562e1b2005-01-09 18:21:42 +0000115#endif
116
Jon Loeliger37e4f242007-07-04 22:31:56 -0500117
118/*
Jon Loeliger80ff4f92007-07-10 09:29:01 -0500119 * BOOTP options
120 */
121#define CONFIG_BOOTP_BOOTFILESIZE
122#define CONFIG_BOOTP_BOOTPATH
123#define CONFIG_BOOTP_GATEWAY
124#define CONFIG_BOOTP_HOSTNAME
125
126
127/*
Jon Loeliger37e4f242007-07-04 22:31:56 -0500128 * Command line configuration.
wdenka562e1b2005-01-09 18:21:42 +0000129 */
Jon Loeliger37e4f242007-07-04 22:31:56 -0500130#include <config_cmd_default.h>
wdenka562e1b2005-01-09 18:21:42 +0000131
Jon Loeliger37e4f242007-07-04 22:31:56 -0500132#define CONFIG_CMD_PING
wdenka562e1b2005-01-09 18:21:42 +0000133
Jon Loeliger37e4f242007-07-04 22:31:56 -0500134#undef CONFIG_CMD_LOADS
135#undef CONFIG_CMD_LOADB
136#undef CONFIG_CMD_MII
137
TsiChungLiew67064242007-08-15 19:41:06 -0500138#ifdef CONFIG_MCFFEC
TsiChungLiew67064242007-08-15 19:41:06 -0500139# define CONFIG_MII 1
TsiChung Liew0f3ba7e2008-03-30 01:22:13 -0500140# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141# define CONFIG_SYS_DISCOVER_PHY
142# define CONFIG_SYS_RX_ETH_BUFFER 8
143# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew67064242007-08-15 19:41:06 -0500144
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145# define CONFIG_SYS_FEC0_PINMUX 0
146# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200147# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
149# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiew67064242007-08-15 19:41:06 -0500150# define FECDUPLEX FULL
151# define FECSPEED _100BASET
152# else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200153# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
154# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiew67064242007-08-15 19:41:06 -0500155# endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiew67064242007-08-15 19:41:06 -0500157#endif
wdenka562e1b2005-01-09 18:21:42 +0000158
159/*
160 *-----------------------------------------------------------------------------
161 * Define user parameters that have to be customized most likely
162 *-----------------------------------------------------------------------------
163 */
164
165/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
166
167#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
168seconds u-boot will wait before starting defined (auto-)boot command, setting
169to -1 disables delay, setting to 0 will too prevent access to u-boot command
170interface: u-boot then has to reflashed */
171
172
173/* The following settings will be contained in the environment block ; if you
174want to use a neutral environment all those settings can be manually set in
175u-boot: 'set' command */
176
177#if 0
178
179#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
180enter a valid image address in flash */
181
182#define CONFIG_BOOTARGS " " /* default bootargs that are
183considered during boot */
184
185/* User network settings */
186
187#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
188#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
189#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
190
191#endif
192
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193#define CONFIG_SYS_PROMPT "COBRA > " /* Layout of u-boot prompt*/
wdenka562e1b2005-01-09 18:21:42 +0000194
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
wdenka562e1b2005-01-09 18:21:42 +0000196from which user programs will be started */
197
198/*---*/
199
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200200#define CONFIG_SYS_LONGHELP /* undef to save memory */
wdenka562e1b2005-01-09 18:21:42 +0000201
Jon Loeliger37e4f242007-07-04 22:31:56 -0500202#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenka562e1b2005-01-09 18:21:42 +0000204#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenka562e1b2005-01-09 18:21:42 +0000206#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200207#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
208#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
209#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenka562e1b2005-01-09 18:21:42 +0000210
211/*
212 *-----------------------------------------------------------------------------
213 * End of user parameters to be customized
214 *-----------------------------------------------------------------------------
215 */
216
217/* ---
218 * Defines memory range for test
219 * ---
220 */
221
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_MEMTEST_START 0x400
223#define CONFIG_SYS_MEMTEST_END 0x380000
wdenka562e1b2005-01-09 18:21:42 +0000224
225/* ---
226 * Low Level Configuration Settings
227 * (address mappings, register initial values, etc.)
228 * You should know what you are doing if you make changes here.
229 * ---
230 */
231
232/* ---
233 * Base register address
234 * ---
235 */
236
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
wdenka562e1b2005-01-09 18:21:42 +0000238
239/* ---
240 * System Conf. Reg. & System Protection Reg.
241 * ---
242 */
243
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200244#define CONFIG_SYS_SCR 0x0003
245#define CONFIG_SYS_SPR 0xffff
wdenka562e1b2005-01-09 18:21:42 +0000246
247/* ---
248 * Ethernet settings
249 * ---
250 */
251
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200252#define CONFIG_SYS_DISCOVER_PHY
253#define CONFIG_SYS_ENET_BD_BASE 0x780000
wdenka562e1b2005-01-09 18:21:42 +0000254
255/*-----------------------------------------------------------------------
256 * Definitions for initial stack pointer and data area (in internal SRAM)
257 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200258#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk553f0982010-10-26 13:32:32 +0200259#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200260#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200261#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenka562e1b2005-01-09 18:21:42 +0000262
263/*-----------------------------------------------------------------------
264 * Start addresses for the final memory configuration
265 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200266 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenka562e1b2005-01-09 18:21:42 +0000267 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#define CONFIG_SYS_SDRAM_BASE 0x00000000
wdenka562e1b2005-01-09 18:21:42 +0000269
270/*
271 *-------------------------------------------------------------------------
272 * RAM SIZE (is defined above)
273 *-----------------------------------------------------------------------
274 */
275
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200276/* #define CONFIG_SYS_SDRAM_SIZE 16 */
wdenka562e1b2005-01-09 18:21:42 +0000277
278/*
279 *-----------------------------------------------------------------------
280 */
281
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200282#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenka562e1b2005-01-09 18:21:42 +0000283
284#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200285#define CONFIG_SYS_MONITOR_BASE 0x20000
wdenka562e1b2005-01-09 18:21:42 +0000286#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200287#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
wdenka562e1b2005-01-09 18:21:42 +0000288#endif
289
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200290#define CONFIG_SYS_MONITOR_LEN 0x20000
291#define CONFIG_SYS_MALLOC_LEN (256 << 10)
292#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
wdenka562e1b2005-01-09 18:21:42 +0000293
294/*
295 * For booting Linux, the board info and command line data
296 * have to be in the first 8 MB of memory, since this is
297 * the maximum mapped by the Linux kernel during initialization ??
298 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200299#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenka562e1b2005-01-09 18:21:42 +0000300
301/*-----------------------------------------------------------------------
302 * FLASH organization
303 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200304#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
305#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
306#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
wdenka562e1b2005-01-09 18:21:42 +0000307
308/*-----------------------------------------------------------------------
309 * Cache Configuration
310 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200311#define CONFIG_SYS_CACHELINE_SIZE 16
wdenka562e1b2005-01-09 18:21:42 +0000312
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600313#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200314 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600315#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200316 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600317#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
318#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
319 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
320 CF_ACR_EN | CF_ACR_SM_ALL)
321#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
322 CF_CACR_DISD | CF_CACR_INVI | \
323 CF_CACR_CEIB | CF_CACR_DCM | \
324 CF_CACR_EUSP)
325
wdenka562e1b2005-01-09 18:21:42 +0000326/*-----------------------------------------------------------------------
327 * Memory bank definitions
328 *
329 * Please refer also to Motorola Coldfire user manual - Chapter XXX
330 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
331 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200332#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
333#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
wdenka562e1b2005-01-09 18:21:42 +0000334
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200335#define CONFIG_SYS_BR1_PRELIM 0
336#define CONFIG_SYS_OR1_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000337
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200338#define CONFIG_SYS_BR2_PRELIM 0
339#define CONFIG_SYS_OR2_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000340
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200341#define CONFIG_SYS_BR3_PRELIM 0
342#define CONFIG_SYS_OR3_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000343
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200344#define CONFIG_SYS_BR4_PRELIM 0
345#define CONFIG_SYS_OR4_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000346
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200347#define CONFIG_SYS_BR5_PRELIM 0
348#define CONFIG_SYS_OR5_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000349
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200350#define CONFIG_SYS_BR6_PRELIM 0
351#define CONFIG_SYS_OR6_PRELIM 0
wdenka562e1b2005-01-09 18:21:42 +0000352
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200353#define CONFIG_SYS_BR7_PRELIM 0x00000701
354#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
wdenka562e1b2005-01-09 18:21:42 +0000355
356/*-----------------------------------------------------------------------
357 * LED config
358 */
359#define LED_STAT_0 0xffff /*all LEDs off*/
360#define LED_STAT_1 0xfffe
361#define LED_STAT_2 0xfffd
362#define LED_STAT_3 0xfffb
363#define LED_STAT_4 0xfff7
364#define LED_STAT_5 0xffef
365#define LED_STAT_6 0xffdf
366#define LED_STAT_7 0xff00 /*all LEDs on*/
367
368/*-----------------------------------------------------------------------
369 * Port configuration (GPIO)
370 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200371#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
wdenka562e1b2005-01-09 18:21:42 +0000372GPIO*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200373#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
wdenka562e1b2005-01-09 18:21:42 +0000374(1^=output, 0^=input) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200375#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
376#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
wdenka562e1b2005-01-09 18:21:42 +0000377configuration */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200378#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
379#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
380#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
wdenka562e1b2005-01-09 18:21:42 +0000381
382#endif /* _CONFIG_COBRA5272_H */