wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 228f29a | 2002-12-08 09:53:23 +0000 | [diff] [blame] | 6 | * |
| 7 | * Be sure to mark tests to be run before relocation as such with the |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 8 | * CONFIG_SYS_POST_PREREL flag so that logging is done correctly if the |
wdenk | 228f29a | 2002-12-08 09:53:23 +0000 | [diff] [blame] | 9 | * logbuffer support is enabled. |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #include <common.h> |
| 13 | |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 14 | #include <post.h> |
| 15 | |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 16 | extern int ocm_post_test (int flags); |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 17 | extern int cache_post_test (int flags); |
| 18 | extern int watchdog_post_test (int flags); |
| 19 | extern int i2c_post_test (int flags); |
| 20 | extern int rtc_post_test (int flags); |
| 21 | extern int memory_post_test (int flags); |
| 22 | extern int cpu_post_test (int flags); |
Igor Lisitsin | a11e069 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 23 | extern int fpu_post_test (int flags); |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 24 | extern int uart_post_test (int flags); |
| 25 | extern int ether_post_test (int flags); |
| 26 | extern int spi_post_test (int flags); |
| 27 | extern int usb_post_test (int flags); |
| 28 | extern int spr_post_test (int flags); |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 29 | extern int sysmon_post_test (int flags); |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 30 | extern int dsp_post_test (int flags); |
wdenk | 79fa88f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 31 | extern int codec_post_test (int flags); |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 32 | extern int ecc_post_test (int flags); |
Mike Frysinger | f6f7395 | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 33 | extern int flash_post_test(int flags); |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 34 | |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 35 | extern int dspic_init_post_test (int flags); |
| 36 | extern int dspic_post_test (int flags); |
| 37 | extern int gdc_post_test (int flags); |
| 38 | extern int fpga_post_test (int flags); |
| 39 | extern int lwmon5_watchdog_post_test(int flags); |
| 40 | extern int sysmon1_post_test(int flags); |
Anatolij Gustschin | 29fd7ce | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 41 | extern int coprocessor_post_test(int flags); |
Mike Frysinger | 2151374 | 2011-05-10 16:22:25 -0400 | [diff] [blame] | 42 | extern int led_post_test(int flags); |
| 43 | extern int button_post_test(int flags); |
Valentin Longchamp | 8d3fcb5 | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 44 | extern int memory_regions_post_test(int flags); |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 45 | |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 46 | extern int sysmon_init_f (void); |
| 47 | |
| 48 | extern void sysmon_reloc (void); |
| 49 | |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 50 | |
| 51 | struct post_test post_list[] = |
| 52 | { |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | #if CONFIG_POST & CONFIG_SYS_POST_OCM |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 54 | { |
| 55 | "OCM test", |
| 56 | "ocm", |
| 57 | "This test checks on chip memory (OCM).", |
Yuri Tikhonov | 7845d49 | 2008-05-08 15:46:02 +0200 | [diff] [blame] | 58 | POST_ROM | POST_ALWAYS | POST_PREREL | POST_CRITICAL | POST_STOP, |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 59 | &ocm_post_test, |
| 60 | NULL, |
| 61 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 62 | CONFIG_SYS_POST_OCM |
Yuri Tikhonov | 6e8ec68 | 2008-05-08 15:42:47 +0200 | [diff] [blame] | 63 | }, |
| 64 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 65 | #if CONFIG_POST & CONFIG_SYS_POST_CACHE |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 66 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 67 | "Cache test", |
| 68 | "cache", |
| 69 | "This test verifies the CPU cache operation.", |
| 70 | POST_RAM | POST_ALWAYS, |
| 71 | &cache_post_test, |
| 72 | NULL, |
| 73 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 74 | CONFIG_SYS_POST_CACHE |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 75 | }, |
| 76 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 78 | #if defined(CONFIG_POST_WATCHDOG) |
| 79 | CONFIG_POST_WATCHDOG, |
| 80 | #else |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 81 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 82 | "Watchdog timer test", |
| 83 | "watchdog", |
| 84 | "This test checks the watchdog timer.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 85 | POST_RAM | POST_POWERON | POST_SLOWTEST | POST_MANUAL | POST_REBOOT, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 86 | &watchdog_post_test, |
| 87 | NULL, |
| 88 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | CONFIG_SYS_POST_WATCHDOG |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 90 | }, |
| 91 | #endif |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 92 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 93 | #if CONFIG_POST & CONFIG_SYS_POST_I2C |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 94 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 95 | "I2C test", |
| 96 | "i2c", |
| 97 | "This test verifies the I2C operation.", |
| 98 | POST_RAM | POST_ALWAYS, |
| 99 | &i2c_post_test, |
| 100 | NULL, |
| 101 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 102 | CONFIG_SYS_POST_I2C |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 103 | }, |
| 104 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 105 | #if CONFIG_POST & CONFIG_SYS_POST_RTC |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 106 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 107 | "RTC test", |
| 108 | "rtc", |
| 109 | "This test verifies the RTC operation.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 110 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 111 | &rtc_post_test, |
| 112 | NULL, |
| 113 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | CONFIG_SYS_POST_RTC |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 115 | }, |
| 116 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 117 | #if CONFIG_POST & CONFIG_SYS_POST_MEMORY |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 118 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 119 | "Memory test", |
| 120 | "memory", |
| 121 | "This test checks RAM.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 122 | POST_ROM | POST_POWERON | POST_SLOWTEST | POST_PREREL, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 123 | &memory_post_test, |
| 124 | NULL, |
| 125 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 126 | CONFIG_SYS_POST_MEMORY |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 127 | }, |
| 128 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #if CONFIG_POST & CONFIG_SYS_POST_CPU |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 130 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 131 | "CPU test", |
| 132 | "cpu", |
| 133 | "This test verifies the arithmetic logic unit of" |
| 134 | " CPU.", |
| 135 | POST_RAM | POST_ALWAYS, |
| 136 | &cpu_post_test, |
| 137 | NULL, |
| 138 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | CONFIG_SYS_POST_CPU |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 140 | }, |
| 141 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #if CONFIG_POST & CONFIG_SYS_POST_FPU |
Igor Lisitsin | a11e069 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 143 | { |
| 144 | "FPU test", |
| 145 | "fpu", |
| 146 | "This test verifies the arithmetic logic unit of" |
| 147 | " FPU.", |
| 148 | POST_RAM | POST_ALWAYS, |
| 149 | &fpu_post_test, |
| 150 | NULL, |
| 151 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 152 | CONFIG_SYS_POST_FPU |
Igor Lisitsin | a11e069 | 2007-03-28 19:06:19 +0400 | [diff] [blame] | 153 | }, |
| 154 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 155 | #if CONFIG_POST & CONFIG_SYS_POST_UART |
Stefan Roese | 834a45d | 2010-10-07 14:16:25 +0200 | [diff] [blame] | 156 | #if defined(CONFIG_POST_UART) |
| 157 | CONFIG_POST_UART, |
| 158 | #else |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 159 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 160 | "UART test", |
| 161 | "uart", |
| 162 | "This test verifies the UART operation.", |
wdenk | 8564acf | 2003-07-14 22:13:32 +0000 | [diff] [blame] | 163 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 164 | &uart_post_test, |
| 165 | NULL, |
| 166 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 167 | CONFIG_SYS_POST_UART |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 168 | }, |
Stefan Roese | 834a45d | 2010-10-07 14:16:25 +0200 | [diff] [blame] | 169 | #endif /* CONFIG_POST_UART */ |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 170 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 171 | #if CONFIG_POST & CONFIG_SYS_POST_ETHER |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 172 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 173 | "ETHERNET test", |
| 174 | "ethernet", |
| 175 | "This test verifies the ETHERNET operation.", |
| 176 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
| 177 | ðer_post_test, |
| 178 | NULL, |
| 179 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 180 | CONFIG_SYS_POST_ETHER |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 181 | }, |
| 182 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 183 | #if CONFIG_POST & CONFIG_SYS_POST_SPI |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 184 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 185 | "SPI test", |
| 186 | "spi", |
| 187 | "This test verifies the SPI operation.", |
| 188 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
| 189 | &spi_post_test, |
| 190 | NULL, |
| 191 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | CONFIG_SYS_POST_SPI |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 193 | }, |
| 194 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 195 | #if CONFIG_POST & CONFIG_SYS_POST_USB |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 196 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 197 | "USB test", |
| 198 | "usb", |
| 199 | "This test verifies the USB operation.", |
| 200 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
| 201 | &usb_post_test, |
| 202 | NULL, |
| 203 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 204 | CONFIG_SYS_POST_USB |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 205 | }, |
| 206 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 207 | #if CONFIG_POST & CONFIG_SYS_POST_SPR |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 208 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 209 | "SPR test", |
| 210 | "spr", |
| 211 | "This test checks SPR contents.", |
Stefan Roese | b2e2142 | 2008-01-09 10:38:58 +0100 | [diff] [blame] | 212 | POST_RAM | POST_ALWAYS, |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 213 | &spr_post_test, |
| 214 | NULL, |
| 215 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 216 | CONFIG_SYS_POST_SPR |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 217 | }, |
| 218 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 219 | #if CONFIG_POST & CONFIG_SYS_POST_SYSMON |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 220 | { |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 221 | "SYSMON test", |
| 222 | "sysmon", |
| 223 | "This test monitors system hardware.", |
| 224 | POST_RAM | POST_ALWAYS, |
| 225 | &sysmon_post_test, |
| 226 | &sysmon_init_f, |
| 227 | &sysmon_reloc, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 228 | CONFIG_SYS_POST_SYSMON |
wdenk | 4532cb6 | 2003-04-27 22:52:51 +0000 | [diff] [blame] | 229 | }, |
| 230 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 231 | #if CONFIG_POST & CONFIG_SYS_POST_DSP |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 232 | { |
| 233 | "DSP test", |
| 234 | "dsp", |
| 235 | "This test checks any connected DSP(s).", |
Sascha Laue | 5744ddc | 2008-05-30 09:48:14 +0200 | [diff] [blame] | 236 | POST_RAM | POST_ALWAYS | POST_MANUAL, |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 237 | &dsp_post_test, |
| 238 | NULL, |
| 239 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 240 | CONFIG_SYS_POST_DSP |
wdenk | 5a8c51c | 2004-04-15 21:16:42 +0000 | [diff] [blame] | 241 | }, |
| 242 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 243 | #if CONFIG_POST & CONFIG_SYS_POST_CODEC |
wdenk | 79fa88f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 244 | { |
| 245 | "CODEC test", |
| 246 | "codec", |
| 247 | "This test checks any connected codec(s).", |
| 248 | POST_RAM | POST_MANUAL, |
| 249 | &codec_post_test, |
| 250 | NULL, |
| 251 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 252 | CONFIG_SYS_POST_CODEC |
wdenk | 79fa88f | 2004-06-07 23:46:25 +0000 | [diff] [blame] | 253 | }, |
| 254 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 255 | #if CONFIG_POST & CONFIG_SYS_POST_ECC |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 256 | { |
| 257 | "ECC test", |
| 258 | "ecc", |
Larry Johnson | 8dafa87 | 2008-01-12 23:35:33 -0500 | [diff] [blame] | 259 | "This test checks the ECC facility of memory.", |
| 260 | POST_ROM | POST_ALWAYS | POST_PREREL, |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 261 | &ecc_post_test, |
| 262 | NULL, |
| 263 | NULL, |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 264 | CONFIG_SYS_POST_ECC |
Pavel Kolesnikov | 531e3e8 | 2007-07-20 15:03:03 +0200 | [diff] [blame] | 265 | }, |
| 266 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 267 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC1 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 268 | CONFIG_POST_BSPEC1, |
| 269 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 270 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC2 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 271 | CONFIG_POST_BSPEC2, |
| 272 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 273 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC3 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 274 | CONFIG_POST_BSPEC3, |
| 275 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 276 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC4 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 277 | CONFIG_POST_BSPEC4, |
| 278 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 279 | #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 |
Yuri Tikhonov | 65b20dc | 2008-02-04 14:10:42 +0100 | [diff] [blame] | 280 | CONFIG_POST_BSPEC5, |
| 281 | #endif |
Anatolij Gustschin | 29fd7ce | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 282 | #if CONFIG_POST & CONFIG_SYS_POST_COPROC |
| 283 | { |
| 284 | "Coprocessors communication test", |
| 285 | "coproc_com", |
| 286 | "This test checks communication with coprocessors.", |
| 287 | POST_RAM | POST_ALWAYS | POST_CRITICAL, |
| 288 | &coprocessor_post_test, |
| 289 | NULL, |
| 290 | NULL, |
| 291 | CONFIG_SYS_POST_COPROC |
Mike Frysinger | f6f7395 | 2011-05-10 13:35:40 +0000 | [diff] [blame] | 292 | }, |
| 293 | #endif |
| 294 | #if CONFIG_POST & CONFIG_SYS_POST_FLASH |
| 295 | { |
| 296 | "Parallel NOR flash test", |
| 297 | "flash", |
| 298 | "This test verifies parallel flash operations.", |
| 299 | POST_RAM | POST_SLOWTEST | POST_MANUAL, |
| 300 | &flash_post_test, |
| 301 | NULL, |
| 302 | NULL, |
| 303 | CONFIG_SYS_POST_FLASH |
| 304 | }, |
Anatolij Gustschin | 29fd7ce | 2010-04-24 19:27:11 +0200 | [diff] [blame] | 305 | #endif |
Valentin Longchamp | 8d3fcb5 | 2011-09-12 04:18:40 +0000 | [diff] [blame] | 306 | #if CONFIG_POST & CONFIG_SYS_POST_MEM_REGIONS |
| 307 | { |
| 308 | "Memory regions test", |
| 309 | "mem_regions", |
| 310 | "This test checks regularly placed regions of the RAM.", |
| 311 | POST_ROM | POST_SLOWTEST | POST_PREREL, |
| 312 | &memory_regions_post_test, |
| 313 | NULL, |
| 314 | NULL, |
| 315 | CONFIG_SYS_POST_MEM_REGIONS |
| 316 | }, |
| 317 | #endif |
wdenk | 324f6cf | 2002-10-07 21:13:39 +0000 | [diff] [blame] | 318 | }; |
| 319 | |
Mike Frysinger | d239781 | 2011-05-10 07:28:35 +0000 | [diff] [blame] | 320 | unsigned int post_list_size = ARRAY_SIZE(post_list); |